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Mikael Petterssone589ed22008-08-20 09:36:07 +01001#ifndef _ASM_ARM_FUTEX_H
2#define _ASM_ARM_FUTEX_H
3
4#ifdef __KERNEL__
5
Will Deaconc1b0db52011-04-28 18:43:01 +01006#include <linux/futex.h>
7#include <linux/uaccess.h>
8#include <asm/errno.h>
9
10#define __futex_atomic_ex_table(err_reg) \
11 "3:\n" \
12 " .pushsection __ex_table,\"a\"\n" \
13 " .align 3\n" \
14 " .long 1b, 4f, 2b, 4f\n" \
15 " .popsection\n" \
Ard Biesheuvelc4a84ae2015-03-24 10:41:09 +010016 " .pushsection .text.fixup,\"ax\"\n" \
Will Deacon667d1b42012-06-15 16:49:58 +010017 " .align 2\n" \
Will Deaconc1b0db52011-04-28 18:43:01 +010018 "4: mov %0, " err_reg "\n" \
19 " b 3b\n" \
20 " .popsection"
21
Mikael Petterssone589ed22008-08-20 09:36:07 +010022#ifdef CONFIG_SMP
Jakub Jelinek4732efb2005-09-06 15:16:25 -070023
Will Deacondf77abc2011-09-23 14:34:12 +010024#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
Russell King3fba7e22015-08-19 11:02:28 +010025({ \
26 unsigned int __ua_flags; \
Will Deaconc1b0db52011-04-28 18:43:01 +010027 smp_mb(); \
Will Deaconc32ffce2014-02-21 17:01:48 +010028 prefetchw(uaddr); \
Russell King3fba7e22015-08-19 11:02:28 +010029 __ua_flags = uaccess_save_and_enable(); \
Will Deaconc1b0db52011-04-28 18:43:01 +010030 __asm__ __volatile__( \
Will Deacondf77abc2011-09-23 14:34:12 +010031 "1: ldrex %1, [%3]\n" \
Will Deaconc1b0db52011-04-28 18:43:01 +010032 " " insn "\n" \
Will Deacondf77abc2011-09-23 14:34:12 +010033 "2: strex %2, %0, [%3]\n" \
34 " teq %2, #0\n" \
Will Deaconc1b0db52011-04-28 18:43:01 +010035 " bne 1b\n" \
36 " mov %0, #0\n" \
Will Deacondf77abc2011-09-23 14:34:12 +010037 __futex_atomic_ex_table("%5") \
38 : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
Will Deaconc1b0db52011-04-28 18:43:01 +010039 : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
Russell King3fba7e22015-08-19 11:02:28 +010040 : "cc", "memory"); \
41 uaccess_restore(__ua_flags); \
42})
Will Deaconc1b0db52011-04-28 18:43:01 +010043
44static inline int
45futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
46 u32 oldval, u32 newval)
47{
Russell King3fba7e22015-08-19 11:02:28 +010048 unsigned int __ua_flags;
Will Deaconc1b0db52011-04-28 18:43:01 +010049 int ret;
50 u32 val;
51
52 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
53 return -EFAULT;
54
55 smp_mb();
Will Deaconc32ffce2014-02-21 17:01:48 +010056 /* Prefetching cannot fault */
57 prefetchw(uaddr);
Russell King3fba7e22015-08-19 11:02:28 +010058 __ua_flags = uaccess_save_and_enable();
Will Deaconc1b0db52011-04-28 18:43:01 +010059 __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
60 "1: ldrex %1, [%4]\n"
61 " teq %1, %2\n"
62 " ite eq @ explicit IT needed for the 2b label\n"
63 "2: strexeq %0, %3, [%4]\n"
64 " movne %0, #0\n"
65 " teq %0, #0\n"
66 " bne 1b\n"
67 __futex_atomic_ex_table("%5")
68 : "=&r" (ret), "=&r" (val)
69 : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
70 : "cc", "memory");
Russell King3fba7e22015-08-19 11:02:28 +010071 uaccess_restore(__ua_flags);
Will Deaconc1b0db52011-04-28 18:43:01 +010072 smp_mb();
73
74 *uval = val;
75 return ret;
76}
Jakub Jelinek4732efb2005-09-06 15:16:25 -070077
Mikael Petterssone589ed22008-08-20 09:36:07 +010078#else /* !SMP, we can work around lack of atomic ops by disabling preemption */
79
Mikael Petterssone589ed22008-08-20 09:36:07 +010080#include <linux/preempt.h>
Catalin Marinas247055a2010-09-13 16:03:21 +010081#include <asm/domain.h>
Mikael Petterssone589ed22008-08-20 09:36:07 +010082
Will Deacondf77abc2011-09-23 14:34:12 +010083#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
Russell King3fba7e22015-08-19 11:02:28 +010084({ \
85 unsigned int __ua_flags = uaccess_save_and_enable(); \
Mikael Petterssone589ed22008-08-20 09:36:07 +010086 __asm__ __volatile__( \
Catalin Marinas4e7682d2012-01-25 11:38:13 +010087 "1: " TUSER(ldr) " %1, [%3]\n" \
Mikael Petterssone589ed22008-08-20 09:36:07 +010088 " " insn "\n" \
Catalin Marinas4e7682d2012-01-25 11:38:13 +010089 "2: " TUSER(str) " %0, [%3]\n" \
Mikael Petterssone589ed22008-08-20 09:36:07 +010090 " mov %0, #0\n" \
Will Deacondf77abc2011-09-23 14:34:12 +010091 __futex_atomic_ex_table("%5") \
92 : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
Mikael Petterssone589ed22008-08-20 09:36:07 +010093 : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
Russell King3fba7e22015-08-19 11:02:28 +010094 : "cc", "memory"); \
95 uaccess_restore(__ua_flags); \
96})
Mikael Petterssone589ed22008-08-20 09:36:07 +010097
98static inline int
Will Deaconc1b0db52011-04-28 18:43:01 +010099futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
100 u32 oldval, u32 newval)
101{
Russell King3fba7e22015-08-19 11:02:28 +0100102 unsigned int __ua_flags;
Will Deaconc1b0db52011-04-28 18:43:01 +0100103 int ret = 0;
104 u32 val;
105
106 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
107 return -EFAULT;
108
David Hildenbrand39919b02015-05-11 17:52:15 +0200109 preempt_disable();
Russell King3fba7e22015-08-19 11:02:28 +0100110 __ua_flags = uaccess_save_and_enable();
Will Deaconc1b0db52011-04-28 18:43:01 +0100111 __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
Catalin Marinas4e7682d2012-01-25 11:38:13 +0100112 "1: " TUSER(ldr) " %1, [%4]\n"
Will Deaconc1b0db52011-04-28 18:43:01 +0100113 " teq %1, %2\n"
114 " it eq @ explicit IT needed for the 2b label\n"
Catalin Marinas4e7682d2012-01-25 11:38:13 +0100115 "2: " TUSER(streq) " %3, [%4]\n"
Will Deaconc1b0db52011-04-28 18:43:01 +0100116 __futex_atomic_ex_table("%5")
117 : "+r" (ret), "=&r" (val)
118 : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
119 : "cc", "memory");
Russell King3fba7e22015-08-19 11:02:28 +0100120 uaccess_restore(__ua_flags);
Will Deaconc1b0db52011-04-28 18:43:01 +0100121
122 *uval = val;
David Hildenbrand39919b02015-05-11 17:52:15 +0200123 preempt_enable();
124
Will Deaconc1b0db52011-04-28 18:43:01 +0100125 return ret;
126}
127
128#endif /* !SMP */
129
130static inline int
Michel Lespinasse8d7718a2011-03-10 18:50:58 -0800131futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
Mikael Petterssone589ed22008-08-20 09:36:07 +0100132{
133 int op = (encoded_op >> 28) & 7;
134 int cmp = (encoded_op >> 24) & 15;
135 int oparg = (encoded_op << 8) >> 20;
136 int cmparg = (encoded_op << 20) >> 20;
Will Deacondf77abc2011-09-23 14:34:12 +0100137 int oldval = 0, ret, tmp;
Mikael Petterssone589ed22008-08-20 09:36:07 +0100138
139 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
140 oparg = 1 << oparg;
141
Michel Lespinasse8d7718a2011-03-10 18:50:58 -0800142 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
Mikael Petterssone589ed22008-08-20 09:36:07 +0100143 return -EFAULT;
144
David Hildenbrand388b0e02015-05-11 17:52:16 +0200145#ifndef CONFIG_SMP
146 preempt_disable();
147#endif
148 pagefault_disable();
Mikael Petterssone589ed22008-08-20 09:36:07 +0100149
150 switch (op) {
151 case FUTEX_OP_SET:
Will Deacondf77abc2011-09-23 14:34:12 +0100152 __futex_atomic_op("mov %0, %4", ret, oldval, tmp, uaddr, oparg);
Mikael Petterssone589ed22008-08-20 09:36:07 +0100153 break;
154 case FUTEX_OP_ADD:
Will Deacondf77abc2011-09-23 14:34:12 +0100155 __futex_atomic_op("add %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
Mikael Petterssone589ed22008-08-20 09:36:07 +0100156 break;
157 case FUTEX_OP_OR:
Will Deacondf77abc2011-09-23 14:34:12 +0100158 __futex_atomic_op("orr %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
Mikael Petterssone589ed22008-08-20 09:36:07 +0100159 break;
160 case FUTEX_OP_ANDN:
Will Deacondf77abc2011-09-23 14:34:12 +0100161 __futex_atomic_op("and %0, %1, %4", ret, oldval, tmp, uaddr, ~oparg);
Mikael Petterssone589ed22008-08-20 09:36:07 +0100162 break;
163 case FUTEX_OP_XOR:
Will Deacondf77abc2011-09-23 14:34:12 +0100164 __futex_atomic_op("eor %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
Mikael Petterssone589ed22008-08-20 09:36:07 +0100165 break;
166 default:
167 ret = -ENOSYS;
168 }
169
David Hildenbrand388b0e02015-05-11 17:52:16 +0200170 pagefault_enable();
171#ifndef CONFIG_SMP
172 preempt_enable();
173#endif
Mikael Petterssone589ed22008-08-20 09:36:07 +0100174
175 if (!ret) {
176 switch (cmp) {
177 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
178 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
179 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
180 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
181 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
182 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
183 default: ret = -ENOSYS;
184 }
185 }
186 return ret;
187}
188
Mikael Petterssone589ed22008-08-20 09:36:07 +0100189#endif /* __KERNEL__ */
190#endif /* _ASM_ARM_FUTEX_H */