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Haavard Skinnemoen4a776f02008-07-08 11:58:45 -07001/*
2 * DMA Engine test module
3 *
4 * Copyright (C) 2007 Atmel Corporation
Andy Shevchenko851b7e12013-03-04 11:09:30 +02005 * Copyright (C) 2013 Intel Corporation
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
Dan Williams872f05c2013-11-06 16:29:58 -080011#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070013#include <linux/delay.h>
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +000014#include <linux/dma-mapping.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070015#include <linux/dmaengine.h>
Guennadi Liakhovetski981ed702011-08-18 16:50:51 +020016#include <linux/freezer.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070017#include <linux/init.h>
18#include <linux/kthread.h>
19#include <linux/module.h>
20#include <linux/moduleparam.h>
21#include <linux/random.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070023#include <linux/wait.h>
24
25static unsigned int test_buf_size = 16384;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030026module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070027MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
28
Kay Sievers06190d82008-11-11 13:12:33 -070029static char test_channel[20];
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030030module_param_string(channel, test_channel, sizeof(test_channel),
31 S_IRUGO | S_IWUSR);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070032MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
33
Kay Sievers06190d82008-11-11 13:12:33 -070034static char test_device[20];
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030035module_param_string(device, test_device, sizeof(test_device),
36 S_IRUGO | S_IWUSR);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070037MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
38
39static unsigned int threads_per_chan = 1;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030040module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070041MODULE_PARM_DESC(threads_per_chan,
42 "Number of threads to start per channel (default: 1)");
43
44static unsigned int max_channels;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030045module_param(max_channels, uint, S_IRUGO | S_IWUSR);
Dan Williams33df8ca2009-01-06 11:38:15 -070046MODULE_PARM_DESC(max_channels,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070047 "Maximum number of channels to use (default: all)");
48
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +020049static unsigned int iterations;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030050module_param(iterations, uint, S_IRUGO | S_IWUSR);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +020051MODULE_PARM_DESC(iterations,
52 "Iterations before stopping test (default: infinite)");
53
Dan Williamsb54d5cb2009-03-25 09:13:25 -070054static unsigned int xor_sources = 3;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030055module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
Dan Williamsb54d5cb2009-03-25 09:13:25 -070056MODULE_PARM_DESC(xor_sources,
57 "Number of xor source buffers (default: 3)");
58
Dan Williams58691d62009-08-29 19:09:27 -070059static unsigned int pq_sources = 3;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030060module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
Dan Williams58691d62009-08-29 19:09:27 -070061MODULE_PARM_DESC(pq_sources,
62 "Number of p+q source buffers (default: 3)");
63
Viresh Kumard42efe62011-03-22 17:27:25 +053064static int timeout = 3000;
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +030065module_param(timeout, uint, S_IRUGO | S_IWUSR);
Joe Perches85ee7a12011-04-23 20:38:19 -070066MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
67 "Pass -1 for infinite timeout");
Viresh Kumard42efe62011-03-22 17:27:25 +053068
Dan Williamse3b9c342013-11-06 16:30:05 -080069static bool noverify;
70module_param(noverify, bool, S_IRUGO | S_IWUSR);
71MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
Andy Shevchenko74b5c072013-03-04 11:09:32 +020072
Dan Williams50137a72013-11-08 12:26:26 -080073static bool verbose;
74module_param(verbose, bool, S_IRUGO | S_IWUSR);
75MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070076
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +020077/**
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +020078 * struct dmatest_params - test parameters.
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +020079 * @buf_size: size of the memcpy test buffer
80 * @channel: bus ID of the channel to test
81 * @device: bus ID of the DMA Engine to test
82 * @threads_per_chan: number of threads to start per channel
83 * @max_channels: maximum number of channels to use
84 * @iterations: iterations before stopping test
85 * @xor_sources: number of xor source buffers
86 * @pq_sources: number of p+q source buffers
87 * @timeout: transfer timeout in msec, -1 for infinite timeout
88 */
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +020089struct dmatest_params {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +020090 unsigned int buf_size;
91 char channel[20];
92 char device[20];
93 unsigned int threads_per_chan;
94 unsigned int max_channels;
95 unsigned int iterations;
96 unsigned int xor_sources;
97 unsigned int pq_sources;
98 int timeout;
Dan Williamse3b9c342013-11-06 16:30:05 -080099 bool noverify;
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200100};
101
102/**
103 * struct dmatest_info - test information.
104 * @params: test parameters
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200105 * @lock: access protection to the fields of this structure
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200106 */
Dan Williamsa310d032013-11-06 16:30:01 -0800107static struct dmatest_info {
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200108 /* Test parameters */
109 struct dmatest_params params;
Andy Shevchenko838cc702013-03-04 11:09:28 +0200110
111 /* Internal state */
112 struct list_head channels;
113 unsigned int nr_channels;
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200114 struct mutex lock;
Dan Williamsa310d032013-11-06 16:30:01 -0800115 bool did_init;
116} test_info = {
117 .channels = LIST_HEAD_INIT(test_info.channels),
118 .lock = __MUTEX_INITIALIZER(test_info.lock),
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200119};
120
Dan Williamsa310d032013-11-06 16:30:01 -0800121static int dmatest_run_set(const char *val, const struct kernel_param *kp);
122static int dmatest_run_get(char *val, const struct kernel_param *kp);
123static struct kernel_param_ops run_ops = {
124 .set = dmatest_run_set,
125 .get = dmatest_run_get,
126};
127static bool dmatest_run;
128module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
129MODULE_PARM_DESC(run, "Run the test (default: false)");
130
131/* Maximum amount of mismatched bytes in buffer to print */
132#define MAX_ERROR_COUNT 32
133
134/*
135 * Initialization patterns. All bytes in the source buffer has bit 7
136 * set, all bytes in the destination buffer has bit 7 cleared.
137 *
138 * Bit 6 is set for all bytes which are to be copied by the DMA
139 * engine. Bit 5 is set for all bytes which are to be overwritten by
140 * the DMA engine.
141 *
142 * The remaining bits are the inverse of a counter which increments by
143 * one for each byte address.
144 */
145#define PATTERN_SRC 0x80
146#define PATTERN_DST 0x00
147#define PATTERN_COPY 0x40
148#define PATTERN_OVERWRITE 0x20
149#define PATTERN_COUNT_MASK 0x1f
150
151struct dmatest_thread {
152 struct list_head node;
153 struct dmatest_info *info;
154 struct task_struct *task;
155 struct dma_chan *chan;
156 u8 **srcs;
157 u8 **dsts;
158 enum dma_transaction_type type;
159 bool done;
160};
161
162struct dmatest_chan {
163 struct list_head node;
164 struct dma_chan *chan;
165 struct list_head threads;
166};
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200167
Dan Williams2d88ce72013-11-06 16:30:09 -0800168static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
169static bool wait;
170
171static bool is_threaded_test_run(struct dmatest_info *info)
172{
173 struct dmatest_chan *dtc;
174
175 list_for_each_entry(dtc, &info->channels, node) {
176 struct dmatest_thread *thread;
177
178 list_for_each_entry(thread, &dtc->threads, node) {
179 if (!thread->done)
180 return true;
181 }
182 }
183
184 return false;
185}
186
187static int dmatest_wait_get(char *val, const struct kernel_param *kp)
188{
189 struct dmatest_info *info = &test_info;
190 struct dmatest_params *params = &info->params;
191
192 if (params->iterations)
193 wait_event(thread_wait, !is_threaded_test_run(info));
194 wait = true;
195 return param_get_bool(val, kp);
196}
197
198static struct kernel_param_ops wait_ops = {
199 .get = dmatest_wait_get,
200 .set = param_set_bool,
201};
202module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
203MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700204
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200205static bool dmatest_match_channel(struct dmatest_params *params,
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200206 struct dma_chan *chan)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700207{
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200208 if (params->channel[0] == '\0')
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700209 return true;
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200210 return strcmp(dma_chan_name(chan), params->channel) == 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700211}
212
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200213static bool dmatest_match_device(struct dmatest_params *params,
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200214 struct dma_device *device)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700215{
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200216 if (params->device[0] == '\0')
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700217 return true;
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200218 return strcmp(dev_name(device->dev), params->device) == 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700219}
220
221static unsigned long dmatest_random(void)
222{
223 unsigned long buf;
224
Dan Williamsbe9fa5a2013-11-06 16:30:03 -0800225 prandom_bytes(&buf, sizeof(buf));
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700226 return buf;
227}
228
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200229static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
230 unsigned int buf_size)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700231{
232 unsigned int i;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700233 u8 *buf;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700234
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700235 for (; (buf = *bufs); bufs++) {
236 for (i = 0; i < start; i++)
237 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
238 for ( ; i < start + len; i++)
239 buf[i] = PATTERN_SRC | PATTERN_COPY
Joe Perchesc0198942009-06-28 09:26:21 -0700240 | (~i & PATTERN_COUNT_MASK);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200241 for ( ; i < buf_size; i++)
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700242 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
243 buf++;
244 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700245}
246
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200247static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
248 unsigned int buf_size)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700249{
250 unsigned int i;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700251 u8 *buf;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700252
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700253 for (; (buf = *bufs); bufs++) {
254 for (i = 0; i < start; i++)
255 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
256 for ( ; i < start + len; i++)
257 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
258 | (~i & PATTERN_COUNT_MASK);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200259 for ( ; i < buf_size; i++)
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700260 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
261 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700262}
263
Dan Williams7b610172013-11-06 16:29:57 -0800264static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
265 unsigned int counter, bool is_srcbuf)
266{
267 u8 diff = actual ^ pattern;
268 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
269 const char *thread_name = current->comm;
270
271 if (is_srcbuf)
272 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
273 thread_name, index, expected, actual);
274 else if ((pattern & PATTERN_COPY)
275 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
276 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
277 thread_name, index, expected, actual);
278 else if (diff & PATTERN_SRC)
279 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
280 thread_name, index, expected, actual);
281 else
282 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
283 thread_name, index, expected, actual);
284}
285
286static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
287 unsigned int end, unsigned int counter, u8 pattern,
288 bool is_srcbuf)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700289{
290 unsigned int i;
291 unsigned int error_count = 0;
292 u8 actual;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700293 u8 expected;
294 u8 *buf;
295 unsigned int counter_orig = counter;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700296
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700297 for (; (buf = *bufs); bufs++) {
298 counter = counter_orig;
299 for (i = start; i < end; i++) {
300 actual = buf[i];
301 expected = pattern | (~counter & PATTERN_COUNT_MASK);
302 if (actual != expected) {
Dan Williams7b610172013-11-06 16:29:57 -0800303 if (error_count < MAX_ERROR_COUNT)
304 dmatest_mismatch(actual, pattern, i,
305 counter, is_srcbuf);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700306 error_count++;
307 }
308 counter++;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700309 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700310 }
311
Andy Shevchenko74b5c072013-03-04 11:09:32 +0200312 if (error_count > MAX_ERROR_COUNT)
Dan Williams7b610172013-11-06 16:29:57 -0800313 pr_warn("%s: %u errors suppressed\n",
Andy Shevchenko74b5c072013-03-04 11:09:32 +0200314 current->comm, error_count - MAX_ERROR_COUNT);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700315
316 return error_count;
317}
318
Tejun Heoadfa5432011-11-23 09:28:16 -0800319/* poor man's completion - we want to use wait_event_freezable() on it */
320struct dmatest_done {
321 bool done;
322 wait_queue_head_t *wait;
323};
324
325static void dmatest_callback(void *arg)
Dan Williamse44e0aa2009-03-25 09:13:25 -0700326{
Tejun Heoadfa5432011-11-23 09:28:16 -0800327 struct dmatest_done *done = arg;
328
329 done->done = true;
330 wake_up_all(done->wait);
Dan Williamse44e0aa2009-03-25 09:13:25 -0700331}
332
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900333static unsigned int min_odd(unsigned int x, unsigned int y)
334{
335 unsigned int val = min(x, y);
336
337 return val % 2 ? val : val - 1;
338}
339
Dan Williams872f05c2013-11-06 16:29:58 -0800340static void result(const char *err, unsigned int n, unsigned int src_off,
341 unsigned int dst_off, unsigned int len, unsigned long data)
Andy Shevchenkod86b2f22013-03-04 11:09:34 +0200342{
Dan Williams50137a72013-11-08 12:26:26 -0800343 pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
Dan Williams872f05c2013-11-06 16:29:58 -0800344 current->comm, n, err, src_off, dst_off, len, data);
Andy Shevchenkod86b2f22013-03-04 11:09:34 +0200345}
346
Dan Williams872f05c2013-11-06 16:29:58 -0800347static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
348 unsigned int dst_off, unsigned int len,
349 unsigned long data)
Andy Shevchenko95019c82013-03-04 11:09:33 +0200350{
Dan Williams50137a72013-11-08 12:26:26 -0800351 pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
352 current->comm, n, err, src_off, dst_off, len, data);
Andy Shevchenko95019c82013-03-04 11:09:33 +0200353}
354
Dan Williams50137a72013-11-08 12:26:26 -0800355#define verbose_result(err, n, src_off, dst_off, len, data) ({ \
356 if (verbose) \
357 result(err, n, src_off, dst_off, len, data); \
358 else \
359 dbg_result(err, n, src_off, dst_off, len, data); \
360})
361
Dan Williams86727442013-11-06 16:30:07 -0800362static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
Andy Shevchenko95019c82013-03-04 11:09:33 +0200363{
Dan Williams86727442013-11-06 16:30:07 -0800364 unsigned long long per_sec = 1000000;
Andy Shevchenko95019c82013-03-04 11:09:33 +0200365
Dan Williams86727442013-11-06 16:30:07 -0800366 if (runtime <= 0)
367 return 0;
Andy Shevchenko95019c82013-03-04 11:09:33 +0200368
Dan Williams86727442013-11-06 16:30:07 -0800369 /* drop precision until runtime is 32-bits */
370 while (runtime > UINT_MAX) {
371 runtime >>= 1;
372 per_sec <<= 1;
373 }
Andy Shevchenko95019c82013-03-04 11:09:33 +0200374
Dan Williams86727442013-11-06 16:30:07 -0800375 per_sec *= val;
376 do_div(per_sec, runtime);
377 return per_sec;
Andy Shevchenko95019c82013-03-04 11:09:33 +0200378}
379
Dan Williams86727442013-11-06 16:30:07 -0800380static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
Andy Shevchenkod86b2f22013-03-04 11:09:34 +0200381{
Dan Williams86727442013-11-06 16:30:07 -0800382 return dmatest_persec(runtime, len >> 10);
Andy Shevchenko95019c82013-03-04 11:09:33 +0200383}
384
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700385/*
386 * This function repeatedly tests DMA transfers of various lengths and
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700387 * offsets for a given operation type until it is told to exit by
388 * kthread_stop(). There may be multiple threads running this function
389 * in parallel for a single channel, and there may be multiple channels
390 * being tested in parallel.
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700391 *
392 * Before each test, the source and destination buffer is initialized
393 * with a known pattern. This pattern is different depending on
394 * whether it's in an area which is supposed to be copied or
395 * overwritten, and different in the source and destination buffers.
396 * So if the DMA engine doesn't copy exactly what we tell it to copy,
397 * we'll notice.
398 */
399static int dmatest_func(void *data)
400{
Tejun Heoadfa5432011-11-23 09:28:16 -0800401 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700402 struct dmatest_thread *thread = data;
Tejun Heoadfa5432011-11-23 09:28:16 -0800403 struct dmatest_done done = { .wait = &done_wait };
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200404 struct dmatest_info *info;
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200405 struct dmatest_params *params;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700406 struct dma_chan *chan;
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900407 struct dma_device *dev;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700408 unsigned int src_off, dst_off, len;
409 unsigned int error_count;
410 unsigned int failed_tests = 0;
411 unsigned int total_tests = 0;
412 dma_cookie_t cookie;
413 enum dma_status status;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700414 enum dma_ctrl_flags flags;
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200415 u8 *pq_coefs = NULL;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700416 int ret;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700417 int src_cnt;
418 int dst_cnt;
419 int i;
Dan Williams86727442013-11-06 16:30:07 -0800420 ktime_t ktime;
421 s64 runtime = 0;
422 unsigned long long total_len = 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700423
Tejun Heoadfa5432011-11-23 09:28:16 -0800424 set_freezable();
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700425
426 ret = -ENOMEM;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700427
428 smp_rmb();
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200429 info = thread->info;
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200430 params = &info->params;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700431 chan = thread->chan;
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900432 dev = chan->device;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700433 if (thread->type == DMA_MEMCPY)
434 src_cnt = dst_cnt = 1;
435 else if (thread->type == DMA_XOR) {
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900436 /* force odd to ensure dst = src */
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200437 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700438 dst_cnt = 1;
Dan Williams58691d62009-08-29 19:09:27 -0700439 } else if (thread->type == DMA_PQ) {
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900440 /* force odd to ensure dst = src */
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200441 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
Dan Williams58691d62009-08-29 19:09:27 -0700442 dst_cnt = 2;
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200443
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200444 pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200445 if (!pq_coefs)
446 goto err_thread_type;
447
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100448 for (i = 0; i < src_cnt; i++)
Dan Williams58691d62009-08-29 19:09:27 -0700449 pq_coefs[i] = 1;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700450 } else
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200451 goto err_thread_type;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700452
453 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
454 if (!thread->srcs)
455 goto err_srcs;
456 for (i = 0; i < src_cnt; i++) {
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200457 thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700458 if (!thread->srcs[i])
459 goto err_srcbuf;
460 }
461 thread->srcs[i] = NULL;
462
463 thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
464 if (!thread->dsts)
465 goto err_dsts;
466 for (i = 0; i < dst_cnt; i++) {
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200467 thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700468 if (!thread->dsts[i])
469 goto err_dstbuf;
470 }
471 thread->dsts[i] = NULL;
472
Dan Williamse44e0aa2009-03-25 09:13:25 -0700473 set_user_nice(current, 10);
474
Ira Snyderb203bd32011-03-03 07:54:53 +0000475 /*
Bartlomiej Zolnierkiewiczd1cab342013-10-18 19:35:21 +0200476 * src and dst buffers are freed by ourselves below
Ira Snyderb203bd32011-03-03 07:54:53 +0000477 */
Bartlomiej Zolnierkiewicz0776ae72013-10-18 19:35:33 +0200478 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700479
Dan Williams86727442013-11-06 16:30:07 -0800480 ktime = ktime_get();
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200481 while (!kthread_should_stop()
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200482 && !(params->iterations && total_tests >= params->iterations)) {
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700483 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams4076e752013-11-06 16:30:10 -0800484 struct dmaengine_unmap_data *um;
485 dma_addr_t srcs[src_cnt];
486 dma_addr_t *dsts;
Dan Williams83544ae2009-09-08 17:42:53 -0700487 u8 align = 0;
Atsushi Nemotod86be862009-01-13 09:22:20 -0700488
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700489 total_tests++;
490
Dan Williams83544ae2009-09-08 17:42:53 -0700491 /* honor alignment restrictions */
492 if (thread->type == DMA_MEMCPY)
493 align = dev->copy_align;
494 else if (thread->type == DMA_XOR)
495 align = dev->xor_align;
496 else if (thread->type == DMA_PQ)
497 align = dev->pq_align;
498
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200499 if (1 << align > params->buf_size) {
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100500 pr_err("%u-byte buffer too small for %d-byte alignment\n",
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200501 params->buf_size, 1 << align);
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100502 break;
503 }
504
Dan Williamse3b9c342013-11-06 16:30:05 -0800505 if (params->noverify) {
506 len = params->buf_size;
507 src_off = 0;
508 dst_off = 0;
509 } else {
510 len = dmatest_random() % params->buf_size + 1;
511 len = (len >> align) << align;
512 if (!len)
513 len = 1 << align;
514 src_off = dmatest_random() % (params->buf_size - len + 1);
515 dst_off = dmatest_random() % (params->buf_size - len + 1);
516
517 src_off = (src_off >> align) << align;
518 dst_off = (dst_off >> align) << align;
519
520 dmatest_init_srcs(thread->srcs, src_off, len,
521 params->buf_size);
522 dmatest_init_dsts(thread->dsts, dst_off, len,
523 params->buf_size);
524 }
525
Dan Williams83544ae2009-09-08 17:42:53 -0700526 len = (len >> align) << align;
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100527 if (!len)
528 len = 1 << align;
Dan Williams86727442013-11-06 16:30:07 -0800529 total_len += len;
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100530
Dan Williams4076e752013-11-06 16:30:10 -0800531 um = dmaengine_get_unmap_data(dev->dev, src_cnt+dst_cnt,
532 GFP_KERNEL);
533 if (!um) {
534 failed_tests++;
535 result("unmap data NULL", total_tests,
536 src_off, dst_off, len, ret);
537 continue;
538 }
Dan Williams83544ae2009-09-08 17:42:53 -0700539
Dan Williams4076e752013-11-06 16:30:10 -0800540 um->len = params->buf_size;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700541 for (i = 0; i < src_cnt; i++) {
Dan Williams4076e752013-11-06 16:30:10 -0800542 unsigned long buf = (unsigned long) thread->srcs[i];
543 struct page *pg = virt_to_page(buf);
544 unsigned pg_off = buf & ~PAGE_MASK;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700545
Dan Williams4076e752013-11-06 16:30:10 -0800546 um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
547 um->len, DMA_TO_DEVICE);
548 srcs[i] = um->addr[i] + src_off;
549 ret = dma_mapping_error(dev->dev, um->addr[i]);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800550 if (ret) {
Dan Williams4076e752013-11-06 16:30:10 -0800551 dmaengine_unmap_put(um);
Dan Williams872f05c2013-11-06 16:29:58 -0800552 result("src mapping error", total_tests,
553 src_off, dst_off, len, ret);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800554 failed_tests++;
555 continue;
556 }
Dan Williams4076e752013-11-06 16:30:10 -0800557 um->to_cnt++;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700558 }
Atsushi Nemotod86be862009-01-13 09:22:20 -0700559 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
Dan Williams4076e752013-11-06 16:30:10 -0800560 dsts = &um->addr[src_cnt];
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700561 for (i = 0; i < dst_cnt; i++) {
Dan Williams4076e752013-11-06 16:30:10 -0800562 unsigned long buf = (unsigned long) thread->dsts[i];
563 struct page *pg = virt_to_page(buf);
564 unsigned pg_off = buf & ~PAGE_MASK;
565
566 dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
567 DMA_BIDIRECTIONAL);
568 ret = dma_mapping_error(dev->dev, dsts[i]);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800569 if (ret) {
Dan Williams4076e752013-11-06 16:30:10 -0800570 dmaengine_unmap_put(um);
Dan Williams872f05c2013-11-06 16:29:58 -0800571 result("dst mapping error", total_tests,
572 src_off, dst_off, len, ret);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800573 failed_tests++;
574 continue;
575 }
Dan Williams4076e752013-11-06 16:30:10 -0800576 um->bidi_cnt++;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700577 }
Atsushi Nemotod86be862009-01-13 09:22:20 -0700578
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700579 if (thread->type == DMA_MEMCPY)
580 tx = dev->device_prep_dma_memcpy(chan,
Dan Williams4076e752013-11-06 16:30:10 -0800581 dsts[0] + dst_off,
582 srcs[0], len, flags);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700583 else if (thread->type == DMA_XOR)
584 tx = dev->device_prep_dma_xor(chan,
Dan Williams4076e752013-11-06 16:30:10 -0800585 dsts[0] + dst_off,
586 srcs, src_cnt,
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700587 len, flags);
Dan Williams58691d62009-08-29 19:09:27 -0700588 else if (thread->type == DMA_PQ) {
589 dma_addr_t dma_pq[dst_cnt];
590
591 for (i = 0; i < dst_cnt; i++)
Dan Williams4076e752013-11-06 16:30:10 -0800592 dma_pq[i] = dsts[i] + dst_off;
593 tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100594 src_cnt, pq_coefs,
Dan Williams58691d62009-08-29 19:09:27 -0700595 len, flags);
596 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700597
Atsushi Nemotod86be862009-01-13 09:22:20 -0700598 if (!tx) {
Dan Williams4076e752013-11-06 16:30:10 -0800599 dmaengine_unmap_put(um);
Dan Williams872f05c2013-11-06 16:29:58 -0800600 result("prep error", total_tests, src_off,
601 dst_off, len, ret);
Atsushi Nemotod86be862009-01-13 09:22:20 -0700602 msleep(100);
603 failed_tests++;
604 continue;
605 }
Dan Williamse44e0aa2009-03-25 09:13:25 -0700606
Tejun Heoadfa5432011-11-23 09:28:16 -0800607 done.done = false;
Dan Williamse44e0aa2009-03-25 09:13:25 -0700608 tx->callback = dmatest_callback;
Tejun Heoadfa5432011-11-23 09:28:16 -0800609 tx->callback_param = &done;
Atsushi Nemotod86be862009-01-13 09:22:20 -0700610 cookie = tx->tx_submit(tx);
611
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700612 if (dma_submit_error(cookie)) {
Dan Williams4076e752013-11-06 16:30:10 -0800613 dmaengine_unmap_put(um);
Dan Williams872f05c2013-11-06 16:29:58 -0800614 result("submit error", total_tests, src_off,
615 dst_off, len, ret);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700616 msleep(100);
617 failed_tests++;
618 continue;
619 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700620 dma_async_issue_pending(chan);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700621
Andy Shevchenkobcc567e2013-05-23 14:29:53 +0300622 wait_event_freezable_timeout(done_wait, done.done,
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200623 msecs_to_jiffies(params->timeout));
Guennadi Liakhovetski981ed702011-08-18 16:50:51 +0200624
Dan Williamse44e0aa2009-03-25 09:13:25 -0700625 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700626
Tejun Heoadfa5432011-11-23 09:28:16 -0800627 if (!done.done) {
628 /*
629 * We're leaving the timed out dma operation with
630 * dangling pointer to done_wait. To make this
631 * correct, we'll need to allocate wait_done for
632 * each test iteration and perform "who's gonna
633 * free it this time?" dancing. For now, just
634 * leave it dangling.
635 */
Dan Williams4076e752013-11-06 16:30:10 -0800636 dmaengine_unmap_put(um);
Dan Williams872f05c2013-11-06 16:29:58 -0800637 result("test timed out", total_tests, src_off, dst_off,
638 len, 0);
Dan Williamse44e0aa2009-03-25 09:13:25 -0700639 failed_tests++;
640 continue;
Vinod Koul19e9f992013-10-16 13:37:27 +0530641 } else if (status != DMA_COMPLETE) {
Dan Williams4076e752013-11-06 16:30:10 -0800642 dmaengine_unmap_put(um);
Dan Williams872f05c2013-11-06 16:29:58 -0800643 result(status == DMA_ERROR ?
644 "completion error status" :
645 "completion busy status", total_tests, src_off,
646 dst_off, len, ret);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700647 failed_tests++;
648 continue;
649 }
Dan Williamse44e0aa2009-03-25 09:13:25 -0700650
Dan Williams4076e752013-11-06 16:30:10 -0800651 dmaengine_unmap_put(um);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700652
Dan Williamse3b9c342013-11-06 16:30:05 -0800653 if (params->noverify) {
Dan Williams50137a72013-11-08 12:26:26 -0800654 verbose_result("test passed", total_tests, src_off,
655 dst_off, len, 0);
Dan Williamse3b9c342013-11-06 16:30:05 -0800656 continue;
657 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700658
Dan Williams872f05c2013-11-06 16:29:58 -0800659 pr_debug("%s: verifying source buffer...\n", current->comm);
Dan Williamse3b9c342013-11-06 16:30:05 -0800660 error_count = dmatest_verify(thread->srcs, 0, src_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700661 0, PATTERN_SRC, true);
Dan Williams7b610172013-11-06 16:29:57 -0800662 error_count += dmatest_verify(thread->srcs, src_off,
663 src_off + len, src_off,
664 PATTERN_SRC | PATTERN_COPY, true);
665 error_count += dmatest_verify(thread->srcs, src_off + len,
666 params->buf_size, src_off + len,
667 PATTERN_SRC, true);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700668
Dan Williams872f05c2013-11-06 16:29:58 -0800669 pr_debug("%s: verifying dest buffer...\n", current->comm);
Dan Williams7b610172013-11-06 16:29:57 -0800670 error_count += dmatest_verify(thread->dsts, 0, dst_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700671 0, PATTERN_DST, false);
Dan Williams7b610172013-11-06 16:29:57 -0800672 error_count += dmatest_verify(thread->dsts, dst_off,
673 dst_off + len, src_off,
674 PATTERN_SRC | PATTERN_COPY, false);
675 error_count += dmatest_verify(thread->dsts, dst_off + len,
676 params->buf_size, dst_off + len,
677 PATTERN_DST, false);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700678
679 if (error_count) {
Dan Williams872f05c2013-11-06 16:29:58 -0800680 result("data error", total_tests, src_off, dst_off,
681 len, error_count);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700682 failed_tests++;
683 } else {
Dan Williams50137a72013-11-08 12:26:26 -0800684 verbose_result("test passed", total_tests, src_off,
685 dst_off, len, 0);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700686 }
687 }
Dan Williams86727442013-11-06 16:30:07 -0800688 runtime = ktime_us_delta(ktime_get(), ktime);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700689
690 ret = 0;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700691 for (i = 0; thread->dsts[i]; i++)
692 kfree(thread->dsts[i]);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700693err_dstbuf:
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700694 kfree(thread->dsts);
695err_dsts:
696 for (i = 0; thread->srcs[i]; i++)
697 kfree(thread->srcs[i]);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700698err_srcbuf:
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700699 kfree(thread->srcs);
700err_srcs:
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200701 kfree(pq_coefs);
702err_thread_type:
Dan Williams86727442013-11-06 16:30:07 -0800703 pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
704 current->comm, total_tests, failed_tests,
705 dmatest_persec(runtime, total_tests),
706 dmatest_KBs(runtime, total_len), ret);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200707
Viresh Kumar9704efa2011-07-29 16:21:57 +0530708 /* terminate all transfers on specified channels */
Shiraz Hashim5e034f72012-11-09 15:26:29 +0000709 if (ret)
710 dmaengine_terminate_all(chan);
711
Andy Shevchenko3e5ccd82013-03-04 11:09:31 +0200712 thread->done = true;
Dan Williams2d88ce72013-11-06 16:30:09 -0800713 wake_up(&thread_wait);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200714
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700715 return ret;
716}
717
718static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
719{
720 struct dmatest_thread *thread;
721 struct dmatest_thread *_thread;
722 int ret;
723
724 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
725 ret = kthread_stop(thread->task);
Dan Williams0adff802013-11-06 16:30:00 -0800726 pr_debug("thread %s exited with status %d\n",
727 thread->task->comm, ret);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700728 list_del(&thread->node);
Dan Williams2d88ce72013-11-06 16:30:09 -0800729 put_task_struct(thread->task);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700730 kfree(thread);
731 }
Viresh Kumar9704efa2011-07-29 16:21:57 +0530732
733 /* terminate all transfers on specified channels */
Jon Mason944ea4d2012-11-11 23:03:20 +0000734 dmaengine_terminate_all(dtc->chan);
Viresh Kumar9704efa2011-07-29 16:21:57 +0530735
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700736 kfree(dtc);
737}
738
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200739static int dmatest_add_threads(struct dmatest_info *info,
740 struct dmatest_chan *dtc, enum dma_transaction_type type)
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700741{
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200742 struct dmatest_params *params = &info->params;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700743 struct dmatest_thread *thread;
744 struct dma_chan *chan = dtc->chan;
745 char *op;
746 unsigned int i;
747
748 if (type == DMA_MEMCPY)
749 op = "copy";
750 else if (type == DMA_XOR)
751 op = "xor";
Dan Williams58691d62009-08-29 19:09:27 -0700752 else if (type == DMA_PQ)
753 op = "pq";
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700754 else
755 return -EINVAL;
756
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200757 for (i = 0; i < params->threads_per_chan; i++) {
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700758 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
759 if (!thread) {
Dan Williams0adff802013-11-06 16:30:00 -0800760 pr_warn("No memory for %s-%s%u\n",
761 dma_chan_name(chan), op, i);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700762 break;
763 }
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200764 thread->info = info;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700765 thread->chan = dtc->chan;
766 thread->type = type;
767 smp_wmb();
Dan Williams2d88ce72013-11-06 16:30:09 -0800768 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700769 dma_chan_name(chan), op, i);
770 if (IS_ERR(thread->task)) {
Dan Williams2d88ce72013-11-06 16:30:09 -0800771 pr_warn("Failed to create thread %s-%s%u\n",
Dan Williams0adff802013-11-06 16:30:00 -0800772 dma_chan_name(chan), op, i);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700773 kfree(thread);
774 break;
775 }
776
777 /* srcbuf and dstbuf are allocated by the thread itself */
Dan Williams2d88ce72013-11-06 16:30:09 -0800778 get_task_struct(thread->task);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700779 list_add_tail(&thread->node, &dtc->threads);
Dan Williams2d88ce72013-11-06 16:30:09 -0800780 wake_up_process(thread->task);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700781 }
782
783 return i;
784}
785
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200786static int dmatest_add_channel(struct dmatest_info *info,
787 struct dma_chan *chan)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700788{
789 struct dmatest_chan *dtc;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700790 struct dma_device *dma_dev = chan->device;
791 unsigned int thread_count = 0;
Kulikov Vasiliyb9033e62010-07-17 19:19:48 +0400792 int cnt;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700793
Andrew Morton6fdb8bd2008-09-19 04:16:23 -0700794 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700795 if (!dtc) {
Dan Williams0adff802013-11-06 16:30:00 -0800796 pr_warn("No memory for %s\n", dma_chan_name(chan));
Dan Williams33df8ca2009-01-06 11:38:15 -0700797 return -ENOMEM;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700798 }
799
800 dtc->chan = chan;
801 INIT_LIST_HEAD(&dtc->threads);
802
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700803 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200804 cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
Nicolas Ferref1aef8b2009-07-06 18:19:44 +0200805 thread_count += cnt > 0 ? cnt : 0;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700806 }
807 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200808 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
Nicolas Ferref1aef8b2009-07-06 18:19:44 +0200809 thread_count += cnt > 0 ? cnt : 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700810 }
Dan Williams58691d62009-08-29 19:09:27 -0700811 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200812 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
Dr. David Alan Gilbertd07a74a2011-08-25 16:13:55 -0700813 thread_count += cnt > 0 ? cnt : 0;
Dan Williams58691d62009-08-29 19:09:27 -0700814 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700815
Dan Williams0adff802013-11-06 16:30:00 -0800816 pr_info("Started %u threads using %s\n",
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700817 thread_count, dma_chan_name(chan));
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700818
Andy Shevchenko838cc702013-03-04 11:09:28 +0200819 list_add_tail(&dtc->node, &info->channels);
820 info->nr_channels++;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700821
Dan Williams33df8ca2009-01-06 11:38:15 -0700822 return 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700823}
824
Dan Williams7dd60252009-01-06 11:38:19 -0700825static bool filter(struct dma_chan *chan, void *param)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700826{
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200827 struct dmatest_params *params = param;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200828
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200829 if (!dmatest_match_channel(params, chan) ||
830 !dmatest_match_device(params, chan->device))
Dan Williams7dd60252009-01-06 11:38:19 -0700831 return false;
Dan Williams33df8ca2009-01-06 11:38:15 -0700832 else
Dan Williams7dd60252009-01-06 11:38:19 -0700833 return true;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700834}
835
Dan Williamsa9e55492013-11-06 16:30:02 -0800836static void request_channels(struct dmatest_info *info,
837 enum dma_transaction_type type)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700838{
Dan Williams33df8ca2009-01-06 11:38:15 -0700839 dma_cap_mask_t mask;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700840
Dan Williams33df8ca2009-01-06 11:38:15 -0700841 dma_cap_zero(mask);
Dan Williamsa9e55492013-11-06 16:30:02 -0800842 dma_cap_set(type, mask);
Dan Williams33df8ca2009-01-06 11:38:15 -0700843 for (;;) {
Dan Williamsa9e55492013-11-06 16:30:02 -0800844 struct dmatest_params *params = &info->params;
845 struct dma_chan *chan;
846
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200847 chan = dma_request_channel(mask, filter, params);
Dan Williams33df8ca2009-01-06 11:38:15 -0700848 if (chan) {
Dan Williamsa9e55492013-11-06 16:30:02 -0800849 if (dmatest_add_channel(info, chan)) {
Dan Williams33df8ca2009-01-06 11:38:15 -0700850 dma_release_channel(chan);
851 break; /* add_channel failed, punt */
852 }
853 } else
854 break; /* no more channels available */
Andy Shevchenko15b8a8e2013-03-04 11:09:29 +0200855 if (params->max_channels &&
856 info->nr_channels >= params->max_channels)
Dan Williams33df8ca2009-01-06 11:38:15 -0700857 break; /* we have all we need */
858 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700859}
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700860
Dan Williamsa9e55492013-11-06 16:30:02 -0800861static void run_threaded_test(struct dmatest_info *info)
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200862{
863 struct dmatest_params *params = &info->params;
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200864
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200865 /* Copy test parameters */
Andy Shevchenkoa6c268d2013-07-23 18:36:46 +0300866 params->buf_size = test_buf_size;
867 strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
868 strlcpy(params->device, strim(test_device), sizeof(params->device));
869 params->threads_per_chan = threads_per_chan;
870 params->max_channels = max_channels;
871 params->iterations = iterations;
872 params->xor_sources = xor_sources;
873 params->pq_sources = pq_sources;
874 params->timeout = timeout;
Dan Williamse3b9c342013-11-06 16:30:05 -0800875 params->noverify = noverify;
Dan Williamsa310d032013-11-06 16:30:01 -0800876
Dan Williamsa9e55492013-11-06 16:30:02 -0800877 request_channels(info, DMA_MEMCPY);
878 request_channels(info, DMA_XOR);
879 request_channels(info, DMA_PQ);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700880}
881
Dan Williamsa310d032013-11-06 16:30:01 -0800882static void stop_threaded_test(struct dmatest_info *info)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700883{
884 struct dmatest_chan *dtc, *_dtc;
885 struct dma_chan *chan;
886
887 list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
888 list_del(&dtc->node);
889 chan = dtc->chan;
890 dmatest_cleanup_channel(dtc);
Dan Williams0adff802013-11-06 16:30:00 -0800891 pr_debug("dropped channel %s\n", dma_chan_name(chan));
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200892 dma_release_channel(chan);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700893 }
Dan Williams33df8ca2009-01-06 11:38:15 -0700894
Dan Williams7cbd4872009-03-04 16:06:03 -0700895 info->nr_channels = 0;
Dan Williams33df8ca2009-01-06 11:38:15 -0700896}
Andy Shevchenko838cc702013-03-04 11:09:28 +0200897
Dan Williamsa9e55492013-11-06 16:30:02 -0800898static void restart_threaded_test(struct dmatest_info *info, bool run)
Dan Williams7cbd4872009-03-04 16:06:03 -0700899{
Dan Williamsa310d032013-11-06 16:30:01 -0800900 /* we might be called early to set run=, defer running until all
901 * parameters have been evaluated
902 */
903 if (!info->did_init)
Dan Williamsa9e55492013-11-06 16:30:02 -0800904 return;
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200905
Dan Williamsa310d032013-11-06 16:30:01 -0800906 /* Stop any running test first */
907 stop_threaded_test(info);
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200908
909 /* Run test with new parameters */
Dan Williamsa9e55492013-11-06 16:30:02 -0800910 run_threaded_test(info);
Andy Shevchenkobcc567e2013-05-23 14:29:53 +0300911}
912
Dan Williamsa310d032013-11-06 16:30:01 -0800913static int dmatest_run_get(char *val, const struct kernel_param *kp)
Andy Shevchenkobcc567e2013-05-23 14:29:53 +0300914{
Dan Williamsa310d032013-11-06 16:30:01 -0800915 struct dmatest_info *info = &test_info;
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200916
917 mutex_lock(&info->lock);
Dan Williamsa310d032013-11-06 16:30:01 -0800918 if (is_threaded_test_run(info)) {
919 dmatest_run = true;
Andy Shevchenko3e5ccd82013-03-04 11:09:31 +0200920 } else {
Dan Williamsa310d032013-11-06 16:30:01 -0800921 stop_threaded_test(info);
922 dmatest_run = false;
Andy Shevchenko3e5ccd82013-03-04 11:09:31 +0200923 }
Dan Williamsa310d032013-11-06 16:30:01 -0800924 mutex_unlock(&info->lock);
925
926 return param_get_bool(val, kp);
927}
928
929static int dmatest_run_set(const char *val, const struct kernel_param *kp)
930{
931 struct dmatest_info *info = &test_info;
932 int ret;
933
934 mutex_lock(&info->lock);
935 ret = param_set_bool(val, kp);
936 if (ret) {
937 mutex_unlock(&info->lock);
938 return ret;
939 }
940
941 if (is_threaded_test_run(info))
942 ret = -EBUSY;
943 else if (dmatest_run)
Dan Williamsa9e55492013-11-06 16:30:02 -0800944 restart_threaded_test(info, dmatest_run);
Andy Shevchenko3e5ccd82013-03-04 11:09:31 +0200945
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200946 mutex_unlock(&info->lock);
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200947
Dan Williamsa310d032013-11-06 16:30:01 -0800948 return ret;
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200949}
950
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200951static int __init dmatest_init(void)
952{
953 struct dmatest_info *info = &test_info;
Dan Williams2d88ce72013-11-06 16:30:09 -0800954 struct dmatest_params *params = &info->params;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200955
Dan Williamsa310d032013-11-06 16:30:01 -0800956 if (dmatest_run) {
957 mutex_lock(&info->lock);
Dan Williamsa9e55492013-11-06 16:30:02 -0800958 run_threaded_test(info);
Dan Williamsa310d032013-11-06 16:30:01 -0800959 mutex_unlock(&info->lock);
960 }
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200961
Dan Williams2d88ce72013-11-06 16:30:09 -0800962 if (params->iterations && wait)
963 wait_event(thread_wait, !is_threaded_test_run(info));
Andy Shevchenko838cc702013-03-04 11:09:28 +0200964
Dan Williamsa310d032013-11-06 16:30:01 -0800965 /* module parameters are stable, inittime tests are started,
966 * let userspace take over 'run' control
967 */
968 info->did_init = true;
Andy Shevchenko95019c82013-03-04 11:09:33 +0200969
Andy Shevchenko851b7e12013-03-04 11:09:30 +0200970 return 0;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200971}
972/* when compiled-in wait for drivers to load first */
973late_initcall(dmatest_init);
974
975static void __exit dmatest_exit(void)
976{
977 struct dmatest_info *info = &test_info;
978
Dan Williamsa310d032013-11-06 16:30:01 -0800979 mutex_lock(&info->lock);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200980 stop_threaded_test(info);
Dan Williamsa310d032013-11-06 16:30:01 -0800981 mutex_unlock(&info->lock);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200982}
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700983module_exit(dmatest_exit);
984
Jean Delvaree05503e2011-05-18 16:49:24 +0200985MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700986MODULE_LICENSE("GPL v2");