blob: 24225f0fdcd85f93d5feccae6d935e1563a679fb [file] [log] [blame]
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -07001/*
2 * DMA Engine test module
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/delay.h>
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +000011#include <linux/dma-mapping.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070012#include <linux/dmaengine.h>
Guennadi Liakhovetski981ed702011-08-18 16:50:51 +020013#include <linux/freezer.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070014#include <linux/init.h>
15#include <linux/kthread.h>
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/random.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070020#include <linux/wait.h>
21
22static unsigned int test_buf_size = 16384;
23module_param(test_buf_size, uint, S_IRUGO);
24MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
25
Kay Sievers06190d82008-11-11 13:12:33 -070026static char test_channel[20];
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070027module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
28MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
29
Kay Sievers06190d82008-11-11 13:12:33 -070030static char test_device[20];
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070031module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
32MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
33
34static unsigned int threads_per_chan = 1;
35module_param(threads_per_chan, uint, S_IRUGO);
36MODULE_PARM_DESC(threads_per_chan,
37 "Number of threads to start per channel (default: 1)");
38
39static unsigned int max_channels;
40module_param(max_channels, uint, S_IRUGO);
Dan Williams33df8ca2009-01-06 11:38:15 -070041MODULE_PARM_DESC(max_channels,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070042 "Maximum number of channels to use (default: all)");
43
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +020044static unsigned int iterations;
45module_param(iterations, uint, S_IRUGO);
46MODULE_PARM_DESC(iterations,
47 "Iterations before stopping test (default: infinite)");
48
Dan Williamsb54d5cb2009-03-25 09:13:25 -070049static unsigned int xor_sources = 3;
50module_param(xor_sources, uint, S_IRUGO);
51MODULE_PARM_DESC(xor_sources,
52 "Number of xor source buffers (default: 3)");
53
Dan Williams58691d62009-08-29 19:09:27 -070054static unsigned int pq_sources = 3;
55module_param(pq_sources, uint, S_IRUGO);
56MODULE_PARM_DESC(pq_sources,
57 "Number of p+q source buffers (default: 3)");
58
Viresh Kumard42efe62011-03-22 17:27:25 +053059static int timeout = 3000;
60module_param(timeout, uint, S_IRUGO);
Joe Perches85ee7a12011-04-23 20:38:19 -070061MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
62 "Pass -1 for infinite timeout");
Viresh Kumard42efe62011-03-22 17:27:25 +053063
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070064/*
65 * Initialization patterns. All bytes in the source buffer has bit 7
66 * set, all bytes in the destination buffer has bit 7 cleared.
67 *
68 * Bit 6 is set for all bytes which are to be copied by the DMA
69 * engine. Bit 5 is set for all bytes which are to be overwritten by
70 * the DMA engine.
71 *
72 * The remaining bits are the inverse of a counter which increments by
73 * one for each byte address.
74 */
75#define PATTERN_SRC 0x80
76#define PATTERN_DST 0x00
77#define PATTERN_COPY 0x40
78#define PATTERN_OVERWRITE 0x20
79#define PATTERN_COUNT_MASK 0x1f
80
81struct dmatest_thread {
82 struct list_head node;
83 struct task_struct *task;
84 struct dma_chan *chan;
Dan Williamsb54d5cb2009-03-25 09:13:25 -070085 u8 **srcs;
86 u8 **dsts;
87 enum dma_transaction_type type;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070088};
89
90struct dmatest_chan {
91 struct list_head node;
92 struct dma_chan *chan;
93 struct list_head threads;
94};
95
96/*
97 * These are protected by dma_list_mutex since they're only used by
Dan Williams33df8ca2009-01-06 11:38:15 -070098 * the DMA filter function callback
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070099 */
100static LIST_HEAD(dmatest_channels);
101static unsigned int nr_channels;
102
103static bool dmatest_match_channel(struct dma_chan *chan)
104{
105 if (test_channel[0] == '\0')
106 return true;
Dan Williams41d5e592009-01-06 11:38:21 -0700107 return strcmp(dma_chan_name(chan), test_channel) == 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700108}
109
110static bool dmatest_match_device(struct dma_device *device)
111{
112 if (test_device[0] == '\0')
113 return true;
Kay Sievers06190d82008-11-11 13:12:33 -0700114 return strcmp(dev_name(device->dev), test_device) == 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700115}
116
117static unsigned long dmatest_random(void)
118{
119 unsigned long buf;
120
121 get_random_bytes(&buf, sizeof(buf));
122 return buf;
123}
124
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700125static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700126{
127 unsigned int i;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700128 u8 *buf;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700129
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700130 for (; (buf = *bufs); bufs++) {
131 for (i = 0; i < start; i++)
132 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
133 for ( ; i < start + len; i++)
134 buf[i] = PATTERN_SRC | PATTERN_COPY
Joe Perchesc0198942009-06-28 09:26:21 -0700135 | (~i & PATTERN_COUNT_MASK);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700136 for ( ; i < test_buf_size; i++)
137 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
138 buf++;
139 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700140}
141
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700142static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700143{
144 unsigned int i;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700145 u8 *buf;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700146
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700147 for (; (buf = *bufs); bufs++) {
148 for (i = 0; i < start; i++)
149 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
150 for ( ; i < start + len; i++)
151 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
152 | (~i & PATTERN_COUNT_MASK);
153 for ( ; i < test_buf_size; i++)
154 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
155 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700156}
157
158static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
159 unsigned int counter, bool is_srcbuf)
160{
161 u8 diff = actual ^ pattern;
162 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
163 const char *thread_name = current->comm;
164
165 if (is_srcbuf)
166 pr_warning("%s: srcbuf[0x%x] overwritten!"
167 " Expected %02x, got %02x\n",
168 thread_name, index, expected, actual);
169 else if ((pattern & PATTERN_COPY)
170 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
171 pr_warning("%s: dstbuf[0x%x] not copied!"
172 " Expected %02x, got %02x\n",
173 thread_name, index, expected, actual);
174 else if (diff & PATTERN_SRC)
175 pr_warning("%s: dstbuf[0x%x] was copied!"
176 " Expected %02x, got %02x\n",
177 thread_name, index, expected, actual);
178 else
179 pr_warning("%s: dstbuf[0x%x] mismatch!"
180 " Expected %02x, got %02x\n",
181 thread_name, index, expected, actual);
182}
183
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700184static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700185 unsigned int end, unsigned int counter, u8 pattern,
186 bool is_srcbuf)
187{
188 unsigned int i;
189 unsigned int error_count = 0;
190 u8 actual;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700191 u8 expected;
192 u8 *buf;
193 unsigned int counter_orig = counter;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700194
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700195 for (; (buf = *bufs); bufs++) {
196 counter = counter_orig;
197 for (i = start; i < end; i++) {
198 actual = buf[i];
199 expected = pattern | (~counter & PATTERN_COUNT_MASK);
200 if (actual != expected) {
201 if (error_count < 32)
202 dmatest_mismatch(actual, pattern, i,
203 counter, is_srcbuf);
204 error_count++;
205 }
206 counter++;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700207 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700208 }
209
210 if (error_count > 32)
211 pr_warning("%s: %u errors suppressed\n",
212 current->comm, error_count - 32);
213
214 return error_count;
215}
216
Tejun Heoadfa5432011-11-23 09:28:16 -0800217/* poor man's completion - we want to use wait_event_freezable() on it */
218struct dmatest_done {
219 bool done;
220 wait_queue_head_t *wait;
221};
222
223static void dmatest_callback(void *arg)
Dan Williamse44e0aa2009-03-25 09:13:25 -0700224{
Tejun Heoadfa5432011-11-23 09:28:16 -0800225 struct dmatest_done *done = arg;
226
227 done->done = true;
228 wake_up_all(done->wait);
Dan Williamse44e0aa2009-03-25 09:13:25 -0700229}
230
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700231/*
232 * This function repeatedly tests DMA transfers of various lengths and
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700233 * offsets for a given operation type until it is told to exit by
234 * kthread_stop(). There may be multiple threads running this function
235 * in parallel for a single channel, and there may be multiple channels
236 * being tested in parallel.
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700237 *
238 * Before each test, the source and destination buffer is initialized
239 * with a known pattern. This pattern is different depending on
240 * whether it's in an area which is supposed to be copied or
241 * overwritten, and different in the source and destination buffers.
242 * So if the DMA engine doesn't copy exactly what we tell it to copy,
243 * we'll notice.
244 */
245static int dmatest_func(void *data)
246{
Tejun Heoadfa5432011-11-23 09:28:16 -0800247 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700248 struct dmatest_thread *thread = data;
Tejun Heoadfa5432011-11-23 09:28:16 -0800249 struct dmatest_done done = { .wait = &done_wait };
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700250 struct dma_chan *chan;
251 const char *thread_name;
252 unsigned int src_off, dst_off, len;
253 unsigned int error_count;
254 unsigned int failed_tests = 0;
255 unsigned int total_tests = 0;
256 dma_cookie_t cookie;
257 enum dma_status status;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700258 enum dma_ctrl_flags flags;
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100259 u8 pq_coefs[pq_sources + 1];
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700260 int ret;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700261 int src_cnt;
262 int dst_cnt;
263 int i;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700264
265 thread_name = current->comm;
Tejun Heoadfa5432011-11-23 09:28:16 -0800266 set_freezable();
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700267
268 ret = -ENOMEM;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700269
270 smp_rmb();
271 chan = thread->chan;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700272 if (thread->type == DMA_MEMCPY)
273 src_cnt = dst_cnt = 1;
274 else if (thread->type == DMA_XOR) {
275 src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
276 dst_cnt = 1;
Dan Williams58691d62009-08-29 19:09:27 -0700277 } else if (thread->type == DMA_PQ) {
278 src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
279 dst_cnt = 2;
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100280 for (i = 0; i < src_cnt; i++)
Dan Williams58691d62009-08-29 19:09:27 -0700281 pq_coefs[i] = 1;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700282 } else
283 goto err_srcs;
284
285 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
286 if (!thread->srcs)
287 goto err_srcs;
288 for (i = 0; i < src_cnt; i++) {
289 thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
290 if (!thread->srcs[i])
291 goto err_srcbuf;
292 }
293 thread->srcs[i] = NULL;
294
295 thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
296 if (!thread->dsts)
297 goto err_dsts;
298 for (i = 0; i < dst_cnt; i++) {
299 thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
300 if (!thread->dsts[i])
301 goto err_dstbuf;
302 }
303 thread->dsts[i] = NULL;
304
Dan Williamse44e0aa2009-03-25 09:13:25 -0700305 set_user_nice(current, 10);
306
Ira Snyderb203bd32011-03-03 07:54:53 +0000307 /*
308 * src buffers are freed by the DMAEngine code with dma_unmap_single()
309 * dst buffers are freed by ourselves below
310 */
311 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT
312 | DMA_COMPL_SKIP_DEST_UNMAP | DMA_COMPL_SRC_UNMAP_SINGLE;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700313
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200314 while (!kthread_should_stop()
315 && !(iterations && total_tests >= iterations)) {
Atsushi Nemotod86be862009-01-13 09:22:20 -0700316 struct dma_device *dev = chan->device;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700317 struct dma_async_tx_descriptor *tx = NULL;
318 dma_addr_t dma_srcs[src_cnt];
319 dma_addr_t dma_dsts[dst_cnt];
Dan Williams83544ae2009-09-08 17:42:53 -0700320 u8 align = 0;
Atsushi Nemotod86be862009-01-13 09:22:20 -0700321
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700322 total_tests++;
323
Dan Williams83544ae2009-09-08 17:42:53 -0700324 /* honor alignment restrictions */
325 if (thread->type == DMA_MEMCPY)
326 align = dev->copy_align;
327 else if (thread->type == DMA_XOR)
328 align = dev->xor_align;
329 else if (thread->type == DMA_PQ)
330 align = dev->pq_align;
331
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100332 if (1 << align > test_buf_size) {
333 pr_err("%u-byte buffer too small for %d-byte alignment\n",
334 test_buf_size, 1 << align);
335 break;
336 }
337
338 len = dmatest_random() % test_buf_size + 1;
Dan Williams83544ae2009-09-08 17:42:53 -0700339 len = (len >> align) << align;
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100340 if (!len)
341 len = 1 << align;
342 src_off = dmatest_random() % (test_buf_size - len + 1);
343 dst_off = dmatest_random() % (test_buf_size - len + 1);
344
Dan Williams83544ae2009-09-08 17:42:53 -0700345 src_off = (src_off >> align) << align;
346 dst_off = (dst_off >> align) << align;
347
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700348 dmatest_init_srcs(thread->srcs, src_off, len);
349 dmatest_init_dsts(thread->dsts, dst_off, len);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700350
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700351 for (i = 0; i < src_cnt; i++) {
352 u8 *buf = thread->srcs[i] + src_off;
353
354 dma_srcs[i] = dma_map_single(dev->dev, buf, len,
355 DMA_TO_DEVICE);
356 }
Atsushi Nemotod86be862009-01-13 09:22:20 -0700357 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700358 for (i = 0; i < dst_cnt; i++) {
359 dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
360 test_buf_size,
361 DMA_BIDIRECTIONAL);
362 }
Atsushi Nemotod86be862009-01-13 09:22:20 -0700363
Dan Williams83544ae2009-09-08 17:42:53 -0700364
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700365 if (thread->type == DMA_MEMCPY)
366 tx = dev->device_prep_dma_memcpy(chan,
367 dma_dsts[0] + dst_off,
368 dma_srcs[0], len,
369 flags);
370 else if (thread->type == DMA_XOR)
371 tx = dev->device_prep_dma_xor(chan,
372 dma_dsts[0] + dst_off,
Dan Williams67b91242010-02-28 22:20:18 -0700373 dma_srcs, src_cnt,
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700374 len, flags);
Dan Williams58691d62009-08-29 19:09:27 -0700375 else if (thread->type == DMA_PQ) {
376 dma_addr_t dma_pq[dst_cnt];
377
378 for (i = 0; i < dst_cnt; i++)
379 dma_pq[i] = dma_dsts[i] + dst_off;
380 tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100381 src_cnt, pq_coefs,
Dan Williams58691d62009-08-29 19:09:27 -0700382 len, flags);
383 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700384
Atsushi Nemotod86be862009-01-13 09:22:20 -0700385 if (!tx) {
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700386 for (i = 0; i < src_cnt; i++)
387 dma_unmap_single(dev->dev, dma_srcs[i], len,
388 DMA_TO_DEVICE);
389 for (i = 0; i < dst_cnt; i++)
390 dma_unmap_single(dev->dev, dma_dsts[i],
391 test_buf_size,
392 DMA_BIDIRECTIONAL);
Atsushi Nemotod86be862009-01-13 09:22:20 -0700393 pr_warning("%s: #%u: prep error with src_off=0x%x "
394 "dst_off=0x%x len=0x%x\n",
395 thread_name, total_tests - 1,
396 src_off, dst_off, len);
397 msleep(100);
398 failed_tests++;
399 continue;
400 }
Dan Williamse44e0aa2009-03-25 09:13:25 -0700401
Tejun Heoadfa5432011-11-23 09:28:16 -0800402 done.done = false;
Dan Williamse44e0aa2009-03-25 09:13:25 -0700403 tx->callback = dmatest_callback;
Tejun Heoadfa5432011-11-23 09:28:16 -0800404 tx->callback_param = &done;
Atsushi Nemotod86be862009-01-13 09:22:20 -0700405 cookie = tx->tx_submit(tx);
406
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700407 if (dma_submit_error(cookie)) {
408 pr_warning("%s: #%u: submit error %d with src_off=0x%x "
409 "dst_off=0x%x len=0x%x\n",
410 thread_name, total_tests - 1, cookie,
411 src_off, dst_off, len);
412 msleep(100);
413 failed_tests++;
414 continue;
415 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700416 dma_async_issue_pending(chan);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700417
Tejun Heoadfa5432011-11-23 09:28:16 -0800418 wait_event_freezable_timeout(done_wait, done.done,
419 msecs_to_jiffies(timeout));
Guennadi Liakhovetski981ed702011-08-18 16:50:51 +0200420
Dan Williamse44e0aa2009-03-25 09:13:25 -0700421 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700422
Tejun Heoadfa5432011-11-23 09:28:16 -0800423 if (!done.done) {
424 /*
425 * We're leaving the timed out dma operation with
426 * dangling pointer to done_wait. To make this
427 * correct, we'll need to allocate wait_done for
428 * each test iteration and perform "who's gonna
429 * free it this time?" dancing. For now, just
430 * leave it dangling.
431 */
Dan Williamse44e0aa2009-03-25 09:13:25 -0700432 pr_warning("%s: #%u: test timed out\n",
433 thread_name, total_tests - 1);
434 failed_tests++;
435 continue;
436 } else if (status != DMA_SUCCESS) {
437 pr_warning("%s: #%u: got completion callback,"
438 " but status is \'%s\'\n",
439 thread_name, total_tests - 1,
440 status == DMA_ERROR ? "error" : "in progress");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700441 failed_tests++;
442 continue;
443 }
Dan Williamse44e0aa2009-03-25 09:13:25 -0700444
Atsushi Nemotod86be862009-01-13 09:22:20 -0700445 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700446 for (i = 0; i < dst_cnt; i++)
447 dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
448 DMA_BIDIRECTIONAL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700449
450 error_count = 0;
451
452 pr_debug("%s: verifying source buffer...\n", thread_name);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700453 error_count += dmatest_verify(thread->srcs, 0, src_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700454 0, PATTERN_SRC, true);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700455 error_count += dmatest_verify(thread->srcs, src_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700456 src_off + len, src_off,
457 PATTERN_SRC | PATTERN_COPY, true);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700458 error_count += dmatest_verify(thread->srcs, src_off + len,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700459 test_buf_size, src_off + len,
460 PATTERN_SRC, true);
461
462 pr_debug("%s: verifying dest buffer...\n",
463 thread->task->comm);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700464 error_count += dmatest_verify(thread->dsts, 0, dst_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700465 0, PATTERN_DST, false);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700466 error_count += dmatest_verify(thread->dsts, dst_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700467 dst_off + len, src_off,
468 PATTERN_SRC | PATTERN_COPY, false);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700469 error_count += dmatest_verify(thread->dsts, dst_off + len,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700470 test_buf_size, dst_off + len,
471 PATTERN_DST, false);
472
473 if (error_count) {
474 pr_warning("%s: #%u: %u errors with "
475 "src_off=0x%x dst_off=0x%x len=0x%x\n",
476 thread_name, total_tests - 1, error_count,
477 src_off, dst_off, len);
478 failed_tests++;
479 } else {
480 pr_debug("%s: #%u: No errors with "
481 "src_off=0x%x dst_off=0x%x len=0x%x\n",
482 thread_name, total_tests - 1,
483 src_off, dst_off, len);
484 }
485 }
486
487 ret = 0;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700488 for (i = 0; thread->dsts[i]; i++)
489 kfree(thread->dsts[i]);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700490err_dstbuf:
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700491 kfree(thread->dsts);
492err_dsts:
493 for (i = 0; thread->srcs[i]; i++)
494 kfree(thread->srcs[i]);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700495err_srcbuf:
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700496 kfree(thread->srcs);
497err_srcs:
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700498 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
499 thread_name, total_tests, failed_tests, ret);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200500
Viresh Kumar9704efa2011-07-29 16:21:57 +0530501 /* terminate all transfers on specified channels */
502 chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200503 if (iterations > 0)
504 while (!kthread_should_stop()) {
Yong Zhangb953df72010-02-05 21:52:37 +0800505 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200506 interruptible_sleep_on(&wait_dmatest_exit);
507 }
508
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700509 return ret;
510}
511
512static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
513{
514 struct dmatest_thread *thread;
515 struct dmatest_thread *_thread;
516 int ret;
517
518 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
519 ret = kthread_stop(thread->task);
520 pr_debug("dmatest: thread %s exited with status %d\n",
521 thread->task->comm, ret);
522 list_del(&thread->node);
523 kfree(thread);
524 }
Viresh Kumar9704efa2011-07-29 16:21:57 +0530525
526 /* terminate all transfers on specified channels */
527 dtc->chan->device->device_control(dtc->chan, DMA_TERMINATE_ALL, 0);
528
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700529 kfree(dtc);
530}
531
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700532static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
533{
534 struct dmatest_thread *thread;
535 struct dma_chan *chan = dtc->chan;
536 char *op;
537 unsigned int i;
538
539 if (type == DMA_MEMCPY)
540 op = "copy";
541 else if (type == DMA_XOR)
542 op = "xor";
Dan Williams58691d62009-08-29 19:09:27 -0700543 else if (type == DMA_PQ)
544 op = "pq";
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700545 else
546 return -EINVAL;
547
548 for (i = 0; i < threads_per_chan; i++) {
549 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
550 if (!thread) {
551 pr_warning("dmatest: No memory for %s-%s%u\n",
552 dma_chan_name(chan), op, i);
553
554 break;
555 }
556 thread->chan = dtc->chan;
557 thread->type = type;
558 smp_wmb();
559 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
560 dma_chan_name(chan), op, i);
561 if (IS_ERR(thread->task)) {
562 pr_warning("dmatest: Failed to run thread %s-%s%u\n",
563 dma_chan_name(chan), op, i);
564 kfree(thread);
565 break;
566 }
567
568 /* srcbuf and dstbuf are allocated by the thread itself */
569
570 list_add_tail(&thread->node, &dtc->threads);
571 }
572
573 return i;
574}
575
Dan Williams33df8ca2009-01-06 11:38:15 -0700576static int dmatest_add_channel(struct dma_chan *chan)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700577{
578 struct dmatest_chan *dtc;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700579 struct dma_device *dma_dev = chan->device;
580 unsigned int thread_count = 0;
Kulikov Vasiliyb9033e62010-07-17 19:19:48 +0400581 int cnt;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700582
Andrew Morton6fdb8bd2008-09-19 04:16:23 -0700583 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700584 if (!dtc) {
Dan Williams41d5e592009-01-06 11:38:21 -0700585 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
Dan Williams33df8ca2009-01-06 11:38:15 -0700586 return -ENOMEM;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700587 }
588
589 dtc->chan = chan;
590 INIT_LIST_HEAD(&dtc->threads);
591
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700592 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
593 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
Nicolas Ferref1aef8b2009-07-06 18:19:44 +0200594 thread_count += cnt > 0 ? cnt : 0;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700595 }
596 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
597 cnt = dmatest_add_threads(dtc, DMA_XOR);
Nicolas Ferref1aef8b2009-07-06 18:19:44 +0200598 thread_count += cnt > 0 ? cnt : 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700599 }
Dan Williams58691d62009-08-29 19:09:27 -0700600 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
601 cnt = dmatest_add_threads(dtc, DMA_PQ);
Dr. David Alan Gilbertd07a74a2011-08-25 16:13:55 -0700602 thread_count += cnt > 0 ? cnt : 0;
Dan Williams58691d62009-08-29 19:09:27 -0700603 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700604
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700605 pr_info("dmatest: Started %u threads using %s\n",
606 thread_count, dma_chan_name(chan));
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700607
608 list_add_tail(&dtc->node, &dmatest_channels);
609 nr_channels++;
610
Dan Williams33df8ca2009-01-06 11:38:15 -0700611 return 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700612}
613
Dan Williams7dd60252009-01-06 11:38:19 -0700614static bool filter(struct dma_chan *chan, void *param)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700615{
Dan Williams33df8ca2009-01-06 11:38:15 -0700616 if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
Dan Williams7dd60252009-01-06 11:38:19 -0700617 return false;
Dan Williams33df8ca2009-01-06 11:38:15 -0700618 else
Dan Williams7dd60252009-01-06 11:38:19 -0700619 return true;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700620}
621
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700622static int __init dmatest_init(void)
623{
Dan Williams33df8ca2009-01-06 11:38:15 -0700624 dma_cap_mask_t mask;
625 struct dma_chan *chan;
626 int err = 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700627
Dan Williams33df8ca2009-01-06 11:38:15 -0700628 dma_cap_zero(mask);
629 dma_cap_set(DMA_MEMCPY, mask);
630 for (;;) {
631 chan = dma_request_channel(mask, filter, NULL);
632 if (chan) {
633 err = dmatest_add_channel(chan);
Dan Williamsc56c81a2009-04-08 15:08:23 -0700634 if (err) {
Dan Williams33df8ca2009-01-06 11:38:15 -0700635 dma_release_channel(chan);
636 break; /* add_channel failed, punt */
637 }
638 } else
639 break; /* no more channels available */
640 if (max_channels && nr_channels >= max_channels)
641 break; /* we have all we need */
642 }
643
644 return err;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700645}
Dan Williams33df8ca2009-01-06 11:38:15 -0700646/* when compiled-in wait for drivers to load first */
647late_initcall(dmatest_init);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700648
649static void __exit dmatest_exit(void)
650{
Dan Williams33df8ca2009-01-06 11:38:15 -0700651 struct dmatest_chan *dtc, *_dtc;
Dan Williams7cbd4872009-03-04 16:06:03 -0700652 struct dma_chan *chan;
Dan Williams33df8ca2009-01-06 11:38:15 -0700653
654 list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
655 list_del(&dtc->node);
Dan Williams7cbd4872009-03-04 16:06:03 -0700656 chan = dtc->chan;
Dan Williams33df8ca2009-01-06 11:38:15 -0700657 dmatest_cleanup_channel(dtc);
658 pr_debug("dmatest: dropped channel %s\n",
Dan Williams7cbd4872009-03-04 16:06:03 -0700659 dma_chan_name(chan));
660 dma_release_channel(chan);
Dan Williams33df8ca2009-01-06 11:38:15 -0700661 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700662}
663module_exit(dmatest_exit);
664
Jean Delvaree05503e2011-05-18 16:49:24 +0200665MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700666MODULE_LICENSE("GPL v2");