Ben Dooks | 2c420fe | 2010-01-29 09:02:15 +0000 | [diff] [blame] | 1 | /* arch/arm/plat-samsung/include/plat/dma.h |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 2 | * |
Ben Dooks | ccae941 | 2009-11-13 22:54:14 +0000 | [diff] [blame] | 3 | * Copyright (C) 2003-2006 Simtec Electronics |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * Samsung S3C DMA support |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
Mark Brown | 8ca0686 | 2011-12-26 20:28:23 +0900 | [diff] [blame] | 13 | #ifndef __PLAT_DMA_H |
| 14 | #define __PLAT_DMA_H |
| 15 | |
Boojin Kim | 51ddf31 | 2011-09-02 09:44:44 +0900 | [diff] [blame] | 16 | #include <linux/dma-mapping.h> |
| 17 | |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 18 | enum s3c2410_dma_buffresult { |
| 19 | S3C2410_RES_OK, |
| 20 | S3C2410_RES_ERR, |
| 21 | S3C2410_RES_ABORT |
| 22 | }; |
| 23 | |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 24 | /* enum s3c2410_chan_op |
| 25 | * |
| 26 | * operation codes passed to the DMA code by the user, and also used |
| 27 | * to inform the current channel owner of any changes to the system state |
| 28 | */ |
| 29 | |
| 30 | enum s3c2410_chan_op { |
| 31 | S3C2410_DMAOP_START, |
| 32 | S3C2410_DMAOP_STOP, |
| 33 | S3C2410_DMAOP_PAUSE, |
| 34 | S3C2410_DMAOP_RESUME, |
| 35 | S3C2410_DMAOP_FLUSH, |
| 36 | S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ |
| 37 | S3C2410_DMAOP_STARTED, /* indicate channel started */ |
| 38 | }; |
| 39 | |
| 40 | struct s3c2410_dma_client { |
| 41 | char *name; |
| 42 | }; |
| 43 | |
| 44 | struct s3c2410_dma_chan; |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 45 | enum dma_ch; |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 46 | |
| 47 | /* s3c2410_dma_cbfn_t |
| 48 | * |
| 49 | * buffer callback routine type |
| 50 | */ |
| 51 | |
| 52 | typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, |
| 53 | void *buf, int size, |
| 54 | enum s3c2410_dma_buffresult result); |
| 55 | |
| 56 | typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, |
| 57 | enum s3c2410_chan_op ); |
| 58 | |
| 59 | |
| 60 | |
| 61 | /* s3c2410_dma_request |
| 62 | * |
| 63 | * request a dma channel exclusivley |
| 64 | */ |
| 65 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 66 | extern int s3c2410_dma_request(enum dma_ch channel, |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 67 | struct s3c2410_dma_client *, void *dev); |
| 68 | |
| 69 | |
| 70 | /* s3c2410_dma_ctrl |
| 71 | * |
| 72 | * change the state of the dma channel |
| 73 | */ |
| 74 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 75 | extern int s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op); |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 76 | |
| 77 | /* s3c2410_dma_setflags |
| 78 | * |
| 79 | * set the channel's flags to a given state |
| 80 | */ |
| 81 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 82 | extern int s3c2410_dma_setflags(enum dma_ch channel, |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 83 | unsigned int flags); |
| 84 | |
| 85 | /* s3c2410_dma_free |
| 86 | * |
| 87 | * free the dma channel (will also abort any outstanding operations) |
| 88 | */ |
| 89 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 90 | extern int s3c2410_dma_free(enum dma_ch channel, struct s3c2410_dma_client *); |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 91 | |
| 92 | /* s3c2410_dma_enqueue |
| 93 | * |
| 94 | * place the given buffer onto the queue of operations for the channel. |
| 95 | * The buffer must be allocated from dma coherent memory, or the Dcache/WB |
| 96 | * drained before the buffer is given to the DMA system. |
| 97 | */ |
| 98 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 99 | extern int s3c2410_dma_enqueue(enum dma_ch channel, void *id, |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 100 | dma_addr_t data, int size); |
| 101 | |
| 102 | /* s3c2410_dma_config |
| 103 | * |
| 104 | * configure the dma channel |
| 105 | */ |
| 106 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 107 | extern int s3c2410_dma_config(enum dma_ch channel, int xferunit); |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 108 | |
| 109 | /* s3c2410_dma_devconfig |
| 110 | * |
| 111 | * configure the device we're talking to |
| 112 | */ |
| 113 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 114 | extern int s3c2410_dma_devconfig(enum dma_ch channel, |
Boojin Kim | 51ddf31 | 2011-09-02 09:44:44 +0900 | [diff] [blame] | 115 | enum dma_data_direction source, unsigned long devaddr); |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 116 | |
| 117 | /* s3c2410_dma_getposition |
| 118 | * |
| 119 | * get the position that the dma transfer is currently at |
| 120 | */ |
| 121 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 122 | extern int s3c2410_dma_getposition(enum dma_ch channel, |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 123 | dma_addr_t *src, dma_addr_t *dest); |
| 124 | |
Sangwook Lee | d670ac0 | 2011-07-16 15:50:19 +0900 | [diff] [blame] | 125 | extern int s3c2410_dma_set_opfn(enum dma_ch, s3c2410_dma_opfn_t rtn); |
| 126 | extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn); |
Ben Dooks | c133c29 | 2009-03-19 15:02:37 +0000 | [diff] [blame] | 127 | |
Boojin Kim | c4e1662 | 2011-09-02 09:44:35 +0900 | [diff] [blame] | 128 | #include <plat/dma-ops.h> |
Mark Brown | 8ca0686 | 2011-12-26 20:28:23 +0900 | [diff] [blame] | 129 | |
| 130 | #endif |