Paul Gortmaker | eb008eb | 2016-07-13 20:19:01 -0400 | [diff] [blame] | 1 | #include <linux/module.h> |
| 2 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 3 | #include <asm/cpu_device_id.h> |
Dave Hansen | a07301a | 2016-06-02 17:19:42 -0700 | [diff] [blame] | 4 | #include <asm/intel-family.h> |
Borislav Petkov | 6bcb2db | 2016-02-10 10:55:15 +0100 | [diff] [blame] | 5 | #include "uncore.h" |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 6 | |
| 7 | static struct intel_uncore_type *empty_uncore[] = { NULL, }; |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 8 | struct intel_uncore_type **uncore_msr_uncores = empty_uncore; |
| 9 | struct intel_uncore_type **uncore_pci_uncores = empty_uncore; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 10 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 11 | static bool pcidrv_registered; |
| 12 | struct pci_driver *uncore_pci_driver; |
| 13 | /* pci bus to socket mapping */ |
Taku Izumi | 712df65 | 2015-09-24 21:10:21 +0900 | [diff] [blame] | 14 | DEFINE_RAW_SPINLOCK(pci2phy_map_lock); |
| 15 | struct list_head pci2phy_map_head = LIST_HEAD_INIT(pci2phy_map_head); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 16 | struct pci_extra_dev *uncore_extra_pci_dev; |
| 17 | static int max_packages; |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 18 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 19 | /* mask of cpus that collect uncore events */ |
| 20 | static cpumask_t uncore_cpu_mask; |
| 21 | |
| 22 | /* constraint for the fixed counter */ |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 23 | static struct event_constraint uncore_constraint_fixed = |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 24 | EVENT_CONSTRAINT(~0ULL, 1 << UNCORE_PMC_IDX_FIXED, ~0ULL); |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 25 | struct event_constraint uncore_constraint_empty = |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 26 | EVENT_CONSTRAINT(0, 0, 0); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 27 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 28 | MODULE_LICENSE("GPL"); |
| 29 | |
Thomas Gleixner | 1384c70 | 2016-02-22 22:19:13 +0000 | [diff] [blame] | 30 | static int uncore_pcibus_to_physid(struct pci_bus *bus) |
Taku Izumi | 712df65 | 2015-09-24 21:10:21 +0900 | [diff] [blame] | 31 | { |
| 32 | struct pci2phy_map *map; |
| 33 | int phys_id = -1; |
| 34 | |
| 35 | raw_spin_lock(&pci2phy_map_lock); |
| 36 | list_for_each_entry(map, &pci2phy_map_head, list) { |
| 37 | if (map->segment == pci_domain_nr(bus)) { |
| 38 | phys_id = map->pbus_to_physid[bus->number]; |
| 39 | break; |
| 40 | } |
| 41 | } |
| 42 | raw_spin_unlock(&pci2phy_map_lock); |
| 43 | |
| 44 | return phys_id; |
| 45 | } |
| 46 | |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 47 | static void uncore_free_pcibus_map(void) |
| 48 | { |
| 49 | struct pci2phy_map *map, *tmp; |
| 50 | |
| 51 | list_for_each_entry_safe(map, tmp, &pci2phy_map_head, list) { |
| 52 | list_del(&map->list); |
| 53 | kfree(map); |
| 54 | } |
| 55 | } |
| 56 | |
Taku Izumi | 712df65 | 2015-09-24 21:10:21 +0900 | [diff] [blame] | 57 | struct pci2phy_map *__find_pci2phy_map(int segment) |
| 58 | { |
| 59 | struct pci2phy_map *map, *alloc = NULL; |
| 60 | int i; |
| 61 | |
| 62 | lockdep_assert_held(&pci2phy_map_lock); |
| 63 | |
| 64 | lookup: |
| 65 | list_for_each_entry(map, &pci2phy_map_head, list) { |
| 66 | if (map->segment == segment) |
| 67 | goto end; |
| 68 | } |
| 69 | |
| 70 | if (!alloc) { |
| 71 | raw_spin_unlock(&pci2phy_map_lock); |
| 72 | alloc = kmalloc(sizeof(struct pci2phy_map), GFP_KERNEL); |
| 73 | raw_spin_lock(&pci2phy_map_lock); |
| 74 | |
| 75 | if (!alloc) |
| 76 | return NULL; |
| 77 | |
| 78 | goto lookup; |
| 79 | } |
| 80 | |
| 81 | map = alloc; |
| 82 | alloc = NULL; |
| 83 | map->segment = segment; |
| 84 | for (i = 0; i < 256; i++) |
| 85 | map->pbus_to_physid[i] = -1; |
| 86 | list_add_tail(&map->list, &pci2phy_map_head); |
| 87 | |
| 88 | end: |
| 89 | kfree(alloc); |
| 90 | return map; |
| 91 | } |
| 92 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 93 | ssize_t uncore_event_show(struct kobject *kobj, |
| 94 | struct kobj_attribute *attr, char *buf) |
| 95 | { |
| 96 | struct uncore_event_desc *event = |
| 97 | container_of(attr, struct uncore_event_desc, attr); |
| 98 | return sprintf(buf, "%s", event->config); |
| 99 | } |
| 100 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 101 | struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu) |
Stephane Eranian | 001e413 | 2014-02-11 16:20:11 +0100 | [diff] [blame] | 102 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 103 | return pmu->boxes[topology_logical_package_id(cpu)]; |
Stephane Eranian | 001e413 | 2014-02-11 16:20:11 +0100 | [diff] [blame] | 104 | } |
| 105 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 106 | u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event) |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 107 | { |
| 108 | u64 count; |
| 109 | |
| 110 | rdmsrl(event->hw.event_base, count); |
| 111 | |
| 112 | return count; |
| 113 | } |
| 114 | |
| 115 | /* |
| 116 | * generic get constraint function for shared match/mask registers. |
| 117 | */ |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 118 | struct event_constraint * |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 119 | uncore_get_constraint(struct intel_uncore_box *box, struct perf_event *event) |
| 120 | { |
| 121 | struct intel_uncore_extra_reg *er; |
| 122 | struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; |
| 123 | struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; |
| 124 | unsigned long flags; |
| 125 | bool ok = false; |
| 126 | |
| 127 | /* |
| 128 | * reg->alloc can be set due to existing state, so for fake box we |
| 129 | * need to ignore this, otherwise we might fail to allocate proper |
| 130 | * fake state for this extra reg constraint. |
| 131 | */ |
| 132 | if (reg1->idx == EXTRA_REG_NONE || |
| 133 | (!uncore_box_is_fake(box) && reg1->alloc)) |
| 134 | return NULL; |
| 135 | |
| 136 | er = &box->shared_regs[reg1->idx]; |
| 137 | raw_spin_lock_irqsave(&er->lock, flags); |
| 138 | if (!atomic_read(&er->ref) || |
| 139 | (er->config1 == reg1->config && er->config2 == reg2->config)) { |
| 140 | atomic_inc(&er->ref); |
| 141 | er->config1 = reg1->config; |
| 142 | er->config2 = reg2->config; |
| 143 | ok = true; |
| 144 | } |
| 145 | raw_spin_unlock_irqrestore(&er->lock, flags); |
| 146 | |
| 147 | if (ok) { |
| 148 | if (!uncore_box_is_fake(box)) |
| 149 | reg1->alloc = 1; |
| 150 | return NULL; |
| 151 | } |
| 152 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 153 | return &uncore_constraint_empty; |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 154 | } |
| 155 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 156 | void uncore_put_constraint(struct intel_uncore_box *box, struct perf_event *event) |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 157 | { |
| 158 | struct intel_uncore_extra_reg *er; |
| 159 | struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; |
| 160 | |
| 161 | /* |
| 162 | * Only put constraint if extra reg was actually allocated. Also |
| 163 | * takes care of event which do not use an extra shared reg. |
| 164 | * |
| 165 | * Also, if this is a fake box we shouldn't touch any event state |
| 166 | * (reg->alloc) and we don't care about leaving inconsistent box |
| 167 | * state either since it will be thrown out. |
| 168 | */ |
| 169 | if (uncore_box_is_fake(box) || !reg1->alloc) |
| 170 | return; |
| 171 | |
| 172 | er = &box->shared_regs[reg1->idx]; |
| 173 | atomic_dec(&er->ref); |
| 174 | reg1->alloc = 0; |
| 175 | } |
| 176 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 177 | u64 uncore_shared_reg_config(struct intel_uncore_box *box, int idx) |
Yan, Zheng | 46bdd90 | 2013-04-16 19:51:06 +0800 | [diff] [blame] | 178 | { |
| 179 | struct intel_uncore_extra_reg *er; |
| 180 | unsigned long flags; |
| 181 | u64 config; |
| 182 | |
| 183 | er = &box->shared_regs[idx]; |
| 184 | |
| 185 | raw_spin_lock_irqsave(&er->lock, flags); |
| 186 | config = er->config; |
| 187 | raw_spin_unlock_irqrestore(&er->lock, flags); |
| 188 | |
| 189 | return config; |
| 190 | } |
| 191 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 192 | static void uncore_assign_hw_event(struct intel_uncore_box *box, |
| 193 | struct perf_event *event, int idx) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 194 | { |
| 195 | struct hw_perf_event *hwc = &event->hw; |
| 196 | |
| 197 | hwc->idx = idx; |
| 198 | hwc->last_tag = ++box->tags[idx]; |
| 199 | |
| 200 | if (hwc->idx == UNCORE_PMC_IDX_FIXED) { |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 201 | hwc->event_base = uncore_fixed_ctr(box); |
| 202 | hwc->config_base = uncore_fixed_ctl(box); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 203 | return; |
| 204 | } |
| 205 | |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 206 | hwc->config_base = uncore_event_ctl(box, hwc->idx); |
| 207 | hwc->event_base = uncore_perf_ctr(box, hwc->idx); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 208 | } |
| 209 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 210 | void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *event) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 211 | { |
| 212 | u64 prev_count, new_count, delta; |
| 213 | int shift; |
| 214 | |
| 215 | if (event->hw.idx >= UNCORE_PMC_IDX_FIXED) |
| 216 | shift = 64 - uncore_fixed_ctr_bits(box); |
| 217 | else |
| 218 | shift = 64 - uncore_perf_ctr_bits(box); |
| 219 | |
| 220 | /* the hrtimer might modify the previous event value */ |
| 221 | again: |
| 222 | prev_count = local64_read(&event->hw.prev_count); |
| 223 | new_count = uncore_read_counter(box, event); |
| 224 | if (local64_xchg(&event->hw.prev_count, new_count) != prev_count) |
| 225 | goto again; |
| 226 | |
| 227 | delta = (new_count << shift) - (prev_count << shift); |
| 228 | delta >>= shift; |
| 229 | |
| 230 | local64_add(delta, &event->count); |
| 231 | } |
| 232 | |
| 233 | /* |
| 234 | * The overflow interrupt is unavailable for SandyBridge-EP, is broken |
| 235 | * for SandyBridge. So we use hrtimer to periodically poll the counter |
| 236 | * to avoid overflow. |
| 237 | */ |
| 238 | static enum hrtimer_restart uncore_pmu_hrtimer(struct hrtimer *hrtimer) |
| 239 | { |
| 240 | struct intel_uncore_box *box; |
Stephane Eranian | ced2efb | 2014-02-11 16:20:13 +0100 | [diff] [blame] | 241 | struct perf_event *event; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 242 | unsigned long flags; |
| 243 | int bit; |
| 244 | |
| 245 | box = container_of(hrtimer, struct intel_uncore_box, hrtimer); |
| 246 | if (!box->n_active || box->cpu != smp_processor_id()) |
| 247 | return HRTIMER_NORESTART; |
| 248 | /* |
| 249 | * disable local interrupt to prevent uncore_pmu_event_start/stop |
| 250 | * to interrupt the update process |
| 251 | */ |
| 252 | local_irq_save(flags); |
| 253 | |
Stephane Eranian | ced2efb | 2014-02-11 16:20:13 +0100 | [diff] [blame] | 254 | /* |
| 255 | * handle boxes with an active event list as opposed to active |
| 256 | * counters |
| 257 | */ |
| 258 | list_for_each_entry(event, &box->active_list, active_entry) { |
| 259 | uncore_perf_event_update(box, event); |
| 260 | } |
| 261 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 262 | for_each_set_bit(bit, box->active_mask, UNCORE_PMC_IDX_MAX) |
| 263 | uncore_perf_event_update(box, box->events[bit]); |
| 264 | |
| 265 | local_irq_restore(flags); |
| 266 | |
Stephane Eranian | 79859cc | 2014-02-11 16:20:10 +0100 | [diff] [blame] | 267 | hrtimer_forward_now(hrtimer, ns_to_ktime(box->hrtimer_duration)); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 268 | return HRTIMER_RESTART; |
| 269 | } |
| 270 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 271 | void uncore_pmu_start_hrtimer(struct intel_uncore_box *box) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 272 | { |
Thomas Gleixner | 576b070 | 2015-04-14 21:09:01 +0000 | [diff] [blame] | 273 | hrtimer_start(&box->hrtimer, ns_to_ktime(box->hrtimer_duration), |
| 274 | HRTIMER_MODE_REL_PINNED); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 275 | } |
| 276 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 277 | void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 278 | { |
| 279 | hrtimer_cancel(&box->hrtimer); |
| 280 | } |
| 281 | |
| 282 | static void uncore_pmu_init_hrtimer(struct intel_uncore_box *box) |
| 283 | { |
| 284 | hrtimer_init(&box->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
| 285 | box->hrtimer.function = uncore_pmu_hrtimer; |
| 286 | } |
| 287 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 288 | static struct intel_uncore_box *uncore_alloc_box(struct intel_uncore_type *type, |
| 289 | int node) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 290 | { |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 291 | int i, size, numshared = type->num_shared_regs ; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 292 | struct intel_uncore_box *box; |
| 293 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 294 | size = sizeof(*box) + numshared * sizeof(struct intel_uncore_extra_reg); |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 295 | |
Yan, Zheng | 73c4427 | 2013-09-17 14:48:13 +0800 | [diff] [blame] | 296 | box = kzalloc_node(size, GFP_KERNEL, node); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 297 | if (!box) |
| 298 | return NULL; |
| 299 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 300 | for (i = 0; i < numshared; i++) |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 301 | raw_spin_lock_init(&box->shared_regs[i].lock); |
| 302 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 303 | uncore_pmu_init_hrtimer(box); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 304 | box->cpu = -1; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 305 | box->pci_phys_id = -1; |
| 306 | box->pkgid = -1; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 307 | |
Stephane Eranian | 79859cc | 2014-02-11 16:20:10 +0100 | [diff] [blame] | 308 | /* set default hrtimer timeout */ |
| 309 | box->hrtimer_duration = UNCORE_PMU_HRTIMER_INTERVAL; |
| 310 | |
Stephane Eranian | ced2efb | 2014-02-11 16:20:13 +0100 | [diff] [blame] | 311 | INIT_LIST_HEAD(&box->active_list); |
| 312 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 313 | return box; |
| 314 | } |
| 315 | |
Jiri Olsa | af91568 | 2014-12-10 21:23:50 +0100 | [diff] [blame] | 316 | /* |
| 317 | * Using uncore_pmu_event_init pmu event_init callback |
| 318 | * as a detection point for uncore events. |
| 319 | */ |
| 320 | static int uncore_pmu_event_init(struct perf_event *event); |
| 321 | |
Peter Zijlstra | 033ac60 | 2016-11-18 13:53:54 +0100 | [diff] [blame] | 322 | static bool is_box_event(struct intel_uncore_box *box, struct perf_event *event) |
Jiri Olsa | af91568 | 2014-12-10 21:23:50 +0100 | [diff] [blame] | 323 | { |
Peter Zijlstra | 033ac60 | 2016-11-18 13:53:54 +0100 | [diff] [blame] | 324 | return &box->pmu->pmu == event->pmu; |
Jiri Olsa | af91568 | 2014-12-10 21:23:50 +0100 | [diff] [blame] | 325 | } |
| 326 | |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 327 | static int |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 328 | uncore_collect_events(struct intel_uncore_box *box, struct perf_event *leader, |
| 329 | bool dogrp) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 330 | { |
| 331 | struct perf_event *event; |
| 332 | int n, max_count; |
| 333 | |
| 334 | max_count = box->pmu->type->num_counters; |
| 335 | if (box->pmu->type->fixed_ctl) |
| 336 | max_count++; |
| 337 | |
| 338 | if (box->n_events >= max_count) |
| 339 | return -EINVAL; |
| 340 | |
| 341 | n = box->n_events; |
Jiri Olsa | af91568 | 2014-12-10 21:23:50 +0100 | [diff] [blame] | 342 | |
Peter Zijlstra | 033ac60 | 2016-11-18 13:53:54 +0100 | [diff] [blame] | 343 | if (is_box_event(box, leader)) { |
Jiri Olsa | af91568 | 2014-12-10 21:23:50 +0100 | [diff] [blame] | 344 | box->event_list[n] = leader; |
| 345 | n++; |
| 346 | } |
| 347 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 348 | if (!dogrp) |
| 349 | return n; |
| 350 | |
| 351 | list_for_each_entry(event, &leader->sibling_list, group_entry) { |
Peter Zijlstra | 033ac60 | 2016-11-18 13:53:54 +0100 | [diff] [blame] | 352 | if (!is_box_event(box, event) || |
Jiri Olsa | af91568 | 2014-12-10 21:23:50 +0100 | [diff] [blame] | 353 | event->state <= PERF_EVENT_STATE_OFF) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 354 | continue; |
| 355 | |
| 356 | if (n >= max_count) |
| 357 | return -EINVAL; |
| 358 | |
| 359 | box->event_list[n] = event; |
| 360 | n++; |
| 361 | } |
| 362 | return n; |
| 363 | } |
| 364 | |
| 365 | static struct event_constraint * |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 366 | uncore_get_event_constraint(struct intel_uncore_box *box, struct perf_event *event) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 367 | { |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 368 | struct intel_uncore_type *type = box->pmu->type; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 369 | struct event_constraint *c; |
| 370 | |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 371 | if (type->ops->get_constraint) { |
| 372 | c = type->ops->get_constraint(box, event); |
| 373 | if (c) |
| 374 | return c; |
| 375 | } |
| 376 | |
Stephane Eranian | dbc33f7 | 2013-09-09 12:53:50 -0700 | [diff] [blame] | 377 | if (event->attr.config == UNCORE_FIXED_EVENT) |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 378 | return &uncore_constraint_fixed; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 379 | |
| 380 | if (type->constraints) { |
| 381 | for_each_event_constraint(c, type->constraints) { |
| 382 | if ((event->hw.config & c->cmask) == c->code) |
| 383 | return c; |
| 384 | } |
| 385 | } |
| 386 | |
| 387 | return &type->unconstrainted; |
| 388 | } |
| 389 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 390 | static void uncore_put_event_constraint(struct intel_uncore_box *box, |
| 391 | struct perf_event *event) |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 392 | { |
| 393 | if (box->pmu->type->ops->put_constraint) |
| 394 | box->pmu->type->ops->put_constraint(box, event); |
| 395 | } |
| 396 | |
Yan, Zheng | 254298c | 2012-07-05 14:32:17 +0800 | [diff] [blame] | 397 | static int uncore_assign_events(struct intel_uncore_box *box, int assign[], int n) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 398 | { |
| 399 | unsigned long used_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)]; |
Andrew Hunter | 43b45780 | 2013-05-23 11:07:03 -0700 | [diff] [blame] | 400 | struct event_constraint *c; |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 401 | int i, wmin, wmax, ret = 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 402 | struct hw_perf_event *hwc; |
| 403 | |
| 404 | bitmap_zero(used_mask, UNCORE_PMC_IDX_MAX); |
| 405 | |
| 406 | for (i = 0, wmin = UNCORE_PMC_IDX_MAX, wmax = 0; i < n; i++) { |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 407 | c = uncore_get_event_constraint(box, box->event_list[i]); |
Peter Zijlstra | b371b59 | 2015-05-21 10:57:13 +0200 | [diff] [blame] | 408 | box->event_constraint[i] = c; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 409 | wmin = min(wmin, c->weight); |
| 410 | wmax = max(wmax, c->weight); |
| 411 | } |
| 412 | |
| 413 | /* fastpath, try to reuse previous register */ |
| 414 | for (i = 0; i < n; i++) { |
| 415 | hwc = &box->event_list[i]->hw; |
Peter Zijlstra | b371b59 | 2015-05-21 10:57:13 +0200 | [diff] [blame] | 416 | c = box->event_constraint[i]; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 417 | |
| 418 | /* never assigned */ |
| 419 | if (hwc->idx == -1) |
| 420 | break; |
| 421 | |
| 422 | /* constraint still honored */ |
| 423 | if (!test_bit(hwc->idx, c->idxmsk)) |
| 424 | break; |
| 425 | |
| 426 | /* not already used */ |
| 427 | if (test_bit(hwc->idx, used_mask)) |
| 428 | break; |
| 429 | |
| 430 | __set_bit(hwc->idx, used_mask); |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 431 | if (assign) |
| 432 | assign[i] = hwc->idx; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 433 | } |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 434 | /* slow path */ |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 435 | if (i != n) |
Peter Zijlstra | b371b59 | 2015-05-21 10:57:13 +0200 | [diff] [blame] | 436 | ret = perf_assign_events(box->event_constraint, n, |
Peter Zijlstra | cc1790c | 2015-05-21 10:57:17 +0200 | [diff] [blame] | 437 | wmin, wmax, n, assign); |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 438 | |
| 439 | if (!assign || ret) { |
| 440 | for (i = 0; i < n; i++) |
| 441 | uncore_put_event_constraint(box, box->event_list[i]); |
| 442 | } |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 443 | return ret ? -EINVAL : 0; |
| 444 | } |
| 445 | |
| 446 | static void uncore_pmu_event_start(struct perf_event *event, int flags) |
| 447 | { |
| 448 | struct intel_uncore_box *box = uncore_event_to_box(event); |
| 449 | int idx = event->hw.idx; |
| 450 | |
| 451 | if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED))) |
| 452 | return; |
| 453 | |
| 454 | if (WARN_ON_ONCE(idx == -1 || idx >= UNCORE_PMC_IDX_MAX)) |
| 455 | return; |
| 456 | |
| 457 | event->hw.state = 0; |
| 458 | box->events[idx] = event; |
| 459 | box->n_active++; |
| 460 | __set_bit(idx, box->active_mask); |
| 461 | |
| 462 | local64_set(&event->hw.prev_count, uncore_read_counter(box, event)); |
| 463 | uncore_enable_event(box, event); |
| 464 | |
| 465 | if (box->n_active == 1) { |
| 466 | uncore_enable_box(box); |
| 467 | uncore_pmu_start_hrtimer(box); |
| 468 | } |
| 469 | } |
| 470 | |
| 471 | static void uncore_pmu_event_stop(struct perf_event *event, int flags) |
| 472 | { |
| 473 | struct intel_uncore_box *box = uncore_event_to_box(event); |
| 474 | struct hw_perf_event *hwc = &event->hw; |
| 475 | |
| 476 | if (__test_and_clear_bit(hwc->idx, box->active_mask)) { |
| 477 | uncore_disable_event(box, event); |
| 478 | box->n_active--; |
| 479 | box->events[hwc->idx] = NULL; |
| 480 | WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED); |
| 481 | hwc->state |= PERF_HES_STOPPED; |
| 482 | |
| 483 | if (box->n_active == 0) { |
| 484 | uncore_disable_box(box); |
| 485 | uncore_pmu_cancel_hrtimer(box); |
| 486 | } |
| 487 | } |
| 488 | |
| 489 | if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) { |
| 490 | /* |
| 491 | * Drain the remaining delta count out of a event |
| 492 | * that we are disabling: |
| 493 | */ |
| 494 | uncore_perf_event_update(box, event); |
| 495 | hwc->state |= PERF_HES_UPTODATE; |
| 496 | } |
| 497 | } |
| 498 | |
| 499 | static int uncore_pmu_event_add(struct perf_event *event, int flags) |
| 500 | { |
| 501 | struct intel_uncore_box *box = uncore_event_to_box(event); |
| 502 | struct hw_perf_event *hwc = &event->hw; |
| 503 | int assign[UNCORE_PMC_IDX_MAX]; |
| 504 | int i, n, ret; |
| 505 | |
| 506 | if (!box) |
| 507 | return -ENODEV; |
| 508 | |
| 509 | ret = n = uncore_collect_events(box, event, false); |
| 510 | if (ret < 0) |
| 511 | return ret; |
| 512 | |
| 513 | hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED; |
| 514 | if (!(flags & PERF_EF_START)) |
| 515 | hwc->state |= PERF_HES_ARCH; |
| 516 | |
| 517 | ret = uncore_assign_events(box, assign, n); |
| 518 | if (ret) |
| 519 | return ret; |
| 520 | |
| 521 | /* save events moving to new counters */ |
| 522 | for (i = 0; i < box->n_events; i++) { |
| 523 | event = box->event_list[i]; |
| 524 | hwc = &event->hw; |
| 525 | |
| 526 | if (hwc->idx == assign[i] && |
| 527 | hwc->last_tag == box->tags[assign[i]]) |
| 528 | continue; |
| 529 | /* |
| 530 | * Ensure we don't accidentally enable a stopped |
| 531 | * counter simply because we rescheduled. |
| 532 | */ |
| 533 | if (hwc->state & PERF_HES_STOPPED) |
| 534 | hwc->state |= PERF_HES_ARCH; |
| 535 | |
| 536 | uncore_pmu_event_stop(event, PERF_EF_UPDATE); |
| 537 | } |
| 538 | |
| 539 | /* reprogram moved events into new counters */ |
| 540 | for (i = 0; i < n; i++) { |
| 541 | event = box->event_list[i]; |
| 542 | hwc = &event->hw; |
| 543 | |
| 544 | if (hwc->idx != assign[i] || |
| 545 | hwc->last_tag != box->tags[assign[i]]) |
| 546 | uncore_assign_hw_event(box, event, assign[i]); |
| 547 | else if (i < box->n_events) |
| 548 | continue; |
| 549 | |
| 550 | if (hwc->state & PERF_HES_ARCH) |
| 551 | continue; |
| 552 | |
| 553 | uncore_pmu_event_start(event, 0); |
| 554 | } |
| 555 | box->n_events = n; |
| 556 | |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | static void uncore_pmu_event_del(struct perf_event *event, int flags) |
| 561 | { |
| 562 | struct intel_uncore_box *box = uncore_event_to_box(event); |
| 563 | int i; |
| 564 | |
| 565 | uncore_pmu_event_stop(event, PERF_EF_UPDATE); |
| 566 | |
| 567 | for (i = 0; i < box->n_events; i++) { |
| 568 | if (event == box->event_list[i]) { |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 569 | uncore_put_event_constraint(box, event); |
| 570 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 571 | for (++i; i < box->n_events; i++) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 572 | box->event_list[i - 1] = box->event_list[i]; |
| 573 | |
| 574 | --box->n_events; |
| 575 | break; |
| 576 | } |
| 577 | } |
| 578 | |
| 579 | event->hw.idx = -1; |
| 580 | event->hw.last_tag = ~0ULL; |
| 581 | } |
| 582 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 583 | void uncore_pmu_event_read(struct perf_event *event) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 584 | { |
| 585 | struct intel_uncore_box *box = uncore_event_to_box(event); |
| 586 | uncore_perf_event_update(box, event); |
| 587 | } |
| 588 | |
| 589 | /* |
| 590 | * validation ensures the group can be loaded onto the |
| 591 | * PMU if it was the only group available. |
| 592 | */ |
| 593 | static int uncore_validate_group(struct intel_uncore_pmu *pmu, |
| 594 | struct perf_event *event) |
| 595 | { |
| 596 | struct perf_event *leader = event->group_leader; |
| 597 | struct intel_uncore_box *fake_box; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 598 | int ret = -EINVAL, n; |
| 599 | |
Yan, Zheng | 73c4427 | 2013-09-17 14:48:13 +0800 | [diff] [blame] | 600 | fake_box = uncore_alloc_box(pmu->type, NUMA_NO_NODE); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 601 | if (!fake_box) |
| 602 | return -ENOMEM; |
| 603 | |
| 604 | fake_box->pmu = pmu; |
| 605 | /* |
| 606 | * the event is not yet connected with its |
| 607 | * siblings therefore we must first collect |
| 608 | * existing siblings, then add the new event |
| 609 | * before we can simulate the scheduling |
| 610 | */ |
| 611 | n = uncore_collect_events(fake_box, leader, true); |
| 612 | if (n < 0) |
| 613 | goto out; |
| 614 | |
| 615 | fake_box->n_events = n; |
| 616 | n = uncore_collect_events(fake_box, event, false); |
| 617 | if (n < 0) |
| 618 | goto out; |
| 619 | |
| 620 | fake_box->n_events = n; |
| 621 | |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 622 | ret = uncore_assign_events(fake_box, NULL, n); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 623 | out: |
| 624 | kfree(fake_box); |
| 625 | return ret; |
| 626 | } |
| 627 | |
Yan, Zheng | 46bdd90 | 2013-04-16 19:51:06 +0800 | [diff] [blame] | 628 | static int uncore_pmu_event_init(struct perf_event *event) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 629 | { |
| 630 | struct intel_uncore_pmu *pmu; |
| 631 | struct intel_uncore_box *box; |
| 632 | struct hw_perf_event *hwc = &event->hw; |
| 633 | int ret; |
| 634 | |
| 635 | if (event->attr.type != event->pmu->type) |
| 636 | return -ENOENT; |
| 637 | |
| 638 | pmu = uncore_event_to_pmu(event); |
| 639 | /* no device found for this pmu */ |
| 640 | if (pmu->func_id < 0) |
| 641 | return -ENOENT; |
| 642 | |
| 643 | /* |
| 644 | * Uncore PMU does measure at all privilege level all the time. |
| 645 | * So it doesn't make sense to specify any exclude bits. |
| 646 | */ |
| 647 | if (event->attr.exclude_user || event->attr.exclude_kernel || |
| 648 | event->attr.exclude_hv || event->attr.exclude_idle) |
| 649 | return -EINVAL; |
| 650 | |
| 651 | /* Sampling not supported yet */ |
| 652 | if (hwc->sample_period) |
| 653 | return -EINVAL; |
| 654 | |
| 655 | /* |
| 656 | * Place all uncore events for a particular physical package |
| 657 | * onto a single cpu |
| 658 | */ |
| 659 | if (event->cpu < 0) |
| 660 | return -EINVAL; |
| 661 | box = uncore_pmu_to_box(pmu, event->cpu); |
| 662 | if (!box || box->cpu < 0) |
| 663 | return -EINVAL; |
| 664 | event->cpu = box->cpu; |
Thomas Gleixner | 1f2569f | 2016-02-22 22:19:14 +0000 | [diff] [blame] | 665 | event->pmu_private = box; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 666 | |
David Carrillo-Cisneros | e64cd6f | 2016-08-17 13:55:07 -0700 | [diff] [blame] | 667 | event->event_caps |= PERF_EV_CAP_READ_ACTIVE_PKG; |
| 668 | |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 669 | event->hw.idx = -1; |
| 670 | event->hw.last_tag = ~0ULL; |
| 671 | event->hw.extra_reg.idx = EXTRA_REG_NONE; |
Yan, Zheng | ebb6cc0 | 2012-08-06 13:11:21 +0800 | [diff] [blame] | 672 | event->hw.branch_reg.idx = EXTRA_REG_NONE; |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 673 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 674 | if (event->attr.config == UNCORE_FIXED_EVENT) { |
| 675 | /* no fixed counter */ |
| 676 | if (!pmu->type->fixed_ctl) |
| 677 | return -EINVAL; |
| 678 | /* |
| 679 | * if there is only one fixed counter, only the first pmu |
| 680 | * can access the fixed counter |
| 681 | */ |
| 682 | if (pmu->type->single_fixed && pmu->pmu_idx > 0) |
| 683 | return -EINVAL; |
Stephane Eranian | dbc33f7 | 2013-09-09 12:53:50 -0700 | [diff] [blame] | 684 | |
| 685 | /* fixed counters have event field hardcoded to zero */ |
| 686 | hwc->config = 0ULL; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 687 | } else { |
Kan Liang | cd34cd9 | 2016-08-16 16:09:50 -0400 | [diff] [blame] | 688 | hwc->config = event->attr.config & |
| 689 | (pmu->type->event_mask | ((u64)pmu->type->event_mask_ext << 32)); |
Yan, Zheng | 6a67943 | 2012-07-04 14:00:15 +0800 | [diff] [blame] | 690 | if (pmu->type->ops->hw_config) { |
| 691 | ret = pmu->type->ops->hw_config(box, event); |
| 692 | if (ret) |
| 693 | return ret; |
| 694 | } |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 695 | } |
| 696 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 697 | if (event->group_leader != event) |
| 698 | ret = uncore_validate_group(pmu, event); |
| 699 | else |
| 700 | ret = 0; |
| 701 | |
| 702 | return ret; |
| 703 | } |
| 704 | |
Yan, Zheng | 314d9f6 | 2012-09-10 15:53:49 +0800 | [diff] [blame] | 705 | static ssize_t uncore_get_attr_cpumask(struct device *dev, |
| 706 | struct device_attribute *attr, char *buf) |
| 707 | { |
Sudeep Holla | 5aaba36 | 2014-09-30 14:48:22 +0100 | [diff] [blame] | 708 | return cpumap_print_to_pagebuf(true, buf, &uncore_cpu_mask); |
Yan, Zheng | 314d9f6 | 2012-09-10 15:53:49 +0800 | [diff] [blame] | 709 | } |
| 710 | |
| 711 | static DEVICE_ATTR(cpumask, S_IRUGO, uncore_get_attr_cpumask, NULL); |
| 712 | |
| 713 | static struct attribute *uncore_pmu_attrs[] = { |
| 714 | &dev_attr_cpumask.attr, |
| 715 | NULL, |
| 716 | }; |
| 717 | |
| 718 | static struct attribute_group uncore_pmu_attr_group = { |
| 719 | .attrs = uncore_pmu_attrs, |
| 720 | }; |
| 721 | |
Andi Kleen | a08b676 | 2014-08-29 10:20:58 -0700 | [diff] [blame] | 722 | static int uncore_pmu_register(struct intel_uncore_pmu *pmu) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 723 | { |
| 724 | int ret; |
| 725 | |
Stephane Eranian | d64b25b | 2014-02-11 16:20:08 +0100 | [diff] [blame] | 726 | if (!pmu->type->pmu) { |
| 727 | pmu->pmu = (struct pmu) { |
| 728 | .attr_groups = pmu->type->attr_groups, |
| 729 | .task_ctx_nr = perf_invalid_context, |
| 730 | .event_init = uncore_pmu_event_init, |
| 731 | .add = uncore_pmu_event_add, |
| 732 | .del = uncore_pmu_event_del, |
| 733 | .start = uncore_pmu_event_start, |
| 734 | .stop = uncore_pmu_event_stop, |
| 735 | .read = uncore_pmu_event_read, |
| 736 | }; |
| 737 | } else { |
| 738 | pmu->pmu = *pmu->type->pmu; |
| 739 | pmu->pmu.attr_groups = pmu->type->attr_groups; |
| 740 | } |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 741 | |
| 742 | if (pmu->type->num_boxes == 1) { |
| 743 | if (strlen(pmu->type->name) > 0) |
| 744 | sprintf(pmu->name, "uncore_%s", pmu->type->name); |
| 745 | else |
| 746 | sprintf(pmu->name, "uncore"); |
| 747 | } else { |
| 748 | sprintf(pmu->name, "uncore_%s_%d", pmu->type->name, |
| 749 | pmu->pmu_idx); |
| 750 | } |
| 751 | |
| 752 | ret = perf_pmu_register(&pmu->pmu, pmu->name, -1); |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 753 | if (!ret) |
| 754 | pmu->registered = true; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 755 | return ret; |
| 756 | } |
| 757 | |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 758 | static void uncore_pmu_unregister(struct intel_uncore_pmu *pmu) |
| 759 | { |
| 760 | if (!pmu->registered) |
| 761 | return; |
| 762 | perf_pmu_unregister(&pmu->pmu); |
| 763 | pmu->registered = false; |
| 764 | } |
| 765 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 766 | static void uncore_free_boxes(struct intel_uncore_pmu *pmu) |
| 767 | { |
| 768 | int pkg; |
| 769 | |
| 770 | for (pkg = 0; pkg < max_packages; pkg++) |
| 771 | kfree(pmu->boxes[pkg]); |
| 772 | kfree(pmu->boxes); |
| 773 | } |
| 774 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 775 | static void uncore_type_exit(struct intel_uncore_type *type) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 776 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 777 | struct intel_uncore_pmu *pmu = type->pmus; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 778 | int i; |
| 779 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 780 | if (pmu) { |
| 781 | for (i = 0; i < type->num_boxes; i++, pmu++) { |
| 782 | uncore_pmu_unregister(pmu); |
| 783 | uncore_free_boxes(pmu); |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 784 | } |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 785 | kfree(type->pmus); |
| 786 | type->pmus = NULL; |
| 787 | } |
Yan, Zheng | 314d9f6 | 2012-09-10 15:53:49 +0800 | [diff] [blame] | 788 | kfree(type->events_group); |
| 789 | type->events_group = NULL; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 790 | } |
| 791 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 792 | static void uncore_types_exit(struct intel_uncore_type **types) |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 793 | { |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 794 | for (; *types; types++) |
| 795 | uncore_type_exit(*types); |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 796 | } |
| 797 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 798 | static int __init uncore_type_init(struct intel_uncore_type *type, bool setid) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 799 | { |
| 800 | struct intel_uncore_pmu *pmus; |
Jan-Simon Möller | 1b0dac2 | 2013-04-30 12:02:33 +0200 | [diff] [blame] | 801 | struct attribute_group *attr_group; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 802 | struct attribute **attrs; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 803 | size_t size; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 804 | int i, j; |
| 805 | |
| 806 | pmus = kzalloc(sizeof(*pmus) * type->num_boxes, GFP_KERNEL); |
| 807 | if (!pmus) |
| 808 | return -ENOMEM; |
| 809 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 810 | size = max_packages * sizeof(struct intel_uncore_box *); |
Dave Jones | b7b4839 | 2014-03-06 12:20:28 -0500 | [diff] [blame] | 811 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 812 | for (i = 0; i < type->num_boxes; i++) { |
| 813 | pmus[i].func_id = setid ? i : -1; |
| 814 | pmus[i].pmu_idx = i; |
| 815 | pmus[i].type = type; |
| 816 | pmus[i].boxes = kzalloc(size, GFP_KERNEL); |
| 817 | if (!pmus[i].boxes) |
| 818 | return -ENOMEM; |
| 819 | } |
| 820 | |
| 821 | type->pmus = pmus; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 822 | type->unconstrainted = (struct event_constraint) |
| 823 | __EVENT_CONSTRAINT(0, (1ULL << type->num_counters) - 1, |
Stephane Eranian | 9fac2cf | 2013-01-24 16:10:27 +0100 | [diff] [blame] | 824 | 0, type->num_counters, 0, 0); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 825 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 826 | if (type->event_descs) { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 827 | for (i = 0; type->event_descs[i].attr.attr.name; i++); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 828 | |
Jan-Simon Möller | 1b0dac2 | 2013-04-30 12:02:33 +0200 | [diff] [blame] | 829 | attr_group = kzalloc(sizeof(struct attribute *) * (i + 1) + |
| 830 | sizeof(*attr_group), GFP_KERNEL); |
| 831 | if (!attr_group) |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 832 | return -ENOMEM; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 833 | |
Jan-Simon Möller | 1b0dac2 | 2013-04-30 12:02:33 +0200 | [diff] [blame] | 834 | attrs = (struct attribute **)(attr_group + 1); |
| 835 | attr_group->name = "events"; |
| 836 | attr_group->attrs = attrs; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 837 | |
| 838 | for (j = 0; j < i; j++) |
| 839 | attrs[j] = &type->event_descs[j].attr.attr; |
| 840 | |
Jan-Simon Möller | 1b0dac2 | 2013-04-30 12:02:33 +0200 | [diff] [blame] | 841 | type->events_group = attr_group; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 842 | } |
| 843 | |
Yan, Zheng | 314d9f6 | 2012-09-10 15:53:49 +0800 | [diff] [blame] | 844 | type->pmu_group = &uncore_pmu_attr_group; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 845 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 846 | } |
| 847 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 848 | static int __init |
| 849 | uncore_types_init(struct intel_uncore_type **types, bool setid) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 850 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 851 | int ret; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 852 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 853 | for (; *types; types++) { |
| 854 | ret = uncore_type_init(*types, setid); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 855 | if (ret) |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 856 | return ret; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 857 | } |
| 858 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 859 | } |
| 860 | |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 861 | /* |
| 862 | * add a pci uncore device |
| 863 | */ |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 864 | static int uncore_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 865 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 866 | struct intel_uncore_type *type; |
Kan Liang | a54fa07 | 2016-05-15 23:18:24 -0700 | [diff] [blame] | 867 | struct intel_uncore_pmu *pmu = NULL; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 868 | struct intel_uncore_box *box; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 869 | int phys_id, pkg, ret; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 870 | |
Taku Izumi | 712df65 | 2015-09-24 21:10:21 +0900 | [diff] [blame] | 871 | phys_id = uncore_pcibus_to_physid(pdev->bus); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 872 | if (phys_id < 0) |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 873 | return -ENODEV; |
| 874 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 875 | pkg = topology_phys_to_logical_pkg(phys_id); |
Jiri Olsa | ef3f00a | 2016-05-18 08:16:10 +0200 | [diff] [blame] | 876 | if (pkg < 0) |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 877 | return -EINVAL; |
| 878 | |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 879 | if (UNCORE_PCI_DEV_TYPE(id->driver_data) == UNCORE_EXTRA_PCI_DEV) { |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 880 | int idx = UNCORE_PCI_DEV_IDX(id->driver_data); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 881 | |
| 882 | uncore_extra_pci_dev[pkg].dev[idx] = pdev; |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 883 | pci_set_drvdata(pdev, NULL); |
| 884 | return 0; |
| 885 | } |
| 886 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 887 | type = uncore_pci_uncores[UNCORE_PCI_DEV_TYPE(id->driver_data)]; |
Kan Liang | a54fa07 | 2016-05-15 23:18:24 -0700 | [diff] [blame] | 888 | |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 889 | /* |
Kan Liang | a54fa07 | 2016-05-15 23:18:24 -0700 | [diff] [blame] | 890 | * Some platforms, e.g. Knights Landing, use a common PCI device ID |
| 891 | * for multiple instances of an uncore PMU device type. We should check |
| 892 | * PCI slot and func to indicate the uncore box. |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 893 | */ |
Kan Liang | a54fa07 | 2016-05-15 23:18:24 -0700 | [diff] [blame] | 894 | if (id->driver_data & ~0xffff) { |
| 895 | struct pci_driver *pci_drv = pdev->driver; |
| 896 | const struct pci_device_id *ids = pci_drv->id_table; |
| 897 | unsigned int devfn; |
| 898 | |
| 899 | while (ids && ids->vendor) { |
| 900 | if ((ids->vendor == pdev->vendor) && |
| 901 | (ids->device == pdev->device)) { |
| 902 | devfn = PCI_DEVFN(UNCORE_PCI_DEV_DEV(ids->driver_data), |
| 903 | UNCORE_PCI_DEV_FUNC(ids->driver_data)); |
| 904 | if (devfn == pdev->devfn) { |
| 905 | pmu = &type->pmus[UNCORE_PCI_DEV_IDX(ids->driver_data)]; |
| 906 | break; |
| 907 | } |
| 908 | } |
| 909 | ids++; |
| 910 | } |
| 911 | if (pmu == NULL) |
| 912 | return -ENODEV; |
| 913 | } else { |
| 914 | /* |
| 915 | * for performance monitoring unit with multiple boxes, |
| 916 | * each box has a different function id. |
| 917 | */ |
| 918 | pmu = &type->pmus[UNCORE_PCI_DEV_IDX(id->driver_data)]; |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 919 | } |
| 920 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 921 | if (WARN_ON_ONCE(pmu->boxes[pkg] != NULL)) |
| 922 | return -EINVAL; |
| 923 | |
| 924 | box = uncore_alloc_box(type, NUMA_NO_NODE); |
| 925 | if (!box) |
| 926 | return -ENOMEM; |
| 927 | |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 928 | if (pmu->func_id < 0) |
| 929 | pmu->func_id = pdev->devfn; |
| 930 | else |
| 931 | WARN_ON_ONCE(pmu->func_id != pdev->devfn); |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 932 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 933 | atomic_inc(&box->refcnt); |
| 934 | box->pci_phys_id = phys_id; |
| 935 | box->pkgid = pkg; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 936 | box->pci_dev = pdev; |
| 937 | box->pmu = pmu; |
Ingo Molnar | 15c1247 | 2015-06-09 11:40:28 +0200 | [diff] [blame] | 938 | uncore_box_init(box); |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 939 | pci_set_drvdata(pdev, box); |
| 940 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 941 | pmu->boxes[pkg] = box; |
| 942 | if (atomic_inc_return(&pmu->activeboxes) > 1) |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 943 | return 0; |
| 944 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 945 | /* First active box registers the pmu */ |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 946 | ret = uncore_pmu_register(pmu); |
| 947 | if (ret) { |
| 948 | pci_set_drvdata(pdev, NULL); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 949 | pmu->boxes[pkg] = NULL; |
Thomas Gleixner | a46195f | 2016-02-22 22:19:11 +0000 | [diff] [blame] | 950 | uncore_box_exit(box); |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 951 | kfree(box); |
| 952 | } |
| 953 | return ret; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 954 | } |
| 955 | |
Robert Richter | 357398e | 2012-06-20 18:39:27 +0200 | [diff] [blame] | 956 | static void uncore_pci_remove(struct pci_dev *pdev) |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 957 | { |
Bjorn Helgaas | 281ee05 | 2016-05-31 16:25:27 -0500 | [diff] [blame] | 958 | struct intel_uncore_box *box; |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 959 | struct intel_uncore_pmu *pmu; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 960 | int i, phys_id, pkg; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 961 | |
Taku Izumi | 712df65 | 2015-09-24 21:10:21 +0900 | [diff] [blame] | 962 | phys_id = uncore_pcibus_to_physid(pdev->bus); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 963 | pkg = topology_phys_to_logical_pkg(phys_id); |
| 964 | |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 965 | box = pci_get_drvdata(pdev); |
| 966 | if (!box) { |
| 967 | for (i = 0; i < UNCORE_EXTRA_PCI_DEV_MAX; i++) { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 968 | if (uncore_extra_pci_dev[pkg].dev[i] == pdev) { |
| 969 | uncore_extra_pci_dev[pkg].dev[i] = NULL; |
Yan, Zheng | 899396c | 2013-08-07 14:17:23 +0800 | [diff] [blame] | 970 | break; |
| 971 | } |
| 972 | } |
| 973 | WARN_ON_ONCE(i >= UNCORE_EXTRA_PCI_DEV_MAX); |
| 974 | return; |
| 975 | } |
| 976 | |
| 977 | pmu = box->pmu; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 978 | if (WARN_ON_ONCE(phys_id != box->pci_phys_id)) |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 979 | return; |
| 980 | |
Yan, Zheng | e850f9c | 2013-04-16 19:51:07 +0800 | [diff] [blame] | 981 | pci_set_drvdata(pdev, NULL); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 982 | pmu->boxes[pkg] = NULL; |
| 983 | if (atomic_dec_return(&pmu->activeboxes) == 0) |
| 984 | uncore_pmu_unregister(pmu); |
Thomas Gleixner | a46195f | 2016-02-22 22:19:11 +0000 | [diff] [blame] | 985 | uncore_box_exit(box); |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 986 | kfree(box); |
| 987 | } |
| 988 | |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 989 | static int __init uncore_pci_init(void) |
| 990 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 991 | size_t size; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 992 | int ret; |
| 993 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 994 | size = max_packages * sizeof(struct pci_extra_dev); |
| 995 | uncore_extra_pci_dev = kzalloc(size, GFP_KERNEL); |
| 996 | if (!uncore_extra_pci_dev) { |
| 997 | ret = -ENOMEM; |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 998 | goto err; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 999 | } |
| 1000 | |
| 1001 | ret = uncore_types_init(uncore_pci_uncores, false); |
| 1002 | if (ret) |
| 1003 | goto errtype; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 1004 | |
| 1005 | uncore_pci_driver->probe = uncore_pci_probe; |
| 1006 | uncore_pci_driver->remove = uncore_pci_remove; |
| 1007 | |
| 1008 | ret = pci_register_driver(uncore_pci_driver); |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1009 | if (ret) |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1010 | goto errtype; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 1011 | |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1012 | pcidrv_registered = true; |
| 1013 | return 0; |
| 1014 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1015 | errtype: |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1016 | uncore_types_exit(uncore_pci_uncores); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1017 | kfree(uncore_extra_pci_dev); |
| 1018 | uncore_extra_pci_dev = NULL; |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1019 | uncore_free_pcibus_map(); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1020 | err: |
| 1021 | uncore_pci_uncores = empty_uncore; |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 1022 | return ret; |
| 1023 | } |
| 1024 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1025 | static void uncore_pci_exit(void) |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 1026 | { |
| 1027 | if (pcidrv_registered) { |
| 1028 | pcidrv_registered = false; |
| 1029 | pci_unregister_driver(uncore_pci_driver); |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 1030 | uncore_types_exit(uncore_pci_uncores); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1031 | kfree(uncore_extra_pci_dev); |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1032 | uncore_free_pcibus_map(); |
Yan, Zheng | 14371cc | 2012-06-15 14:31:36 +0800 | [diff] [blame] | 1033 | } |
| 1034 | } |
| 1035 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1036 | static int uncore_cpu_dying(unsigned int cpu) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1037 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1038 | struct intel_uncore_type *type, **types = uncore_msr_uncores; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1039 | struct intel_uncore_pmu *pmu; |
| 1040 | struct intel_uncore_box *box; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1041 | int i, pkg; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1042 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1043 | pkg = topology_logical_package_id(cpu); |
| 1044 | for (; *types; types++) { |
| 1045 | type = *types; |
| 1046 | pmu = type->pmus; |
| 1047 | for (i = 0; i < type->num_boxes; i++, pmu++) { |
| 1048 | box = pmu->boxes[pkg]; |
| 1049 | if (box && atomic_dec_return(&box->refcnt) == 0) |
Thomas Gleixner | a46195f | 2016-02-22 22:19:11 +0000 | [diff] [blame] | 1050 | uncore_box_exit(box); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1051 | } |
| 1052 | } |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1053 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1054 | } |
| 1055 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1056 | static int uncore_cpu_starting(unsigned int cpu) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1057 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1058 | struct intel_uncore_type *type, **types = uncore_msr_uncores; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1059 | struct intel_uncore_pmu *pmu; |
| 1060 | struct intel_uncore_box *box; |
Thomas Gleixner | bebb9d7 | 2017-01-31 23:58:39 +0100 | [diff] [blame] | 1061 | int i, pkg; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1062 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1063 | pkg = topology_logical_package_id(cpu); |
| 1064 | for (; *types; types++) { |
| 1065 | type = *types; |
| 1066 | pmu = type->pmus; |
| 1067 | for (i = 0; i < type->num_boxes; i++, pmu++) { |
| 1068 | box = pmu->boxes[pkg]; |
| 1069 | if (!box) |
| 1070 | continue; |
| 1071 | /* The first cpu on a package activates the box */ |
Thomas Gleixner | bebb9d7 | 2017-01-31 23:58:39 +0100 | [diff] [blame] | 1072 | if (atomic_inc_return(&box->refcnt) == 1) |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1073 | uncore_box_init(box); |
| 1074 | } |
| 1075 | } |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1076 | |
| 1077 | return 0; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1078 | } |
| 1079 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1080 | static int uncore_cpu_prepare(unsigned int cpu) |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1081 | { |
| 1082 | struct intel_uncore_type *type, **types = uncore_msr_uncores; |
| 1083 | struct intel_uncore_pmu *pmu; |
| 1084 | struct intel_uncore_box *box; |
| 1085 | int i, pkg; |
| 1086 | |
| 1087 | pkg = topology_logical_package_id(cpu); |
| 1088 | for (; *types; types++) { |
| 1089 | type = *types; |
| 1090 | pmu = type->pmus; |
| 1091 | for (i = 0; i < type->num_boxes; i++, pmu++) { |
| 1092 | if (pmu->boxes[pkg]) |
| 1093 | continue; |
| 1094 | /* First cpu of a package allocates the box */ |
Yan, Zheng | 73c4427 | 2013-09-17 14:48:13 +0800 | [diff] [blame] | 1095 | box = uncore_alloc_box(type, cpu_to_node(cpu)); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1096 | if (!box) |
| 1097 | return -ENOMEM; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1098 | box->pmu = pmu; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1099 | box->pkgid = pkg; |
| 1100 | pmu->boxes[pkg] = box; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1101 | } |
| 1102 | } |
| 1103 | return 0; |
| 1104 | } |
| 1105 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1106 | static void uncore_change_type_ctx(struct intel_uncore_type *type, int old_cpu, |
| 1107 | int new_cpu) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1108 | { |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1109 | struct intel_uncore_pmu *pmu = type->pmus; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1110 | struct intel_uncore_box *box; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1111 | int i, pkg; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1112 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1113 | pkg = topology_logical_package_id(old_cpu < 0 ? new_cpu : old_cpu); |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1114 | for (i = 0; i < type->num_boxes; i++, pmu++) { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1115 | box = pmu->boxes[pkg]; |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1116 | if (!box) |
| 1117 | continue; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1118 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1119 | if (old_cpu < 0) { |
| 1120 | WARN_ON_ONCE(box->cpu != -1); |
| 1121 | box->cpu = new_cpu; |
| 1122 | continue; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1123 | } |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1124 | |
| 1125 | WARN_ON_ONCE(box->cpu != old_cpu); |
| 1126 | box->cpu = -1; |
| 1127 | if (new_cpu < 0) |
| 1128 | continue; |
| 1129 | |
| 1130 | uncore_pmu_cancel_hrtimer(box); |
| 1131 | perf_pmu_migrate_context(&pmu->pmu, old_cpu, new_cpu); |
| 1132 | box->cpu = new_cpu; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1133 | } |
| 1134 | } |
| 1135 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1136 | static void uncore_change_context(struct intel_uncore_type **uncores, |
| 1137 | int old_cpu, int new_cpu) |
| 1138 | { |
| 1139 | for (; *uncores; uncores++) |
| 1140 | uncore_change_type_ctx(*uncores, old_cpu, new_cpu); |
| 1141 | } |
| 1142 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1143 | static int uncore_event_cpu_offline(unsigned int cpu) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1144 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1145 | int target; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1146 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1147 | /* Check if exiting cpu is used for collecting uncore events */ |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1148 | if (!cpumask_test_and_clear_cpu(cpu, &uncore_cpu_mask)) |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1149 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1150 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1151 | /* Find a new cpu to collect uncore events */ |
| 1152 | target = cpumask_any_but(topology_core_cpumask(cpu), cpu); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1153 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1154 | /* Migrate uncore events to the new target */ |
| 1155 | if (target < nr_cpu_ids) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1156 | cpumask_set_cpu(target, &uncore_cpu_mask); |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1157 | else |
| 1158 | target = -1; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1159 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 1160 | uncore_change_context(uncore_msr_uncores, cpu, target); |
| 1161 | uncore_change_context(uncore_pci_uncores, cpu, target); |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1162 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1163 | } |
| 1164 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1165 | static int uncore_event_cpu_online(unsigned int cpu) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1166 | { |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1167 | int target; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1168 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1169 | /* |
| 1170 | * Check if there is an online cpu in the package |
| 1171 | * which collects uncore events already. |
| 1172 | */ |
| 1173 | target = cpumask_any_and(&uncore_cpu_mask, topology_core_cpumask(cpu)); |
| 1174 | if (target < nr_cpu_ids) |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1175 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1176 | |
| 1177 | cpumask_set_cpu(cpu, &uncore_cpu_mask); |
| 1178 | |
Yan, Zheng | 514b234 | 2014-07-30 15:22:12 +0800 | [diff] [blame] | 1179 | uncore_change_context(uncore_msr_uncores, -1, cpu); |
| 1180 | uncore_change_context(uncore_pci_uncores, -1, cpu); |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1181 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1182 | } |
| 1183 | |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1184 | static int __init type_pmu_register(struct intel_uncore_type *type) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1185 | { |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1186 | int i, ret; |
| 1187 | |
| 1188 | for (i = 0; i < type->num_boxes; i++) { |
| 1189 | ret = uncore_pmu_register(&type->pmus[i]); |
| 1190 | if (ret) |
| 1191 | return ret; |
| 1192 | } |
| 1193 | return 0; |
| 1194 | } |
| 1195 | |
| 1196 | static int __init uncore_msr_pmus_register(void) |
| 1197 | { |
| 1198 | struct intel_uncore_type **types = uncore_msr_uncores; |
| 1199 | int ret; |
| 1200 | |
Thomas Gleixner | 1229735 | 2016-02-22 22:19:12 +0000 | [diff] [blame] | 1201 | for (; *types; types++) { |
| 1202 | ret = type_pmu_register(*types); |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1203 | if (ret) |
| 1204 | return ret; |
| 1205 | } |
| 1206 | return 0; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1207 | } |
| 1208 | |
| 1209 | static int __init uncore_cpu_init(void) |
| 1210 | { |
Yan, Zheng | c1e4658 | 2014-07-30 15:22:15 +0800 | [diff] [blame] | 1211 | int ret; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1212 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1213 | ret = uncore_types_init(uncore_msr_uncores, true); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1214 | if (ret) |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1215 | goto err; |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1216 | |
| 1217 | ret = uncore_msr_pmus_register(); |
| 1218 | if (ret) |
| 1219 | goto err; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1220 | return 0; |
Thomas Gleixner | ffeda00 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1221 | err: |
| 1222 | uncore_types_exit(uncore_msr_uncores); |
| 1223 | uncore_msr_uncores = empty_uncore; |
| 1224 | return ret; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1225 | } |
| 1226 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1227 | #define X86_UNCORE_MODEL_MATCH(model, init) \ |
| 1228 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&init } |
| 1229 | |
| 1230 | struct intel_uncore_init_fun { |
| 1231 | void (*cpu_init)(void); |
| 1232 | int (*pci_init)(void); |
| 1233 | }; |
| 1234 | |
| 1235 | static const struct intel_uncore_init_fun nhm_uncore_init __initconst = { |
| 1236 | .cpu_init = nhm_uncore_cpu_init, |
| 1237 | }; |
| 1238 | |
| 1239 | static const struct intel_uncore_init_fun snb_uncore_init __initconst = { |
| 1240 | .cpu_init = snb_uncore_cpu_init, |
| 1241 | .pci_init = snb_uncore_pci_init, |
| 1242 | }; |
| 1243 | |
| 1244 | static const struct intel_uncore_init_fun ivb_uncore_init __initconst = { |
| 1245 | .cpu_init = snb_uncore_cpu_init, |
| 1246 | .pci_init = ivb_uncore_pci_init, |
| 1247 | }; |
| 1248 | |
| 1249 | static const struct intel_uncore_init_fun hsw_uncore_init __initconst = { |
| 1250 | .cpu_init = snb_uncore_cpu_init, |
| 1251 | .pci_init = hsw_uncore_pci_init, |
| 1252 | }; |
| 1253 | |
| 1254 | static const struct intel_uncore_init_fun bdw_uncore_init __initconst = { |
| 1255 | .cpu_init = snb_uncore_cpu_init, |
| 1256 | .pci_init = bdw_uncore_pci_init, |
| 1257 | }; |
| 1258 | |
| 1259 | static const struct intel_uncore_init_fun snbep_uncore_init __initconst = { |
| 1260 | .cpu_init = snbep_uncore_cpu_init, |
| 1261 | .pci_init = snbep_uncore_pci_init, |
| 1262 | }; |
| 1263 | |
| 1264 | static const struct intel_uncore_init_fun nhmex_uncore_init __initconst = { |
| 1265 | .cpu_init = nhmex_uncore_cpu_init, |
| 1266 | }; |
| 1267 | |
| 1268 | static const struct intel_uncore_init_fun ivbep_uncore_init __initconst = { |
| 1269 | .cpu_init = ivbep_uncore_cpu_init, |
| 1270 | .pci_init = ivbep_uncore_pci_init, |
| 1271 | }; |
| 1272 | |
| 1273 | static const struct intel_uncore_init_fun hswep_uncore_init __initconst = { |
| 1274 | .cpu_init = hswep_uncore_cpu_init, |
| 1275 | .pci_init = hswep_uncore_pci_init, |
| 1276 | }; |
| 1277 | |
| 1278 | static const struct intel_uncore_init_fun bdx_uncore_init __initconst = { |
| 1279 | .cpu_init = bdx_uncore_cpu_init, |
| 1280 | .pci_init = bdx_uncore_pci_init, |
| 1281 | }; |
| 1282 | |
| 1283 | static const struct intel_uncore_init_fun knl_uncore_init __initconst = { |
| 1284 | .cpu_init = knl_uncore_cpu_init, |
| 1285 | .pci_init = knl_uncore_pci_init, |
| 1286 | }; |
| 1287 | |
| 1288 | static const struct intel_uncore_init_fun skl_uncore_init __initconst = { |
Kan Liang | 46866b5 | 2016-06-29 07:01:51 -0700 | [diff] [blame] | 1289 | .cpu_init = skl_uncore_cpu_init, |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1290 | .pci_init = skl_uncore_pci_init, |
| 1291 | }; |
| 1292 | |
Kan Liang | cd34cd9 | 2016-08-16 16:09:50 -0400 | [diff] [blame] | 1293 | static const struct intel_uncore_init_fun skx_uncore_init __initconst = { |
| 1294 | .cpu_init = skx_uncore_cpu_init, |
| 1295 | .pci_init = skx_uncore_pci_init, |
| 1296 | }; |
| 1297 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1298 | static const struct x86_cpu_id intel_uncore_match[] __initconst = { |
Dave Hansen | a07301a | 2016-06-02 17:19:42 -0700 | [diff] [blame] | 1299 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM_EP, nhm_uncore_init), |
| 1300 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM, nhm_uncore_init), |
| 1301 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE, nhm_uncore_init), |
| 1302 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE_EP, nhm_uncore_init), |
| 1303 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE, snb_uncore_init), |
| 1304 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE, ivb_uncore_init), |
| 1305 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_CORE, hsw_uncore_init), |
| 1306 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT, hsw_uncore_init), |
| 1307 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E, hsw_uncore_init), |
| 1308 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_CORE, bdw_uncore_init), |
| 1309 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E, bdw_uncore_init), |
| 1310 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X, snbep_uncore_init), |
| 1311 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM_EX, nhmex_uncore_init), |
| 1312 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE_EX, nhmex_uncore_init), |
| 1313 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X, ivbep_uncore_init), |
| 1314 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_X, hswep_uncore_init), |
| 1315 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_X, bdx_uncore_init), |
| 1316 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, bdx_uncore_init), |
| 1317 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, knl_uncore_init), |
Piotr Luc | ba2f815 | 2016-10-12 20:27:58 +0200 | [diff] [blame] | 1318 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, knl_uncore_init), |
Dave Hansen | a07301a | 2016-06-02 17:19:42 -0700 | [diff] [blame] | 1319 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP,skl_uncore_init), |
Kan Liang | 46866b5 | 2016-06-29 07:01:51 -0700 | [diff] [blame] | 1320 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, skl_uncore_init), |
Kan Liang | cd34cd9 | 2016-08-16 16:09:50 -0400 | [diff] [blame] | 1321 | X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, skx_uncore_init), |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1322 | {}, |
| 1323 | }; |
| 1324 | |
| 1325 | MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match); |
| 1326 | |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1327 | static int __init intel_uncore_init(void) |
| 1328 | { |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1329 | const struct x86_cpu_id *id; |
| 1330 | struct intel_uncore_init_fun *uncore_init; |
| 1331 | int pret = 0, cret = 0, ret; |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1332 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1333 | id = x86_match_cpu(intel_uncore_match); |
| 1334 | if (!id) |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1335 | return -ENODEV; |
| 1336 | |
Borislav Petkov | 0c9f353 | 2016-03-29 17:41:55 +0200 | [diff] [blame] | 1337 | if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) |
Yan, Zheng | a05123b | 2012-08-21 17:08:37 +0800 | [diff] [blame] | 1338 | return -ENODEV; |
| 1339 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1340 | max_packages = topology_max_packages(); |
| 1341 | |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1342 | uncore_init = (struct intel_uncore_init_fun *)id->driver_data; |
| 1343 | if (uncore_init->pci_init) { |
| 1344 | pret = uncore_init->pci_init(); |
| 1345 | if (!pret) |
| 1346 | pret = uncore_pci_init(); |
| 1347 | } |
| 1348 | |
| 1349 | if (uncore_init->cpu_init) { |
| 1350 | uncore_init->cpu_init(); |
| 1351 | cret = uncore_cpu_init(); |
| 1352 | } |
Thomas Gleixner | 5485592 | 2016-02-22 22:19:17 +0000 | [diff] [blame] | 1353 | |
| 1354 | if (cret && pret) |
| 1355 | return -ENODEV; |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1356 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1357 | /* |
| 1358 | * Install callbacks. Core will call them for each online cpu. |
| 1359 | * |
| 1360 | * The first online cpu of each package allocates and takes |
| 1361 | * the refcounts for all other online cpus in that package. |
| 1362 | * If msrs are not enabled no allocation is required and |
| 1363 | * uncore_cpu_prepare() is not called for each online cpu. |
| 1364 | */ |
| 1365 | if (!cret) { |
| 1366 | ret = cpuhp_setup_state(CPUHP_PERF_X86_UNCORE_PREP, |
| 1367 | "PERF_X86_UNCORE_PREP", |
| 1368 | uncore_cpu_prepare, NULL); |
| 1369 | if (ret) |
| 1370 | goto err; |
| 1371 | } else { |
| 1372 | cpuhp_setup_state_nocalls(CPUHP_PERF_X86_UNCORE_PREP, |
| 1373 | "PERF_X86_UNCORE_PREP", |
| 1374 | uncore_cpu_prepare, NULL); |
| 1375 | } |
Thomas Gleixner | bebb9d7 | 2017-01-31 23:58:39 +0100 | [diff] [blame] | 1376 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1377 | cpuhp_setup_state(CPUHP_AP_PERF_X86_UNCORE_STARTING, |
| 1378 | "AP_PERF_X86_UNCORE_STARTING", |
| 1379 | uncore_cpu_starting, uncore_cpu_dying); |
Thomas Gleixner | bebb9d7 | 2017-01-31 23:58:39 +0100 | [diff] [blame] | 1380 | |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1381 | cpuhp_setup_state(CPUHP_AP_PERF_X86_UNCORE_ONLINE, |
| 1382 | "AP_PERF_X86_UNCORE_ONLINE", |
| 1383 | uncore_event_cpu_online, uncore_event_cpu_offline); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1384 | return 0; |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1385 | |
Thomas Gleixner | cf6d445 | 2016-02-22 22:19:16 +0000 | [diff] [blame] | 1386 | err: |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1387 | uncore_types_exit(uncore_msr_uncores); |
Thomas Gleixner | 4f08967 | 2016-02-22 22:19:09 +0000 | [diff] [blame] | 1388 | uncore_pci_exit(); |
Yan, Zheng | 087bfbb | 2012-06-15 14:31:34 +0800 | [diff] [blame] | 1389 | return ret; |
| 1390 | } |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1391 | module_init(intel_uncore_init); |
| 1392 | |
| 1393 | static void __exit intel_uncore_exit(void) |
| 1394 | { |
Thomas Gleixner | 1a246b9 | 2016-07-13 17:16:12 +0000 | [diff] [blame] | 1395 | cpuhp_remove_state_nocalls(CPUHP_AP_PERF_X86_UNCORE_ONLINE); |
| 1396 | cpuhp_remove_state_nocalls(CPUHP_AP_PERF_X86_UNCORE_STARTING); |
| 1397 | cpuhp_remove_state_nocalls(CPUHP_PERF_X86_UNCORE_PREP); |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1398 | uncore_types_exit(uncore_msr_uncores); |
| 1399 | uncore_pci_exit(); |
Kan Liang | e633c65 | 2016-03-20 01:33:36 -0700 | [diff] [blame] | 1400 | } |
| 1401 | module_exit(intel_uncore_exit); |