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Ben Skeggs245dcfe2015-01-14 14:35:35 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
Ben Skeggs32932282015-08-20 14:54:20 +100024#include "gf100.h"
Ben Skeggs245dcfe2015-01-14 14:35:35 +100025
Ben Skeggs245dcfe2015-01-14 14:35:35 +100026#include <core/gpuobj.h>
27#include <subdev/fb.h>
28#include <subdev/mmu.h>
29
Ben Skeggsd8e83992015-08-20 14:54:17 +100030static struct nvkm_vm *
Ben Skeggs32932282015-08-20 14:54:20 +100031gf100_bar_kmap(struct nvkm_bar *base)
Ben Skeggs245dcfe2015-01-14 14:35:35 +100032{
Ben Skeggs32932282015-08-20 14:54:20 +100033 return gf100_bar(base)->bar[0].vm;
Ben Skeggs245dcfe2015-01-14 14:35:35 +100034}
35
Ben Skeggs32932282015-08-20 14:54:20 +100036int
37gf100_bar_umap(struct nvkm_bar *base, u64 size, int type, struct nvkm_vma *vma)
Ben Skeggs245dcfe2015-01-14 14:35:35 +100038{
Ben Skeggs32932282015-08-20 14:54:20 +100039 struct gf100_bar *bar = gf100_bar(base);
Ben Skeggsd8e83992015-08-20 14:54:17 +100040 return nvkm_vm_get(bar->bar[1].vm, size, type, NV_MEM_ACCESS_RW, vma);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100041}
42
Ben Skeggs245dcfe2015-01-14 14:35:35 +100043static int
Ben Skeggs5b0c1892015-08-20 14:54:06 +100044gf100_bar_ctor_vm(struct gf100_bar *bar, struct gf100_bar_vm *bar_vm,
Ben Skeggs1de68562015-08-20 14:54:17 +100045 struct lock_class_key *key, int bar_nr)
Ben Skeggs245dcfe2015-01-14 14:35:35 +100046{
Ben Skeggs32932282015-08-20 14:54:20 +100047 struct nvkm_device *device = bar->base.subdev.device;
Ben Skeggs245dcfe2015-01-14 14:35:35 +100048 struct nvkm_vm *vm;
49 resource_size_t bar_len;
50 int ret;
51
Ben Skeggsadb53d22015-08-20 14:54:17 +100052 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0, false,
Ben Skeggs245dcfe2015-01-14 14:35:35 +100053 &bar_vm->mem);
54 if (ret)
55 return ret;
56
Ben Skeggsf027f492015-08-20 14:54:17 +100057 ret = nvkm_gpuobj_new(device, 0x8000, 0, false, NULL, &bar_vm->pgd);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100058 if (ret)
59 return ret;
60
Ben Skeggs7e8820f2015-08-20 14:54:23 +100061 bar_len = device->func->resource_size(device, bar_nr);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100062
Ben Skeggs1de68562015-08-20 14:54:17 +100063 ret = nvkm_vm_new(device, 0, bar_len, 0, key, &vm);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100064 if (ret)
65 return ret;
66
Ben Skeggs68f3f702015-08-20 14:54:22 +100067 atomic_inc(&vm->engref[NVKM_SUBDEV_BAR]);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100068
69 /*
70 * Bootstrap page table lookup.
71 */
72 if (bar_nr == 3) {
Ben Skeggsd8e83992015-08-20 14:54:17 +100073 ret = nvkm_vm_boot(vm, bar_len);
Ben Skeggs32932282015-08-20 14:54:20 +100074 if (ret) {
75 nvkm_vm_ref(NULL, &vm, NULL);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100076 return ret;
Ben Skeggs32932282015-08-20 14:54:20 +100077 }
Ben Skeggs245dcfe2015-01-14 14:35:35 +100078 }
79
80 ret = nvkm_vm_ref(vm, &bar_vm->vm, bar_vm->pgd);
81 nvkm_vm_ref(NULL, &vm, NULL);
82 if (ret)
83 return ret;
84
Ben Skeggs19187072015-08-20 14:54:14 +100085 nvkm_kmap(bar_vm->mem);
86 nvkm_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
87 nvkm_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
88 nvkm_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
89 nvkm_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
90 nvkm_done(bar_vm->mem);
Ben Skeggs245dcfe2015-01-14 14:35:35 +100091 return 0;
92}
93
94int
Ben Skeggs32932282015-08-20 14:54:20 +100095gf100_bar_oneinit(struct nvkm_bar *base)
Ben Skeggs245dcfe2015-01-14 14:35:35 +100096{
Ben Skeggs1de68562015-08-20 14:54:17 +100097 static struct lock_class_key bar1_lock;
98 static struct lock_class_key bar3_lock;
Ben Skeggs32932282015-08-20 14:54:20 +100099 struct gf100_bar *bar = gf100_bar(base);
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000100 int ret;
101
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000102 /* BAR3 */
Ben Skeggs32932282015-08-20 14:54:20 +1000103 if (bar->base.func->kmap) {
Ben Skeggs1de68562015-08-20 14:54:17 +1000104 ret = gf100_bar_ctor_vm(bar, &bar->bar[0], &bar3_lock, 3);
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000105 if (ret)
106 return ret;
107 }
108
109 /* BAR1 */
Ben Skeggs1de68562015-08-20 14:54:17 +1000110 ret = gf100_bar_ctor_vm(bar, &bar->bar[1], &bar1_lock, 1);
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000111 if (ret)
112 return ret;
113
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000114 return 0;
115}
116
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000117int
Ben Skeggs32932282015-08-20 14:54:20 +1000118gf100_bar_init(struct nvkm_bar *base)
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000119{
Ben Skeggs32932282015-08-20 14:54:20 +1000120 struct gf100_bar *bar = gf100_bar(base);
Ben Skeggs9155c1622015-08-20 14:54:08 +1000121 struct nvkm_device *device = bar->base.subdev.device;
Ben Skeggsadb53d22015-08-20 14:54:17 +1000122 u32 addr;
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000123
Ben Skeggs9155c1622015-08-20 14:54:08 +1000124 nvkm_mask(device, 0x000200, 0x00000100, 0x00000000);
125 nvkm_mask(device, 0x000200, 0x00000100, 0x00000100);
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000126
Ben Skeggsadb53d22015-08-20 14:54:17 +1000127 addr = nvkm_memory_addr(bar->bar[1].mem) >> 12;
128 nvkm_wr32(device, 0x001704, 0x80000000 | addr);
129
130 if (bar->bar[0].mem) {
131 addr = nvkm_memory_addr(bar->bar[0].mem) >> 12;
132 nvkm_wr32(device, 0x001714, 0xc0000000 | addr);
133 }
134
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000135 return 0;
136}
137
Ben Skeggs32932282015-08-20 14:54:20 +1000138void *
139gf100_bar_dtor(struct nvkm_bar *base)
140{
141 struct gf100_bar *bar = gf100_bar(base);
142
143 nvkm_vm_ref(NULL, &bar->bar[1].vm, bar->bar[1].pgd);
144 nvkm_gpuobj_del(&bar->bar[1].pgd);
145 nvkm_memory_del(&bar->bar[1].mem);
146
147 if (bar->bar[0].vm) {
148 nvkm_memory_del(&bar->bar[0].vm->pgt[0].mem[0]);
149 nvkm_vm_ref(NULL, &bar->bar[0].vm, bar->bar[0].pgd);
150 }
151 nvkm_gpuobj_del(&bar->bar[0].pgd);
152 nvkm_memory_del(&bar->bar[0].mem);
153 return bar;
154}
155
156int
157gf100_bar_new_(const struct nvkm_bar_func *func, struct nvkm_device *device,
158 int index, struct nvkm_bar **pbar)
159{
160 struct gf100_bar *bar;
161 if (!(bar = kzalloc(sizeof(*bar), GFP_KERNEL)))
162 return -ENOMEM;
163 nvkm_bar_ctor(func, device, index, &bar->base);
164 *pbar = &bar->base;
165 return 0;
166}
167
168static const struct nvkm_bar_func
169gf100_bar_func = {
170 .dtor = gf100_bar_dtor,
171 .oneinit = gf100_bar_oneinit,
172 .init = gf100_bar_init,
173 .kmap = gf100_bar_kmap,
174 .umap = gf100_bar_umap,
175 .flush = g84_bar_flush,
Ben Skeggs245dcfe2015-01-14 14:35:35 +1000176};
Ben Skeggs32932282015-08-20 14:54:20 +1000177
178int
179gf100_bar_new(struct nvkm_device *device, int index, struct nvkm_bar **pbar)
180{
181 return gf100_bar_new_(&gf100_bar_func, device, index, pbar);
182}