| Terje Bergstrom | 7547168 | 2013-03-22 16:34:01 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2012-2013, NVIDIA Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | */ |
| 16 | |
| 17 | #ifndef HOST1X_DEV_H |
| 18 | #define HOST1X_DEV_H |
| 19 | |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/device.h> |
| 22 | |
| 23 | #include "syncpt.h" |
| 24 | |
| 25 | struct host1x_syncpt; |
| 26 | |
| 27 | struct host1x_syncpt_ops { |
| 28 | void (*restore)(struct host1x_syncpt *syncpt); |
| 29 | void (*restore_wait_base)(struct host1x_syncpt *syncpt); |
| 30 | void (*load_wait_base)(struct host1x_syncpt *syncpt); |
| 31 | u32 (*load)(struct host1x_syncpt *syncpt); |
| 32 | void (*cpu_incr)(struct host1x_syncpt *syncpt); |
| 33 | int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr); |
| 34 | }; |
| 35 | |
| 36 | struct host1x_info { |
| 37 | int nb_channels; /* host1x: num channels supported */ |
| 38 | int nb_pts; /* host1x: num syncpoints supported */ |
| 39 | int nb_bases; /* host1x: num syncpoints supported */ |
| 40 | int nb_mlocks; /* host1x: number of mlocks */ |
| 41 | int (*init)(struct host1x *); /* initialize per SoC ops */ |
| 42 | int sync_offset; |
| 43 | }; |
| 44 | |
| 45 | struct host1x { |
| 46 | const struct host1x_info *info; |
| 47 | |
| 48 | void __iomem *regs; |
| 49 | struct host1x_syncpt *syncpt; |
| 50 | struct device *dev; |
| 51 | struct clk *clk; |
| 52 | |
| 53 | const struct host1x_syncpt_ops *syncpt_op; |
| 54 | }; |
| 55 | |
| 56 | void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); |
| 57 | u32 host1x_sync_readl(struct host1x *host1x, u32 r); |
| 58 | |
| 59 | static inline void host1x_hw_syncpt_restore(struct host1x *host, |
| 60 | struct host1x_syncpt *sp) |
| 61 | { |
| 62 | host->syncpt_op->restore(sp); |
| 63 | } |
| 64 | |
| 65 | static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, |
| 66 | struct host1x_syncpt *sp) |
| 67 | { |
| 68 | host->syncpt_op->restore_wait_base(sp); |
| 69 | } |
| 70 | |
| 71 | static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, |
| 72 | struct host1x_syncpt *sp) |
| 73 | { |
| 74 | host->syncpt_op->load_wait_base(sp); |
| 75 | } |
| 76 | |
| 77 | static inline u32 host1x_hw_syncpt_load(struct host1x *host, |
| 78 | struct host1x_syncpt *sp) |
| 79 | { |
| 80 | return host->syncpt_op->load(sp); |
| 81 | } |
| 82 | |
| 83 | static inline void host1x_hw_syncpt_cpu_incr(struct host1x *host, |
| 84 | struct host1x_syncpt *sp) |
| 85 | { |
| 86 | host->syncpt_op->cpu_incr(sp); |
| 87 | } |
| 88 | |
| 89 | static inline int host1x_hw_syncpt_patch_wait(struct host1x *host, |
| 90 | struct host1x_syncpt *sp, |
| 91 | void *patch_addr) |
| 92 | { |
| 93 | return host->syncpt_op->patch_wait(sp, patch_addr); |
| 94 | } |
| 95 | |
| 96 | #endif |