Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 1 | /* |
| 2 | * FPGA Manager Core |
| 3 | * |
| 4 | * Copyright (C) 2013-2015 Altera Corporation |
| 5 | * |
| 6 | * With code from the mailing list: |
| 7 | * Copyright (C) 2013 Xilinx, Inc. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms and conditions of the GNU General Public License, |
| 11 | * version 2, as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 16 | * more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along with |
| 19 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 20 | */ |
| 21 | #include <linux/firmware.h> |
| 22 | #include <linux/fpga/fpga-mgr.h> |
| 23 | #include <linux/idr.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/of.h> |
| 26 | #include <linux/mutex.h> |
| 27 | #include <linux/slab.h> |
| 28 | |
| 29 | static DEFINE_IDA(fpga_mgr_ida); |
| 30 | static struct class *fpga_mgr_class; |
| 31 | |
| 32 | /** |
| 33 | * fpga_mgr_buf_load - load fpga from image in buffer |
| 34 | * @mgr: fpga manager |
| 35 | * @flags: flags setting fpga confuration modes |
| 36 | * @buf: buffer contain fpga image |
| 37 | * @count: byte count of buf |
| 38 | * |
| 39 | * Step the low level fpga manager through the device-specific steps of getting |
| 40 | * an FPGA ready to be configured, writing the image to it, then doing whatever |
Alan Tull | 92d94a7 | 2015-10-22 12:38:38 -0500 | [diff] [blame] | 41 | * post-configuration steps necessary. This code assumes the caller got the |
| 42 | * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code. |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 43 | * |
| 44 | * Return: 0 on success, negative error code otherwise. |
| 45 | */ |
| 46 | int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf, |
| 47 | size_t count) |
| 48 | { |
| 49 | struct device *dev = &mgr->dev; |
| 50 | int ret; |
| 51 | |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 52 | /* |
| 53 | * Call the low level driver's write_init function. This will do the |
| 54 | * device-specific things to get the FPGA into the state where it is |
| 55 | * ready to receive an FPGA image. |
| 56 | */ |
| 57 | mgr->state = FPGA_MGR_STATE_WRITE_INIT; |
| 58 | ret = mgr->mops->write_init(mgr, flags, buf, count); |
| 59 | if (ret) { |
| 60 | dev_err(dev, "Error preparing FPGA for writing\n"); |
| 61 | mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR; |
| 62 | return ret; |
| 63 | } |
| 64 | |
| 65 | /* |
| 66 | * Write the FPGA image to the FPGA. |
| 67 | */ |
| 68 | mgr->state = FPGA_MGR_STATE_WRITE; |
| 69 | ret = mgr->mops->write(mgr, buf, count); |
| 70 | if (ret) { |
| 71 | dev_err(dev, "Error while writing image data to FPGA\n"); |
| 72 | mgr->state = FPGA_MGR_STATE_WRITE_ERR; |
| 73 | return ret; |
| 74 | } |
| 75 | |
| 76 | /* |
| 77 | * After all the FPGA image has been written, do the device specific |
| 78 | * steps to finish and set the FPGA into operating mode. |
| 79 | */ |
| 80 | mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; |
| 81 | ret = mgr->mops->write_complete(mgr, flags); |
| 82 | if (ret) { |
| 83 | dev_err(dev, "Error after writing image data to FPGA\n"); |
| 84 | mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; |
| 85 | return ret; |
| 86 | } |
| 87 | mgr->state = FPGA_MGR_STATE_OPERATING; |
| 88 | |
| 89 | return 0; |
| 90 | } |
| 91 | EXPORT_SYMBOL_GPL(fpga_mgr_buf_load); |
| 92 | |
| 93 | /** |
| 94 | * fpga_mgr_firmware_load - request firmware and load to fpga |
| 95 | * @mgr: fpga manager |
| 96 | * @flags: flags setting fpga confuration modes |
| 97 | * @image_name: name of image file on the firmware search path |
| 98 | * |
| 99 | * Request an FPGA image using the firmware class, then write out to the FPGA. |
| 100 | * Update the state before each step to provide info on what step failed if |
Alan Tull | 92d94a7 | 2015-10-22 12:38:38 -0500 | [diff] [blame] | 101 | * there is a failure. This code assumes the caller got the mgr pointer |
| 102 | * from of_fpga_mgr_get() and checked that it is not an error code. |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 103 | * |
| 104 | * Return: 0 on success, negative error code otherwise. |
| 105 | */ |
| 106 | int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags, |
| 107 | const char *image_name) |
| 108 | { |
| 109 | struct device *dev = &mgr->dev; |
| 110 | const struct firmware *fw; |
| 111 | int ret; |
| 112 | |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 113 | dev_info(dev, "writing %s to %s\n", image_name, mgr->name); |
| 114 | |
| 115 | mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ; |
| 116 | |
| 117 | ret = request_firmware(&fw, image_name, dev); |
| 118 | if (ret) { |
| 119 | mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR; |
| 120 | dev_err(dev, "Error requesting firmware %s\n", image_name); |
| 121 | return ret; |
| 122 | } |
| 123 | |
| 124 | ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size); |
| 125 | if (ret) |
| 126 | return ret; |
| 127 | |
| 128 | release_firmware(fw); |
| 129 | |
| 130 | return 0; |
| 131 | } |
| 132 | EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load); |
| 133 | |
| 134 | static const char * const state_str[] = { |
| 135 | [FPGA_MGR_STATE_UNKNOWN] = "unknown", |
| 136 | [FPGA_MGR_STATE_POWER_OFF] = "power off", |
| 137 | [FPGA_MGR_STATE_POWER_UP] = "power up", |
| 138 | [FPGA_MGR_STATE_RESET] = "reset", |
| 139 | |
| 140 | /* requesting FPGA image from firmware */ |
| 141 | [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request", |
| 142 | [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error", |
| 143 | |
| 144 | /* Preparing FPGA to receive image */ |
| 145 | [FPGA_MGR_STATE_WRITE_INIT] = "write init", |
| 146 | [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error", |
| 147 | |
| 148 | /* Writing image to FPGA */ |
| 149 | [FPGA_MGR_STATE_WRITE] = "write", |
| 150 | [FPGA_MGR_STATE_WRITE_ERR] = "write error", |
| 151 | |
| 152 | /* Finishing configuration after image has been written */ |
| 153 | [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete", |
| 154 | [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error", |
| 155 | |
| 156 | /* FPGA reports to be in normal operating mode */ |
| 157 | [FPGA_MGR_STATE_OPERATING] = "operating", |
| 158 | }; |
| 159 | |
| 160 | static ssize_t name_show(struct device *dev, |
| 161 | struct device_attribute *attr, char *buf) |
| 162 | { |
| 163 | struct fpga_manager *mgr = to_fpga_manager(dev); |
| 164 | |
| 165 | return sprintf(buf, "%s\n", mgr->name); |
| 166 | } |
| 167 | |
| 168 | static ssize_t state_show(struct device *dev, |
| 169 | struct device_attribute *attr, char *buf) |
| 170 | { |
| 171 | struct fpga_manager *mgr = to_fpga_manager(dev); |
| 172 | |
| 173 | return sprintf(buf, "%s\n", state_str[mgr->state]); |
| 174 | } |
| 175 | |
| 176 | static DEVICE_ATTR_RO(name); |
| 177 | static DEVICE_ATTR_RO(state); |
| 178 | |
| 179 | static struct attribute *fpga_mgr_attrs[] = { |
| 180 | &dev_attr_name.attr, |
| 181 | &dev_attr_state.attr, |
| 182 | NULL, |
| 183 | }; |
| 184 | ATTRIBUTE_GROUPS(fpga_mgr); |
| 185 | |
| 186 | static int fpga_mgr_of_node_match(struct device *dev, const void *data) |
| 187 | { |
| 188 | return dev->of_node == data; |
| 189 | } |
| 190 | |
| 191 | /** |
| 192 | * of_fpga_mgr_get - get an exclusive reference to a fpga mgr |
| 193 | * @node: device node |
| 194 | * |
| 195 | * Given a device node, get an exclusive reference to a fpga mgr. |
| 196 | * |
| 197 | * Return: fpga manager struct or IS_ERR() condition containing error code. |
| 198 | */ |
| 199 | struct fpga_manager *of_fpga_mgr_get(struct device_node *node) |
| 200 | { |
| 201 | struct fpga_manager *mgr; |
| 202 | struct device *dev; |
Alan Tull | 654ba4c | 2015-10-22 12:38:37 -0500 | [diff] [blame] | 203 | int ret = -ENODEV; |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 204 | |
| 205 | dev = class_find_device(fpga_mgr_class, NULL, node, |
| 206 | fpga_mgr_of_node_match); |
| 207 | if (!dev) |
| 208 | return ERR_PTR(-ENODEV); |
| 209 | |
| 210 | mgr = to_fpga_manager(dev); |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 211 | if (!mgr) |
Alan Tull | 654ba4c | 2015-10-22 12:38:37 -0500 | [diff] [blame] | 212 | goto err_dev; |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 213 | |
| 214 | /* Get exclusive use of fpga manager */ |
Alan Tull | 654ba4c | 2015-10-22 12:38:37 -0500 | [diff] [blame] | 215 | if (!mutex_trylock(&mgr->ref_mutex)) { |
| 216 | ret = -EBUSY; |
| 217 | goto err_dev; |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 218 | } |
| 219 | |
Alan Tull | 654ba4c | 2015-10-22 12:38:37 -0500 | [diff] [blame] | 220 | if (!try_module_get(dev->parent->driver->owner)) |
| 221 | goto err_ll_mod; |
| 222 | |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 223 | return mgr; |
Alan Tull | 654ba4c | 2015-10-22 12:38:37 -0500 | [diff] [blame] | 224 | |
| 225 | err_ll_mod: |
| 226 | mutex_unlock(&mgr->ref_mutex); |
| 227 | err_dev: |
| 228 | put_device(dev); |
| 229 | return ERR_PTR(ret); |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 230 | } |
| 231 | EXPORT_SYMBOL_GPL(of_fpga_mgr_get); |
| 232 | |
| 233 | /** |
| 234 | * fpga_mgr_put - release a reference to a fpga manager |
| 235 | * @mgr: fpga manager structure |
| 236 | */ |
| 237 | void fpga_mgr_put(struct fpga_manager *mgr) |
| 238 | { |
Alan Tull | 654ba4c | 2015-10-22 12:38:37 -0500 | [diff] [blame] | 239 | module_put(mgr->dev.parent->driver->owner); |
| 240 | mutex_unlock(&mgr->ref_mutex); |
| 241 | put_device(&mgr->dev); |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 242 | } |
| 243 | EXPORT_SYMBOL_GPL(fpga_mgr_put); |
| 244 | |
| 245 | /** |
| 246 | * fpga_mgr_register - register a low level fpga manager driver |
| 247 | * @dev: fpga manager device from pdev |
| 248 | * @name: fpga manager name |
| 249 | * @mops: pointer to structure of fpga manager ops |
| 250 | * @priv: fpga manager private data |
| 251 | * |
| 252 | * Return: 0 on success, negative error code otherwise. |
| 253 | */ |
| 254 | int fpga_mgr_register(struct device *dev, const char *name, |
| 255 | const struct fpga_manager_ops *mops, |
| 256 | void *priv) |
| 257 | { |
| 258 | struct fpga_manager *mgr; |
| 259 | const char *dt_label; |
| 260 | int id, ret; |
| 261 | |
| 262 | if (!mops || !mops->write_init || !mops->write || |
| 263 | !mops->write_complete || !mops->state) { |
| 264 | dev_err(dev, "Attempt to register without fpga_manager_ops\n"); |
| 265 | return -EINVAL; |
| 266 | } |
| 267 | |
| 268 | if (!name || !strlen(name)) { |
| 269 | dev_err(dev, "Attempt to register with no name!\n"); |
| 270 | return -EINVAL; |
| 271 | } |
| 272 | |
| 273 | mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); |
| 274 | if (!mgr) |
| 275 | return -ENOMEM; |
| 276 | |
| 277 | id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL); |
| 278 | if (id < 0) { |
| 279 | ret = id; |
| 280 | goto error_kfree; |
| 281 | } |
| 282 | |
| 283 | mutex_init(&mgr->ref_mutex); |
| 284 | |
| 285 | mgr->name = name; |
| 286 | mgr->mops = mops; |
| 287 | mgr->priv = priv; |
| 288 | |
| 289 | /* |
| 290 | * Initialize framework state by requesting low level driver read state |
| 291 | * from device. FPGA may be in reset mode or may have been programmed |
| 292 | * by bootloader or EEPROM. |
| 293 | */ |
| 294 | mgr->state = mgr->mops->state(mgr); |
| 295 | |
| 296 | device_initialize(&mgr->dev); |
| 297 | mgr->dev.class = fpga_mgr_class; |
| 298 | mgr->dev.parent = dev; |
| 299 | mgr->dev.of_node = dev->of_node; |
| 300 | mgr->dev.id = id; |
| 301 | dev_set_drvdata(dev, mgr); |
| 302 | |
| 303 | dt_label = of_get_property(mgr->dev.of_node, "label", NULL); |
| 304 | if (dt_label) |
| 305 | ret = dev_set_name(&mgr->dev, "%s", dt_label); |
| 306 | else |
| 307 | ret = dev_set_name(&mgr->dev, "fpga%d", id); |
| 308 | |
| 309 | ret = device_add(&mgr->dev); |
| 310 | if (ret) |
| 311 | goto error_device; |
| 312 | |
| 313 | dev_info(&mgr->dev, "%s registered\n", mgr->name); |
| 314 | |
| 315 | return 0; |
| 316 | |
| 317 | error_device: |
| 318 | ida_simple_remove(&fpga_mgr_ida, id); |
| 319 | error_kfree: |
| 320 | kfree(mgr); |
| 321 | |
| 322 | return ret; |
| 323 | } |
| 324 | EXPORT_SYMBOL_GPL(fpga_mgr_register); |
| 325 | |
| 326 | /** |
| 327 | * fpga_mgr_unregister - unregister a low level fpga manager driver |
| 328 | * @dev: fpga manager device from pdev |
| 329 | */ |
| 330 | void fpga_mgr_unregister(struct device *dev) |
| 331 | { |
| 332 | struct fpga_manager *mgr = dev_get_drvdata(dev); |
| 333 | |
| 334 | dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name); |
| 335 | |
| 336 | /* |
| 337 | * If the low level driver provides a method for putting fpga into |
| 338 | * a desired state upon unregister, do it. |
| 339 | */ |
| 340 | if (mgr->mops->fpga_remove) |
| 341 | mgr->mops->fpga_remove(mgr); |
| 342 | |
| 343 | device_unregister(&mgr->dev); |
| 344 | } |
| 345 | EXPORT_SYMBOL_GPL(fpga_mgr_unregister); |
| 346 | |
| 347 | static void fpga_mgr_dev_release(struct device *dev) |
| 348 | { |
| 349 | struct fpga_manager *mgr = to_fpga_manager(dev); |
| 350 | |
| 351 | ida_simple_remove(&fpga_mgr_ida, mgr->dev.id); |
| 352 | kfree(mgr); |
| 353 | } |
| 354 | |
| 355 | static int __init fpga_mgr_class_init(void) |
| 356 | { |
| 357 | pr_info("FPGA manager framework\n"); |
| 358 | |
| 359 | fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager"); |
| 360 | if (IS_ERR(fpga_mgr_class)) |
| 361 | return PTR_ERR(fpga_mgr_class); |
| 362 | |
| 363 | fpga_mgr_class->dev_groups = fpga_mgr_groups; |
| 364 | fpga_mgr_class->dev_release = fpga_mgr_dev_release; |
| 365 | |
| 366 | return 0; |
| 367 | } |
| 368 | |
| 369 | static void __exit fpga_mgr_class_exit(void) |
| 370 | { |
| 371 | class_destroy(fpga_mgr_class); |
| 372 | ida_destroy(&fpga_mgr_ida); |
| 373 | } |
| 374 | |
| 375 | MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>"); |
| 376 | MODULE_DESCRIPTION("FPGA manager framework"); |
| 377 | MODULE_LICENSE("GPL v2"); |
| 378 | |
| 379 | subsys_initcall(fpga_mgr_class_init); |
| 380 | module_exit(fpga_mgr_class_exit); |