Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 76bcb31efc0685574fb123f7aaa92f8a50c14fd9 / . / arch / arm / mach-s5pc100 / dma.c
blob: b1418409709e531cc3ed47d2d971a0ace6940da4 [file] [log] [blame]
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]1/* linux/arch/arm/mach-s5pc100/dma.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]24#include <linux/dma-mapping.h>
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]25#include <linux/amba/bus.h>
26#include <linux/amba/pl330.h>
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]27
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]28#include <asm/irq.h>
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]29#include <plat/devs.h>
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]30#include <plat/irqs.h>
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]31
32#include <mach/map.h>
Ben Dooks45c79432010-05-23 16:17:10 +0100[diff] [blame]33#include <mach/irqs.h>
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]34#include <mach/dma.h>
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]35
Kukjin Kimad016772012-01-21 11:15:41 +0900[diff] [blame]36static u8 pdma0_peri[] = {
Thomas Abraham7c4cab72011-10-24 11:45:08 +0200[diff] [blame]37 DMACH_UART0_RX,
38 DMACH_UART0_TX,
39 DMACH_UART1_RX,
40 DMACH_UART1_TX,
41 DMACH_UART2_RX,
42 DMACH_UART2_TX,
43 DMACH_UART3_RX,
44 DMACH_UART3_TX,
45 DMACH_IRDA,
46 DMACH_I2S0_RX,
47 DMACH_I2S0_TX,
48 DMACH_I2S0S_TX,
49 DMACH_I2S1_RX,
50 DMACH_I2S1_TX,
51 DMACH_I2S2_RX,
52 DMACH_I2S2_TX,
53 DMACH_SPI0_RX,
54 DMACH_SPI0_TX,
55 DMACH_SPI1_RX,
56 DMACH_SPI1_TX,
57 DMACH_SPI2_RX,
58 DMACH_SPI2_TX,
59 DMACH_AC97_MICIN,
60 DMACH_AC97_PCMIN,
61 DMACH_AC97_PCMOUT,
62 DMACH_EXTERNAL,
63 DMACH_PWM,
64 DMACH_SPDIF,
65 DMACH_HSI_RX,
66 DMACH_HSI_TX,
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]67};
68
Kukjin Kimad016772012-01-21 11:15:41 +0900[diff] [blame]69static struct dma_pl330_platdata s5pc100_pdma0_pdata = {
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]70 .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
Thomas Abraham7c4cab72011-10-24 11:45:08 +0200[diff] [blame]71 .peri_id = pdma0_peri,
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]72};
73
Kukjin Kim60571f92012-03-07 03:34:41 -0800[diff] [blame]74static AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330,
75 S5PC100_PA_PDMA0, {IRQ_PDMA0}, &s5pc100_pdma0_pdata);
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]76
Kukjin Kimad016772012-01-21 11:15:41 +0900[diff] [blame]77static u8 pdma1_peri[] = {
Thomas Abraham7c4cab72011-10-24 11:45:08 +0200[diff] [blame]78 DMACH_UART0_RX,
79 DMACH_UART0_TX,
80 DMACH_UART1_RX,
81 DMACH_UART1_TX,
82 DMACH_UART2_RX,
83 DMACH_UART2_TX,
84 DMACH_UART3_RX,
85 DMACH_UART3_TX,
86 DMACH_IRDA,
87 DMACH_I2S0_RX,
88 DMACH_I2S0_TX,
89 DMACH_I2S0S_TX,
90 DMACH_I2S1_RX,
91 DMACH_I2S1_TX,
92 DMACH_I2S2_RX,
93 DMACH_I2S2_TX,
94 DMACH_SPI0_RX,
95 DMACH_SPI0_TX,
96 DMACH_SPI1_RX,
97 DMACH_SPI1_TX,
98 DMACH_SPI2_RX,
99 DMACH_SPI2_TX,
100 DMACH_PCM0_RX,
101 DMACH_PCM0_TX,
102 DMACH_PCM1_RX,
103 DMACH_PCM1_TX,
104 DMACH_MSM_REQ0,
105 DMACH_MSM_REQ1,
106 DMACH_MSM_REQ2,
107 DMACH_MSM_REQ3,
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]108};
109
Kukjin Kimad016772012-01-21 11:15:41 +0900[diff] [blame]110static struct dma_pl330_platdata s5pc100_pdma1_pdata = {
Boojin Kima422bd02011-09-02 09:44:38 +0900[diff] [blame]111 .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
Thomas Abraham7c4cab72011-10-24 11:45:08 +0200[diff] [blame]112 .peri_id = pdma1_peri,
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]113};
114
Kukjin Kim60571f92012-03-07 03:34:41 -0800[diff] [blame]115static AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330,
116 S5PC100_PA_PDMA1, {IRQ_PDMA1}, &s5pc100_pdma1_pdata);
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]117
118static int __init s5pc100_dma_init(void)
119{
Thomas Abraham7c4cab72011-10-24 11:45:08 +0200[diff] [blame]120 dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
121 dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
Russell King75c06962012-01-20 09:14:40 +0000[diff] [blame]122 amba_device_register(&s5pc100_pdma0_device, &iomem_resource);
Thomas Abraham7c4cab72011-10-24 11:45:08 +0200[diff] [blame]123
124 dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
125 dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
Russell King75c06962012-01-20 09:14:40 +0000[diff] [blame]126 amba_device_register(&s5pc100_pdma1_device, &iomem_resource);
Jassi Brarc5e2caca2010-05-18 11:59:13 +0900[diff] [blame]127
128 return 0;
129}
130arch_initcall(s5pc100_dma_init);