blob: 3df4f5fa892ad847b394c2050e8956779473afd8 [file] [log] [blame]
Chris Wilson1d8e1c72010-08-07 11:01:28 +01001/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
Joe Perchesa70491c2012-03-18 13:00:11 -070031#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
Carsten Emde7bd90902012-03-15 15:56:25 +010033#include <linux/moduleparam.h>
Chris Wilson1d8e1c72010-08-07 11:01:28 +010034#include "intel_drv.h"
35
Takashi Iwaiba3820a2011-03-10 14:02:12 +010036#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
Chris Wilson1d8e1c72010-08-07 11:01:28 +010038void
39intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
40 struct drm_display_mode *adjusted_mode)
41{
42 adjusted_mode->hdisplay = fixed_mode->hdisplay;
43 adjusted_mode->hsync_start = fixed_mode->hsync_start;
44 adjusted_mode->hsync_end = fixed_mode->hsync_end;
45 adjusted_mode->htotal = fixed_mode->htotal;
46
47 adjusted_mode->vdisplay = fixed_mode->vdisplay;
48 adjusted_mode->vsync_start = fixed_mode->vsync_start;
49 adjusted_mode->vsync_end = fixed_mode->vsync_end;
50 adjusted_mode->vtotal = fixed_mode->vtotal;
51
52 adjusted_mode->clock = fixed_mode->clock;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010053}
54
55/* adjusted_mode has been preset to be the panel's fixed mode */
56void
57intel_pch_panel_fitting(struct drm_device *dev,
58 int fitting_mode,
Daniel Vettercb1793c2012-06-04 18:39:21 +020059 const struct drm_display_mode *mode,
Chris Wilson1d8e1c72010-08-07 11:01:28 +010060 struct drm_display_mode *adjusted_mode)
61{
62 struct drm_i915_private *dev_priv = dev->dev_private;
63 int x, y, width, height;
64
65 x = y = width = height = 0;
66
67 /* Native modes don't need fitting */
68 if (adjusted_mode->hdisplay == mode->hdisplay &&
69 adjusted_mode->vdisplay == mode->vdisplay)
70 goto done;
71
72 switch (fitting_mode) {
73 case DRM_MODE_SCALE_CENTER:
74 width = mode->hdisplay;
75 height = mode->vdisplay;
76 x = (adjusted_mode->hdisplay - width + 1)/2;
77 y = (adjusted_mode->vdisplay - height + 1)/2;
78 break;
79
80 case DRM_MODE_SCALE_ASPECT:
81 /* Scale but preserve the aspect ratio */
82 {
83 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
84 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
85 if (scaled_width > scaled_height) { /* pillar */
86 width = scaled_height / mode->vdisplay;
Adam Jackson302983e2011-07-13 16:32:32 -040087 if (width & 1)
Akshay Joshi0206e352011-08-16 15:34:10 -040088 width++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010089 x = (adjusted_mode->hdisplay - width + 1) / 2;
90 y = 0;
91 height = adjusted_mode->vdisplay;
92 } else if (scaled_width < scaled_height) { /* letter */
93 height = scaled_width / mode->hdisplay;
Adam Jackson302983e2011-07-13 16:32:32 -040094 if (height & 1)
95 height++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010096 y = (adjusted_mode->vdisplay - height + 1) / 2;
97 x = 0;
98 width = adjusted_mode->hdisplay;
99 } else {
100 x = y = 0;
101 width = adjusted_mode->hdisplay;
102 height = adjusted_mode->vdisplay;
103 }
104 }
105 break;
106
107 default:
108 case DRM_MODE_SCALE_FULLSCREEN:
109 x = y = 0;
110 width = adjusted_mode->hdisplay;
111 height = adjusted_mode->vdisplay;
112 break;
113 }
114
115done:
116 dev_priv->pch_pf_pos = (x << 16) | y;
117 dev_priv->pch_pf_size = (width << 16) | height;
118}
Chris Wilsona9573552010-08-22 13:18:16 +0100119
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100120static int is_backlight_combination_mode(struct drm_device *dev)
121{
122 struct drm_i915_private *dev_priv = dev->dev_private;
123
124 if (INTEL_INFO(dev)->gen >= 4)
125 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
126
127 if (IS_GEN2(dev))
128 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
129
130 return 0;
131}
132
Chris Wilson0b0b0532010-11-23 09:45:50 +0000133static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
134{
135 u32 val;
136
137 /* Restore the CTL value if it lost, e.g. GPU reset */
138
139 if (HAS_PCH_SPLIT(dev_priv->dev)) {
140 val = I915_READ(BLC_PWM_PCH_CTL2);
141 if (dev_priv->saveBLC_PWM_CTL2 == 0) {
142 dev_priv->saveBLC_PWM_CTL2 = val;
143 } else if (val == 0) {
144 I915_WRITE(BLC_PWM_PCH_CTL2,
Simon Que2aded1b2011-11-10 17:50:26 -0800145 dev_priv->saveBLC_PWM_CTL2);
146 val = dev_priv->saveBLC_PWM_CTL2;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000147 }
148 } else {
149 val = I915_READ(BLC_PWM_CTL);
150 if (dev_priv->saveBLC_PWM_CTL == 0) {
151 dev_priv->saveBLC_PWM_CTL = val;
152 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
153 } else if (val == 0) {
154 I915_WRITE(BLC_PWM_CTL,
155 dev_priv->saveBLC_PWM_CTL);
156 I915_WRITE(BLC_PWM_CTL2,
157 dev_priv->saveBLC_PWM_CTL2);
158 val = dev_priv->saveBLC_PWM_CTL;
159 }
160 }
161
162 return val;
163}
164
Chris Wilsona9573552010-08-22 13:18:16 +0100165u32 intel_panel_get_max_backlight(struct drm_device *dev)
166{
167 struct drm_i915_private *dev_priv = dev->dev_private;
168 u32 max;
169
Chris Wilson0b0b0532010-11-23 09:45:50 +0000170 max = i915_read_blc_pwm_ctl(dev_priv);
171 if (max == 0) {
172 /* XXX add code here to query mode clock or hardware clock
173 * and program max PWM appropriately.
174 */
Joe Perchesa70491c2012-03-18 13:00:11 -0700175 pr_warn_once("fixme: max PWM is zero\n");
Chris Wilson0b0b0532010-11-23 09:45:50 +0000176 return 1;
177 }
178
Chris Wilsona9573552010-08-22 13:18:16 +0100179 if (HAS_PCH_SPLIT(dev)) {
Chris Wilson0b0b0532010-11-23 09:45:50 +0000180 max >>= 16;
Chris Wilsona9573552010-08-22 13:18:16 +0100181 } else {
Keith Packardca884792011-11-18 11:09:24 -0800182 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100183 max >>= 17;
Keith Packardca884792011-11-18 11:09:24 -0800184 else
Chris Wilsona9573552010-08-22 13:18:16 +0100185 max >>= 16;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100186
187 if (is_backlight_combination_mode(dev))
188 max *= 0xff;
Chris Wilsona9573552010-08-22 13:18:16 +0100189 }
190
Chris Wilsona9573552010-08-22 13:18:16 +0100191 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
192 return max;
193}
194
Carsten Emde4dca20e2012-03-15 15:56:26 +0100195static int i915_panel_invert_brightness;
196MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
197 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
Carsten Emde7bd90902012-03-15 15:56:25 +0100198 "report PCI device ID, subsystem vendor and subsystem device ID "
199 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
200 "It will then be included in an upcoming module version.");
Carsten Emde4dca20e2012-03-15 15:56:26 +0100201module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
Carsten Emde7bd90902012-03-15 15:56:25 +0100202static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
203{
Carsten Emde4dca20e2012-03-15 15:56:26 +0100204 struct drm_i915_private *dev_priv = dev->dev_private;
205
206 if (i915_panel_invert_brightness < 0)
207 return val;
208
209 if (i915_panel_invert_brightness > 0 ||
210 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
Carsten Emde7bd90902012-03-15 15:56:25 +0100211 return intel_panel_get_max_backlight(dev) - val;
212
213 return val;
214}
215
Stéphane Marchesinfaea35d2012-07-30 13:51:38 -0700216static u32 intel_panel_get_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100217{
218 struct drm_i915_private *dev_priv = dev->dev_private;
219 u32 val;
220
221 if (HAS_PCH_SPLIT(dev)) {
222 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
223 } else {
224 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
Keith Packardca884792011-11-18 11:09:24 -0800225 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100226 val >>= 1;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100227
Akshay Joshi0206e352011-08-16 15:34:10 -0400228 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100229 u8 lbpc;
230
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100231 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
232 val *= lbpc;
233 }
Chris Wilsona9573552010-08-22 13:18:16 +0100234 }
235
Carsten Emde7bd90902012-03-15 15:56:25 +0100236 val = intel_panel_compute_brightness(dev, val);
Chris Wilsona9573552010-08-22 13:18:16 +0100237 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
238 return val;
239}
240
241static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
242{
243 struct drm_i915_private *dev_priv = dev->dev_private;
244 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
245 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
246}
247
Takashi Iwaif52c6192011-10-14 11:45:40 +0200248static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
Chris Wilsona9573552010-08-22 13:18:16 +0100249{
250 struct drm_i915_private *dev_priv = dev->dev_private;
251 u32 tmp;
252
253 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
Carsten Emde7bd90902012-03-15 15:56:25 +0100254 level = intel_panel_compute_brightness(dev, level);
Chris Wilsona9573552010-08-22 13:18:16 +0100255
256 if (HAS_PCH_SPLIT(dev))
257 return intel_pch_panel_set_backlight(dev, level);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100258
Akshay Joshi0206e352011-08-16 15:34:10 -0400259 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100260 u32 max = intel_panel_get_max_backlight(dev);
261 u8 lbpc;
262
263 lbpc = level * 0xfe / max + 1;
264 level /= lbpc;
265 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
266 }
267
Chris Wilsona9573552010-08-22 13:18:16 +0100268 tmp = I915_READ(BLC_PWM_CTL);
Keith Packardca884792011-11-18 11:09:24 -0800269 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100270 level <<= 1;
Keith Packardca884792011-11-18 11:09:24 -0800271 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
Chris Wilsona9573552010-08-22 13:18:16 +0100272 I915_WRITE(BLC_PWM_CTL, tmp | level);
273}
Chris Wilson47356eb2011-01-11 17:06:04 +0000274
Takashi Iwaif52c6192011-10-14 11:45:40 +0200275void intel_panel_set_backlight(struct drm_device *dev, u32 level)
276{
277 struct drm_i915_private *dev_priv = dev->dev_private;
278
279 dev_priv->backlight_level = level;
280 if (dev_priv->backlight_enabled)
281 intel_panel_actually_set_backlight(dev, level);
282}
283
Chris Wilson47356eb2011-01-11 17:06:04 +0000284void intel_panel_disable_backlight(struct drm_device *dev)
285{
286 struct drm_i915_private *dev_priv = dev->dev_private;
287
Takashi Iwaif52c6192011-10-14 11:45:40 +0200288 dev_priv->backlight_enabled = false;
289 intel_panel_actually_set_backlight(dev, 0);
Daniel Vetter24ded202012-06-05 12:14:54 +0200290
291 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300292 uint32_t reg, tmp;
Daniel Vetter24ded202012-06-05 12:14:54 +0200293
294 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
295
296 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300297
298 if (HAS_PCH_SPLIT(dev)) {
299 tmp = I915_READ(BLC_PWM_PCH_CTL1);
300 tmp &= ~BLM_PCH_PWM_ENABLE;
301 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
302 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200303 }
Chris Wilson47356eb2011-01-11 17:06:04 +0000304}
305
Daniel Vetter24ded202012-06-05 12:14:54 +0200306void intel_panel_enable_backlight(struct drm_device *dev,
307 enum pipe pipe)
Chris Wilson47356eb2011-01-11 17:06:04 +0000308{
309 struct drm_i915_private *dev_priv = dev->dev_private;
310
311 if (dev_priv->backlight_level == 0)
312 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
313
Daniel Vetter24ded202012-06-05 12:14:54 +0200314 if (INTEL_INFO(dev)->gen >= 4) {
315 uint32_t reg, tmp;
316
317 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
318
319
320 tmp = I915_READ(reg);
321
322 /* Note that this can also get called through dpms changes. And
323 * we don't track the backlight dpms state, hence check whether
324 * we have to do anything first. */
325 if (tmp & BLM_PWM_ENABLE)
Takashi Iwai770c1232012-08-11 08:56:42 +0200326 goto set_level;
Daniel Vetter24ded202012-06-05 12:14:54 +0200327
328 if (dev_priv->num_pipe == 3)
329 tmp &= ~BLM_PIPE_SELECT_IVB;
330 else
331 tmp &= ~BLM_PIPE_SELECT;
332
333 tmp |= BLM_PIPE(pipe);
334 tmp &= ~BLM_PWM_ENABLE;
335
336 I915_WRITE(reg, tmp);
337 POSTING_READ(reg);
338 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300339
340 if (HAS_PCH_SPLIT(dev)) {
341 tmp = I915_READ(BLC_PWM_PCH_CTL1);
342 tmp |= BLM_PCH_PWM_ENABLE;
343 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
344 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
345 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200346 }
Takashi Iwai770c1232012-08-11 08:56:42 +0200347
348set_level:
349 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
350 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
351 * registers are set.
352 */
353 dev_priv->backlight_enabled = true;
354 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
Chris Wilson47356eb2011-01-11 17:06:04 +0000355}
356
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200357static void intel_panel_init_backlight(struct drm_device *dev)
Chris Wilson47356eb2011-01-11 17:06:04 +0000358{
359 struct drm_i915_private *dev_priv = dev->dev_private;
360
Indan Zupancicc8303e72011-01-12 11:59:19 +0000361 dev_priv->backlight_level = intel_panel_get_backlight(dev);
Chris Wilson47356eb2011-01-11 17:06:04 +0000362 dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
363}
Chris Wilsonfe16d942011-02-12 10:29:38 +0000364
365enum drm_connector_status
366intel_panel_detect(struct drm_device *dev)
367{
Dave Airliebcd50232011-03-14 14:17:55 +1000368#if 0
Chris Wilsonfe16d942011-02-12 10:29:38 +0000369 struct drm_i915_private *dev_priv = dev->dev_private;
Dave Airliebcd50232011-03-14 14:17:55 +1000370#endif
Chris Wilsonfe16d942011-02-12 10:29:38 +0000371
Chris Wilsonfca87402011-02-17 13:44:48 +0000372 if (i915_panel_ignore_lid)
373 return i915_panel_ignore_lid > 0 ?
374 connector_status_connected :
375 connector_status_disconnected;
376
Dave Airliebcd50232011-03-14 14:17:55 +1000377 /* opregion lid state on HP 2540p is wrong at boot up,
378 * appears to be either the BIOS or Linux ACPI fault */
379#if 0
Chris Wilsonfe16d942011-02-12 10:29:38 +0000380 /* Assume that the BIOS does not lie through the OpRegion... */
381 if (dev_priv->opregion.lid_state)
382 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
383 connector_status_connected :
384 connector_status_disconnected;
Dave Airliebcd50232011-03-14 14:17:55 +1000385#endif
Chris Wilsonfe16d942011-02-12 10:29:38 +0000386
387 return connector_status_unknown;
388}
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200389
390#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
391static int intel_panel_update_status(struct backlight_device *bd)
392{
393 struct drm_device *dev = bl_get_data(bd);
394 intel_panel_set_backlight(dev, bd->props.brightness);
395 return 0;
396}
397
398static int intel_panel_get_brightness(struct backlight_device *bd)
399{
400 struct drm_device *dev = bl_get_data(bd);
Takashi Iwai04b38672011-11-16 10:58:03 +0100401 struct drm_i915_private *dev_priv = dev->dev_private;
402 return dev_priv->backlight_level;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200403}
404
405static const struct backlight_ops intel_panel_bl_ops = {
406 .update_status = intel_panel_update_status,
407 .get_brightness = intel_panel_get_brightness,
408};
409
410int intel_panel_setup_backlight(struct drm_device *dev)
411{
412 struct drm_i915_private *dev_priv = dev->dev_private;
413 struct backlight_properties props;
414 struct drm_connector *connector;
415
416 intel_panel_init_backlight(dev);
417
418 if (dev_priv->int_lvds_connector)
419 connector = dev_priv->int_lvds_connector;
420 else if (dev_priv->int_edp_connector)
421 connector = dev_priv->int_edp_connector;
422 else
423 return -ENODEV;
424
Corentin Charyaf437cf2012-05-22 10:29:46 +0100425 memset(&props, 0, sizeof(props));
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200426 props.type = BACKLIGHT_RAW;
427 props.max_brightness = intel_panel_get_max_backlight(dev);
428 dev_priv->backlight =
429 backlight_device_register("intel_backlight",
430 &connector->kdev, dev,
431 &intel_panel_bl_ops, &props);
432
433 if (IS_ERR(dev_priv->backlight)) {
434 DRM_ERROR("Failed to register backlight: %ld\n",
435 PTR_ERR(dev_priv->backlight));
436 dev_priv->backlight = NULL;
437 return -ENODEV;
438 }
439 dev_priv->backlight->props.brightness = intel_panel_get_backlight(dev);
440 return 0;
441}
442
443void intel_panel_destroy_backlight(struct drm_device *dev)
444{
445 struct drm_i915_private *dev_priv = dev->dev_private;
446 if (dev_priv->backlight)
447 backlight_device_unregister(dev_priv->backlight);
448}
449#else
450int intel_panel_setup_backlight(struct drm_device *dev)
451{
452 intel_panel_init_backlight(dev);
453 return 0;
454}
455
456void intel_panel_destroy_backlight(struct drm_device *dev)
457{
458 return;
459}
460#endif