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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
29#include <linux/i2c/twl4030.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020036#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070037
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +020045 0x91, /* REG_CODEC_MODE (0x1) */
Steve Sakomancc175572008-10-30 21:35:26 -070046 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020049 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070052 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020091 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Steve Sakomancc175572008-10-30 21:35:26 -070092 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
Steve Sakomancc175572008-10-30 21:35:26 -0700119};
120
Peter Ujfalusi73939582009-01-29 14:57:50 +0200121/* codec private data */
122struct twl4030_priv {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300123 struct snd_soc_codec codec;
124
Peter Ujfalusi73939582009-01-29 14:57:50 +0200125 unsigned int codec_powered;
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200126 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200127
128 struct snd_pcm_substream *master_substream;
129 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300130
131 unsigned int configured;
132 unsigned int rate;
133 unsigned int sample_bits;
134 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300135
136 unsigned int sysclk;
137
138 /* Headset output state handling */
139 unsigned int hsl_enabled;
140 unsigned int hsr_enabled;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200141};
142
Steve Sakomancc175572008-10-30 21:35:26 -0700143/*
144 * read twl4030 register cache
145 */
146static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
147 unsigned int reg)
148{
Takashi Iwaid08664f2009-06-04 09:58:18 +0200149 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700150
Ian Molton91432e92009-01-17 17:44:23 +0000151 if (reg >= TWL4030_CACHEREGNUM)
152 return -EIO;
153
Steve Sakomancc175572008-10-30 21:35:26 -0700154 return cache[reg];
155}
156
157/*
158 * write twl4030 register cache
159 */
160static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
161 u8 reg, u8 value)
162{
163 u8 *cache = codec->reg_cache;
164
165 if (reg >= TWL4030_CACHEREGNUM)
166 return;
167 cache[reg] = value;
168}
169
170/*
171 * write to the twl4030 register space
172 */
173static int twl4030_write(struct snd_soc_codec *codec,
174 unsigned int reg, unsigned int value)
175{
176 twl4030_write_reg_cache(codec, reg, value);
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300177 if (likely(reg < TWL4030_REG_SW_SHADOW))
178 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value,
179 reg);
180 else
181 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700182}
183
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200184static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700185{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200186 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300187 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700188
Peter Ujfalusi73939582009-01-29 14:57:50 +0200189 if (enable == twl4030->codec_powered)
190 return;
191
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200192 if (enable)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300193 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200194 else
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300195 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700196
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300197 if (mode >= 0) {
198 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
199 twl4030->codec_powered = enable;
200 }
Steve Sakomancc175572008-10-30 21:35:26 -0700201
202 /* REVISIT: this delay is present in TI sample drivers */
203 /* but there seems to be no TRM requirement for it */
204 udelay(10);
205}
206
207static void twl4030_init_chip(struct snd_soc_codec *codec)
208{
Peter Ujfalusi16a30fb2009-05-29 09:22:37 +0300209 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700210 int i;
211
212 /* clear CODECPDZ prior to setting register defaults */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200213 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700214
215 /* set all audio section registers to reasonable defaults */
216 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
Peter Ujfalusi16a30fb2009-05-29 09:22:37 +0300217 twl4030_write(codec, i, cache[i]);
Steve Sakomancc175572008-10-30 21:35:26 -0700218
219}
220
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200221static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200222{
223 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300224 int status;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200225
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200226 if (enable == twl4030->apll_enabled)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200227 return;
228
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200229 if (enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200230 /* Enable PLL */
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300231 status = twl4030_codec_enable_resource(TWL4030_CODEC_RES_APLL);
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200232 else
233 /* Disable PLL */
234 status = twl4030_codec_disable_resource(TWL4030_CODEC_RES_APLL);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300235
236 if (status >= 0)
237 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200238
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200239 twl4030->apll_enabled = enable;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200240}
241
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200242static void twl4030_power_up(struct snd_soc_codec *codec)
243{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200244 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200245 u8 anamicl, regmisc1, byte;
246 int i = 0;
247
Peter Ujfalusi73939582009-01-29 14:57:50 +0200248 if (twl4030->codec_powered)
249 return;
250
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200251 /* set CODECPDZ to turn on codec */
252 twl4030_codec_enable(codec, 1);
253
254 /* initiate offset cancellation */
255 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
256 twl4030_write(codec, TWL4030_REG_ANAMICL,
257 anamicl | TWL4030_CNCL_OFFSET_START);
258
259 /* wait for offset cancellation to complete */
260 do {
261 /* this takes a little while, so don't slam i2c */
262 udelay(2000);
263 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
264 TWL4030_REG_ANAMICL);
265 } while ((i++ < 100) &&
266 ((byte & TWL4030_CNCL_OFFSET_START) ==
267 TWL4030_CNCL_OFFSET_START));
268
269 /* Make sure that the reg_cache has the same value as the HW */
270 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
271
272 /* anti-pop when changing analog gain */
273 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
274 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
275 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
276
277 /* toggle CODECPDZ as per TRM */
278 twl4030_codec_enable(codec, 0);
279 twl4030_codec_enable(codec, 1);
280}
281
Peter Ujfalusi73939582009-01-29 14:57:50 +0200282/*
283 * Unconditional power down
284 */
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200285static void twl4030_power_down(struct snd_soc_codec *codec)
286{
287 /* power down */
288 twl4030_codec_enable(codec, 0);
289}
290
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200291/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900292static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
293 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
294 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
295 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
296 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
297};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200298
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200299/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900300static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
301 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
302 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
303 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
304 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
305};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200306
307/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900308static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
309 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
310 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
311 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
312 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
313};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200314
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200315/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900316static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
317 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
318 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
319 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
320};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200321
322/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900323static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
324 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
325 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
326 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
327};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200328
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200329/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900330static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
331 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
332 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
333 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
334};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200335
336/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900337static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
338 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
339 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
340 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
341};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200342
Peter Ujfalusidf339802008-12-09 12:35:51 +0200343/* Handsfree Left */
344static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900345 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200346
347static const struct soc_enum twl4030_handsfreel_enum =
348 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
349 ARRAY_SIZE(twl4030_handsfreel_texts),
350 twl4030_handsfreel_texts);
351
352static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
353SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
354
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300355/* Handsfree Left virtual mute */
356static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
357 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
358
Peter Ujfalusidf339802008-12-09 12:35:51 +0200359/* Handsfree Right */
360static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900361 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200362
363static const struct soc_enum twl4030_handsfreer_enum =
364 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
365 ARRAY_SIZE(twl4030_handsfreer_texts),
366 twl4030_handsfreer_texts);
367
368static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
369SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
370
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300371/* Handsfree Right virtual mute */
372static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
373 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
374
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300375/* Vibra */
376/* Vibra audio path selection */
377static const char *twl4030_vibra_texts[] =
378 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
379
380static const struct soc_enum twl4030_vibra_enum =
381 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
382 ARRAY_SIZE(twl4030_vibra_texts),
383 twl4030_vibra_texts);
384
385static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
386SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
387
388/* Vibra path selection: local vibrator (PWM) or audio driven */
389static const char *twl4030_vibrapath_texts[] =
390 {"Local vibrator", "Audio"};
391
392static const struct soc_enum twl4030_vibrapath_enum =
393 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
394 ARRAY_SIZE(twl4030_vibrapath_texts),
395 twl4030_vibrapath_texts);
396
397static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
398SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
399
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200400/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900401static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300402 SOC_DAPM_SINGLE("Main Mic Capture Switch",
403 TWL4030_REG_ANAMICL, 0, 1, 0),
404 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
405 TWL4030_REG_ANAMICL, 1, 1, 0),
406 SOC_DAPM_SINGLE("AUXL Capture Switch",
407 TWL4030_REG_ANAMICL, 2, 1, 0),
408 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
409 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900410};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200411
412/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900413static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300414 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
415 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900416};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200417
418/* TX1 L/R Analog/Digital microphone selection */
419static const char *twl4030_micpathtx1_texts[] =
420 {"Analog", "Digimic0"};
421
422static const struct soc_enum twl4030_micpathtx1_enum =
423 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
424 ARRAY_SIZE(twl4030_micpathtx1_texts),
425 twl4030_micpathtx1_texts);
426
427static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
428SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
429
430/* TX2 L/R Analog/Digital microphone selection */
431static const char *twl4030_micpathtx2_texts[] =
432 {"Analog", "Digimic1"};
433
434static const struct soc_enum twl4030_micpathtx2_enum =
435 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
436 ARRAY_SIZE(twl4030_micpathtx2_texts),
437 twl4030_micpathtx2_texts);
438
439static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
440SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
441
Peter Ujfalusi73939582009-01-29 14:57:50 +0200442/* Analog bypass for AudioR1 */
443static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
444 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
445
446/* Analog bypass for AudioL1 */
447static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
448 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
449
450/* Analog bypass for AudioR2 */
451static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
452 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
453
454/* Analog bypass for AudioL2 */
455static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
456 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
457
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500458/* Analog bypass for Voice */
459static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
460 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
461
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200462/* Digital bypass gain, 0 mutes the bypass */
463static const unsigned int twl4030_dapm_dbypass_tlv[] = {
464 TLV_DB_RANGE_HEAD(2),
465 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
466 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
467};
468
469/* Digital bypass left (TX1L -> RX2L) */
470static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
471 SOC_DAPM_SINGLE_TLV("Volume",
472 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
473 twl4030_dapm_dbypass_tlv);
474
475/* Digital bypass right (TX1R -> RX2R) */
476static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
477 SOC_DAPM_SINGLE_TLV("Volume",
478 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
479 twl4030_dapm_dbypass_tlv);
480
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500481/*
482 * Voice Sidetone GAIN volume control:
483 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
484 */
485static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
486
487/* Digital bypass voice: sidetone (VUL -> VDL)*/
488static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
489 SOC_DAPM_SINGLE_TLV("Volume",
490 TWL4030_REG_VSTPGA, 0, 0x29, 0,
491 twl4030_dapm_dbypassv_tlv);
492
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200493static int micpath_event(struct snd_soc_dapm_widget *w,
494 struct snd_kcontrol *kcontrol, int event)
495{
496 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
497 unsigned char adcmicsel, micbias_ctl;
498
499 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
500 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
501 /* Prepare the bits for the given TX path:
502 * shift_l == 0: TX1 microphone path
503 * shift_l == 2: TX2 microphone path */
504 if (e->shift_l) {
505 /* TX2 microphone path */
506 if (adcmicsel & TWL4030_TX2IN_SEL)
507 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
508 else
509 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
510 } else {
511 /* TX1 microphone path */
512 if (adcmicsel & TWL4030_TX1IN_SEL)
513 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
514 else
515 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
516 }
517
518 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
519
520 return 0;
521}
522
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300523/*
524 * Output PGA builder:
525 * Handle the muting and unmuting of the given output (turning off the
526 * amplifier associated with the output pin)
527 * On mute bypass the reg_cache and mute the volume
528 * On unmute: restore the register content
529 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
530 */
531#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
532static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
533 struct snd_kcontrol *kcontrol, int event) \
534{ \
535 u8 reg_val; \
536 \
537 switch (event) { \
538 case SND_SOC_DAPM_POST_PMU: \
539 twl4030_write(w->codec, reg, \
540 twl4030_read_reg_cache(w->codec, reg)); \
541 break; \
542 case SND_SOC_DAPM_POST_PMD: \
543 reg_val = twl4030_read_reg_cache(w->codec, reg); \
544 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
545 reg_val & (~mask), \
546 reg); \
547 break; \
548 } \
549 return 0; \
550}
551
552TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
553TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
554TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
555TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
556TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
557
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300558static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800559{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800560 unsigned char hs_ctl;
561
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300562 hs_ctl = twl4030_read_reg_cache(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800563
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300564 if (ramp) {
565 /* HF ramp-up */
566 hs_ctl |= TWL4030_HF_CTL_REF_EN;
567 twl4030_write(codec, reg, hs_ctl);
568 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800569 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300570 twl4030_write(codec, reg, hs_ctl);
571 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800572 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800573 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300574 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800575 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300576 /* HF ramp-down */
577 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
578 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
579 twl4030_write(codec, reg, hs_ctl);
580 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
581 twl4030_write(codec, reg, hs_ctl);
582 udelay(40);
583 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
584 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800585 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300586}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800587
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300588static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
589 struct snd_kcontrol *kcontrol, int event)
590{
591 switch (event) {
592 case SND_SOC_DAPM_POST_PMU:
593 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
594 break;
595 case SND_SOC_DAPM_POST_PMD:
596 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
597 break;
598 }
599 return 0;
600}
601
602static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
603 struct snd_kcontrol *kcontrol, int event)
604{
605 switch (event) {
606 case SND_SOC_DAPM_POST_PMU:
607 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
608 break;
609 case SND_SOC_DAPM_POST_PMD:
610 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
611 break;
612 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800613 return 0;
614}
615
Jari Vanhala86139a12009-10-29 11:58:09 +0200616static int vibramux_event(struct snd_soc_dapm_widget *w,
617 struct snd_kcontrol *kcontrol, int event)
618{
619 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
620 return 0;
621}
622
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200623static int apll_event(struct snd_soc_dapm_widget *w,
624 struct snd_kcontrol *kcontrol, int event)
625{
626 switch (event) {
627 case SND_SOC_DAPM_PRE_PMU:
628 twl4030_apll_enable(w->codec, 1);
629 break;
630 case SND_SOC_DAPM_POST_PMD:
631 twl4030_apll_enable(w->codec, 0);
632 break;
633 }
634 return 0;
635}
636
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300637static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200638{
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500639 struct snd_soc_device *socdev = codec->socdev;
640 struct twl4030_setup_data *setup = socdev->codec_data;
641
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200642 unsigned char hs_gain, hs_pop;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300643 struct twl4030_priv *twl4030 = codec->private_data;
644 /* Base values for ramp delay calculation: 2^19 - 2^26 */
645 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
646 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200647
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300648 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
649 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200650
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500651 /* Enable external mute control, this dramatically reduces
652 * the pop-noise */
653 if (setup && setup->hs_extmute) {
654 if (setup->set_hs_extmute) {
655 setup->set_hs_extmute(1);
656 } else {
657 hs_pop |= TWL4030_EXTMUTE;
658 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
659 }
660 }
661
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300662 if (ramp) {
663 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200664 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300665 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
666 twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hs_gain);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200667 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300668 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500669 /* Wait ramp delay time + 1, so the VMID can settle */
670 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
671 twl4030->sysclk) + 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300672 } else {
673 /* Headset ramp-down _not_ according to
674 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200675 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300676 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
677 /* Wait ramp delay time + 1, so the VMID can settle */
678 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
679 twl4030->sysclk) + 1);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200680 /* Bypass the reg_cache to mute the headset */
681 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
682 hs_gain & (~0x0f),
683 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300684
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200685 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300686 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
687 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500688
689 /* Disable external mute */
690 if (setup && setup->hs_extmute) {
691 if (setup->set_hs_extmute) {
692 setup->set_hs_extmute(0);
693 } else {
694 hs_pop &= ~TWL4030_EXTMUTE;
695 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
696 }
697 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300698}
699
700static int headsetlpga_event(struct snd_soc_dapm_widget *w,
701 struct snd_kcontrol *kcontrol, int event)
702{
703 struct twl4030_priv *twl4030 = w->codec->private_data;
704
705 switch (event) {
706 case SND_SOC_DAPM_POST_PMU:
707 /* Do the ramp-up only once */
708 if (!twl4030->hsr_enabled)
709 headset_ramp(w->codec, 1);
710
711 twl4030->hsl_enabled = 1;
712 break;
713 case SND_SOC_DAPM_POST_PMD:
714 /* Do the ramp-down only if both headsetL/R is disabled */
715 if (!twl4030->hsr_enabled)
716 headset_ramp(w->codec, 0);
717
718 twl4030->hsl_enabled = 0;
719 break;
720 }
721 return 0;
722}
723
724static int headsetrpga_event(struct snd_soc_dapm_widget *w,
725 struct snd_kcontrol *kcontrol, int event)
726{
727 struct twl4030_priv *twl4030 = w->codec->private_data;
728
729 switch (event) {
730 case SND_SOC_DAPM_POST_PMU:
731 /* Do the ramp-up only once */
732 if (!twl4030->hsl_enabled)
733 headset_ramp(w->codec, 1);
734
735 twl4030->hsr_enabled = 1;
736 break;
737 case SND_SOC_DAPM_POST_PMD:
738 /* Do the ramp-down only if both headsetL/R is disabled */
739 if (!twl4030->hsl_enabled)
740 headset_ramp(w->codec, 0);
741
742 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200743 break;
744 }
745 return 0;
746}
747
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200748/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200749 * Some of the gain controls in TWL (mostly those which are associated with
750 * the outputs) are implemented in an interesting way:
751 * 0x0 : Power down (mute)
752 * 0x1 : 6dB
753 * 0x2 : 0 dB
754 * 0x3 : -6 dB
755 * Inverting not going to help with these.
756 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
757 */
758#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
759 xinvert, tlv_array) \
760{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
761 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
762 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
763 .tlv.p = (tlv_array), \
764 .info = snd_soc_info_volsw, \
765 .get = snd_soc_get_volsw_twl4030, \
766 .put = snd_soc_put_volsw_twl4030, \
767 .private_value = (unsigned long)&(struct soc_mixer_control) \
768 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
769 .max = xmax, .invert = xinvert} }
770#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
771 xinvert, tlv_array) \
772{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
773 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
774 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
775 .tlv.p = (tlv_array), \
776 .info = snd_soc_info_volsw_2r, \
777 .get = snd_soc_get_volsw_r2_twl4030,\
778 .put = snd_soc_put_volsw_r2_twl4030, \
779 .private_value = (unsigned long)&(struct soc_mixer_control) \
780 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000781 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200782#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
783 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
784 xinvert, tlv_array)
785
786static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
787 struct snd_ctl_elem_value *ucontrol)
788{
789 struct soc_mixer_control *mc =
790 (struct soc_mixer_control *)kcontrol->private_value;
791 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
792 unsigned int reg = mc->reg;
793 unsigned int shift = mc->shift;
794 unsigned int rshift = mc->rshift;
795 int max = mc->max;
796 int mask = (1 << fls(max)) - 1;
797
798 ucontrol->value.integer.value[0] =
799 (snd_soc_read(codec, reg) >> shift) & mask;
800 if (ucontrol->value.integer.value[0])
801 ucontrol->value.integer.value[0] =
802 max + 1 - ucontrol->value.integer.value[0];
803
804 if (shift != rshift) {
805 ucontrol->value.integer.value[1] =
806 (snd_soc_read(codec, reg) >> rshift) & mask;
807 if (ucontrol->value.integer.value[1])
808 ucontrol->value.integer.value[1] =
809 max + 1 - ucontrol->value.integer.value[1];
810 }
811
812 return 0;
813}
814
815static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
816 struct snd_ctl_elem_value *ucontrol)
817{
818 struct soc_mixer_control *mc =
819 (struct soc_mixer_control *)kcontrol->private_value;
820 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
821 unsigned int reg = mc->reg;
822 unsigned int shift = mc->shift;
823 unsigned int rshift = mc->rshift;
824 int max = mc->max;
825 int mask = (1 << fls(max)) - 1;
826 unsigned short val, val2, val_mask;
827
828 val = (ucontrol->value.integer.value[0] & mask);
829
830 val_mask = mask << shift;
831 if (val)
832 val = max + 1 - val;
833 val = val << shift;
834 if (shift != rshift) {
835 val2 = (ucontrol->value.integer.value[1] & mask);
836 val_mask |= mask << rshift;
837 if (val2)
838 val2 = max + 1 - val2;
839 val |= val2 << rshift;
840 }
841 return snd_soc_update_bits(codec, reg, val_mask, val);
842}
843
844static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
845 struct snd_ctl_elem_value *ucontrol)
846{
847 struct soc_mixer_control *mc =
848 (struct soc_mixer_control *)kcontrol->private_value;
849 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
850 unsigned int reg = mc->reg;
851 unsigned int reg2 = mc->rreg;
852 unsigned int shift = mc->shift;
853 int max = mc->max;
854 int mask = (1<<fls(max))-1;
855
856 ucontrol->value.integer.value[0] =
857 (snd_soc_read(codec, reg) >> shift) & mask;
858 ucontrol->value.integer.value[1] =
859 (snd_soc_read(codec, reg2) >> shift) & mask;
860
861 if (ucontrol->value.integer.value[0])
862 ucontrol->value.integer.value[0] =
863 max + 1 - ucontrol->value.integer.value[0];
864 if (ucontrol->value.integer.value[1])
865 ucontrol->value.integer.value[1] =
866 max + 1 - ucontrol->value.integer.value[1];
867
868 return 0;
869}
870
871static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
872 struct snd_ctl_elem_value *ucontrol)
873{
874 struct soc_mixer_control *mc =
875 (struct soc_mixer_control *)kcontrol->private_value;
876 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
877 unsigned int reg = mc->reg;
878 unsigned int reg2 = mc->rreg;
879 unsigned int shift = mc->shift;
880 int max = mc->max;
881 int mask = (1 << fls(max)) - 1;
882 int err;
883 unsigned short val, val2, val_mask;
884
885 val_mask = mask << shift;
886 val = (ucontrol->value.integer.value[0] & mask);
887 val2 = (ucontrol->value.integer.value[1] & mask);
888
889 if (val)
890 val = max + 1 - val;
891 if (val2)
892 val2 = max + 1 - val2;
893
894 val = val << shift;
895 val2 = val2 << shift;
896
897 err = snd_soc_update_bits(codec, reg, val_mask, val);
898 if (err < 0)
899 return err;
900
901 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
902 return err;
903}
904
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500905/* Codec operation modes */
906static const char *twl4030_op_modes_texts[] = {
907 "Option 2 (voice/audio)", "Option 1 (audio)"
908};
909
910static const struct soc_enum twl4030_op_modes_enum =
911 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
912 ARRAY_SIZE(twl4030_op_modes_texts),
913 twl4030_op_modes_texts);
914
Mark Brown423c2382009-06-20 13:54:02 +0100915static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500916 struct snd_ctl_elem_value *ucontrol)
917{
918 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
919 struct twl4030_priv *twl4030 = codec->private_data;
920 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
921 unsigned short val;
922 unsigned short mask, bitmask;
923
924 if (twl4030->configured) {
925 printk(KERN_ERR "twl4030 operation mode cannot be "
926 "changed on-the-fly\n");
927 return -EBUSY;
928 }
929
930 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
931 ;
932 if (ucontrol->value.enumerated.item[0] > e->max - 1)
933 return -EINVAL;
934
935 val = ucontrol->value.enumerated.item[0] << e->shift_l;
936 mask = (bitmask - 1) << e->shift_l;
937 if (e->shift_l != e->shift_r) {
938 if (ucontrol->value.enumerated.item[1] > e->max - 1)
939 return -EINVAL;
940 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
941 mask |= (bitmask - 1) << e->shift_r;
942 }
943
944 return snd_soc_update_bits(codec, e->reg, mask, val);
945}
946
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200947/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200948 * FGAIN volume control:
949 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
950 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200951static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200952
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200953/*
954 * CGAIN volume control:
955 * 0 dB to 12 dB in 6 dB steps
956 * value 2 and 3 means 12 dB
957 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200958static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
959
960/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900961 * Voice Downlink GAIN volume control:
962 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
963 */
964static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
965
966/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200967 * Analog playback gain
968 * -24 dB to 12 dB in 2 dB steps
969 */
970static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200971
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200972/*
Peter Ujfalusi42902392008-12-01 10:03:47 +0200973 * Gain controls tied to outputs
974 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
975 */
976static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
977
978/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +0900979 * Gain control for earpiece amplifier
980 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
981 */
982static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
983
984/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200985 * Capture gain after the ADCs
986 * from 0 dB to 31 dB in 1 dB steps
987 */
988static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
989
Grazvydas Ignotas5920b452008-12-02 20:48:58 +0200990/*
991 * Gain control for input amplifiers
992 * 0 dB to 30 dB in 6 dB steps
993 */
994static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
995
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -0500996/* AVADC clock priority */
997static const char *twl4030_avadc_clk_priority_texts[] = {
998 "Voice high priority", "HiFi high priority"
999};
1000
1001static const struct soc_enum twl4030_avadc_clk_priority_enum =
1002 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1003 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1004 twl4030_avadc_clk_priority_texts);
1005
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001006static const char *twl4030_rampdelay_texts[] = {
1007 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1008 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1009 "3495/2581/1748 ms"
1010};
1011
1012static const struct soc_enum twl4030_rampdelay_enum =
1013 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1014 ARRAY_SIZE(twl4030_rampdelay_texts),
1015 twl4030_rampdelay_texts);
1016
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001017/* Vibra H-bridge direction mode */
1018static const char *twl4030_vibradirmode_texts[] = {
1019 "Vibra H-bridge direction", "Audio data MSB",
1020};
1021
1022static const struct soc_enum twl4030_vibradirmode_enum =
1023 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1024 ARRAY_SIZE(twl4030_vibradirmode_texts),
1025 twl4030_vibradirmode_texts);
1026
1027/* Vibra H-bridge direction */
1028static const char *twl4030_vibradir_texts[] = {
1029 "Positive polarity", "Negative polarity",
1030};
1031
1032static const struct soc_enum twl4030_vibradir_enum =
1033 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1034 ARRAY_SIZE(twl4030_vibradir_texts),
1035 twl4030_vibradir_texts);
1036
Steve Sakomancc175572008-10-30 21:35:26 -07001037static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001038 /* Codec operation mode control */
1039 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1040 snd_soc_get_enum_double,
1041 snd_soc_put_twl4030_opmode_enum_double),
1042
Peter Ujfalusid889a722008-12-01 10:03:46 +02001043 /* Common playback gain controls */
1044 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1045 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1046 0, 0x3f, 0, digital_fine_tlv),
1047 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1048 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1049 0, 0x3f, 0, digital_fine_tlv),
1050
1051 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1052 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1053 6, 0x2, 0, digital_coarse_tlv),
1054 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1055 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1056 6, 0x2, 0, digital_coarse_tlv),
1057
1058 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1059 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1060 3, 0x12, 1, analog_tlv),
1061 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1062 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1063 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001064 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1065 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1066 1, 1, 0),
1067 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1068 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1069 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001070
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001071 /* Common voice downlink gain controls */
1072 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1073 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1074
1075 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1076 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1077
1078 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1079 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1080
Peter Ujfalusi42902392008-12-01 10:03:47 +02001081 /* Separate output gain controls */
1082 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1083 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1084 4, 3, 0, output_tvl),
1085
1086 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1087 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1088
1089 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1090 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1091 4, 3, 0, output_tvl),
1092
1093 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001094 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001095
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001096 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001097 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001098 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1099 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001100 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1101 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1102 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001103
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001104 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001105 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001106
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001107 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1108
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001109 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001110
1111 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1112 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001113};
1114
Steve Sakomancc175572008-10-30 21:35:26 -07001115static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001116 /* Left channel inputs */
1117 SND_SOC_DAPM_INPUT("MAINMIC"),
1118 SND_SOC_DAPM_INPUT("HSMIC"),
1119 SND_SOC_DAPM_INPUT("AUXL"),
1120 SND_SOC_DAPM_INPUT("CARKITMIC"),
1121 /* Right channel inputs */
1122 SND_SOC_DAPM_INPUT("SUBMIC"),
1123 SND_SOC_DAPM_INPUT("AUXR"),
1124 /* Digital microphones (Stereo) */
1125 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1126 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001127
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001128 /* Outputs */
Steve Sakomancc175572008-10-30 21:35:26 -07001129 SND_SOC_DAPM_OUTPUT("OUTL"),
1130 SND_SOC_DAPM_OUTPUT("OUTR"),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001131 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001132 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1133 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001134 SND_SOC_DAPM_OUTPUT("HSOL"),
1135 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001136 SND_SOC_DAPM_OUTPUT("CARKITL"),
1137 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001138 SND_SOC_DAPM_OUTPUT("HFL"),
1139 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001140 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001141
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001142 /* DACs */
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001143 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001144 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001145 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001146 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001147 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001148 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001149 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001150 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001151 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001152 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001153
Peter Ujfalusi73939582009-01-29 14:57:50 +02001154 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001155 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1156 &twl4030_dapm_abypassr1_control),
1157 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1158 &twl4030_dapm_abypassl1_control),
1159 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1160 &twl4030_dapm_abypassr2_control),
1161 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1162 &twl4030_dapm_abypassl2_control),
1163 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1164 &twl4030_dapm_abypassv_control),
1165
1166 /* Master analog loopback switch */
1167 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1168 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001169
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001170 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001171 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1172 &twl4030_dapm_dbypassl_control),
1173 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1174 &twl4030_dapm_dbypassr_control),
1175 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1176 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001177
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001178 /* Digital mixers, power control for the physical DACs */
1179 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1180 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1181 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1182 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1183 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1184 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1185 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1186 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1187 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1188 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1189
1190 /* Analog mixers, power control for the physical PGAs */
1191 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1192 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1193 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1194 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1195 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1196 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1197 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1198 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1199 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1200 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001201
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001202 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1203 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1204
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001205 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001206 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001207 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1208 &twl4030_dapm_earpiece_controls[0],
1209 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001210 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1211 0, 0, NULL, 0, earpiecepga_event,
1212 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001213 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001214 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1215 &twl4030_dapm_predrivel_controls[0],
1216 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001217 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1218 0, 0, NULL, 0, predrivelpga_event,
1219 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001220 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1221 &twl4030_dapm_predriver_controls[0],
1222 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001223 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1224 0, 0, NULL, 0, predriverpga_event,
1225 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001226 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001227 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001228 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001229 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1230 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1231 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001232 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1233 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1234 &twl4030_dapm_hsor_controls[0],
1235 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001236 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1237 0, 0, NULL, 0, headsetrpga_event,
1238 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001239 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001240 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1241 &twl4030_dapm_carkitl_controls[0],
1242 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001243 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1244 0, 0, NULL, 0, carkitlpga_event,
1245 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001246 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1247 &twl4030_dapm_carkitr_controls[0],
1248 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001249 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1250 0, 0, NULL, 0, carkitrpga_event,
1251 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001252
1253 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001254 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001255 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1256 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001257 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001258 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001259 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1260 0, 0, NULL, 0, handsfreelpga_event,
1261 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1262 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1263 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001264 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001265 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001266 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1267 0, 0, NULL, 0, handsfreerpga_event,
1268 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001269 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001270 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1271 &twl4030_dapm_vibra_control, vibramux_event,
1272 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001273 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1274 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001275
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001276 /* Introducing four virtual ADC, since TWL4030 have four channel for
1277 capture */
1278 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1279 SND_SOC_NOPM, 0, 0),
1280 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1281 SND_SOC_NOPM, 0, 0),
1282 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1283 SND_SOC_NOPM, 0, 0),
1284 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1285 SND_SOC_NOPM, 0, 0),
1286
1287 /* Analog/Digital mic path selection.
1288 TX1 Left/Right: either analog Left/Right or Digimic0
1289 TX2 Left/Right: either analog Left/Right or Digimic1 */
1290 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1291 &twl4030_dapm_micpathtx1_control, micpath_event,
1292 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1293 SND_SOC_DAPM_POST_REG),
1294 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1295 &twl4030_dapm_micpathtx2_control, micpath_event,
1296 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1297 SND_SOC_DAPM_POST_REG),
1298
Joonyoung Shim97b80962009-05-11 20:36:08 +09001299 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001300 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001301 TWL4030_REG_ANAMICL, 4, 0,
1302 &twl4030_dapm_analoglmic_controls[0],
1303 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001304 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001305 TWL4030_REG_ANAMICR, 4, 0,
1306 &twl4030_dapm_analogrmic_controls[0],
1307 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001308
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001309 SND_SOC_DAPM_PGA("ADC Physical Left",
1310 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1311 SND_SOC_DAPM_PGA("ADC Physical Right",
1312 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001313
1314 SND_SOC_DAPM_PGA("Digimic0 Enable",
1315 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1316 SND_SOC_DAPM_PGA("Digimic1 Enable",
1317 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1318
1319 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1320 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1321 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001322
Steve Sakomancc175572008-10-30 21:35:26 -07001323};
1324
1325static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001326 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1327 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1328 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1329 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1330 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001331
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001332 /* Supply for the digital part (APLL) */
1333 {"Digital R1 Playback Mixer", NULL, "APLL Enable"},
1334 {"Digital L1 Playback Mixer", NULL, "APLL Enable"},
1335 {"Digital R2 Playback Mixer", NULL, "APLL Enable"},
1336 {"Digital L2 Playback Mixer", NULL, "APLL Enable"},
1337 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1338
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001339 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1340 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1341 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1342 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1343 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001344
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001345 /* Internal playback routings */
1346 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001347 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1348 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1349 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1350 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001351 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001352 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001353 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1354 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1355 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1356 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001357 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001358 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001359 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1360 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1361 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1362 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001363 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001364 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001365 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1366 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1367 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001368 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001369 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001370 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1371 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1372 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001373 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001374 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001375 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1376 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1377 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001378 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001379 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001380 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1381 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1382 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001383 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001384 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001385 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1386 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1387 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1388 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001389 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1390 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001391 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001392 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1393 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1394 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1395 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001396 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1397 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001398 /* Vibra */
1399 {"Vibra Mux", "AudioL1", "DAC Left1"},
1400 {"Vibra Mux", "AudioR1", "DAC Right1"},
1401 {"Vibra Mux", "AudioL2", "DAC Left2"},
1402 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001403
Steve Sakomancc175572008-10-30 21:35:26 -07001404 /* outputs */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001405 {"OUTL", NULL, "Analog L2 Playback Mixer"},
1406 {"OUTR", NULL, "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001407 {"EARPIECE", NULL, "Earpiece PGA"},
1408 {"PREDRIVEL", NULL, "PredriveL PGA"},
1409 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001410 {"HSOL", NULL, "HeadsetL PGA"},
1411 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001412 {"CARKITL", NULL, "CarkitL PGA"},
1413 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001414 {"HFL", NULL, "HandsfreeL PGA"},
1415 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001416 {"Vibra Route", "Audio", "Vibra Mux"},
1417 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001418
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001419 /* Capture path */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001420 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1421 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1422 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1423 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001424
Peter Ujfalusi90289352009-08-14 08:44:00 +03001425 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1426 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001427
Peter Ujfalusi90289352009-08-14 08:44:00 +03001428 {"ADC Physical Left", NULL, "Analog Left"},
1429 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001430
1431 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1432 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1433
1434 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001435 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001436 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1437 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001438 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001439 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1440 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001441 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001442 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1443 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001444 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001445 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1446
1447 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1448 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1449 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1450 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1451
Peter Ujfalusi73939582009-01-29 14:57:50 +02001452 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001453 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1454 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1455 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1456 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1457 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001458
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001459 /* Supply for the Analog loopbacks */
1460 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1461 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1462 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1463 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1464 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1465
Peter Ujfalusi73939582009-01-29 14:57:50 +02001466 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1467 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1468 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1469 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001470 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001471
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001472 /* Digital bypass routes */
1473 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1474 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001475 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001476
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001477 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1478 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1479 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001480
Steve Sakomancc175572008-10-30 21:35:26 -07001481};
1482
1483static int twl4030_add_widgets(struct snd_soc_codec *codec)
1484{
1485 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1486 ARRAY_SIZE(twl4030_dapm_widgets));
1487
1488 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1489
1490 snd_soc_dapm_new_widgets(codec);
1491 return 0;
1492}
1493
Steve Sakomancc175572008-10-30 21:35:26 -07001494static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1495 enum snd_soc_bias_level level)
1496{
1497 switch (level) {
1498 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001499 break;
1500 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001501 break;
1502 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001503 if (codec->bias_level == SND_SOC_BIAS_OFF)
1504 twl4030_power_up(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001505 break;
1506 case SND_SOC_BIAS_OFF:
1507 twl4030_power_down(codec);
1508 break;
1509 }
1510 codec->bias_level = level;
1511
1512 return 0;
1513}
1514
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001515static void twl4030_constraints(struct twl4030_priv *twl4030,
1516 struct snd_pcm_substream *mst_substream)
1517{
1518 struct snd_pcm_substream *slv_substream;
1519
1520 /* Pick the stream, which need to be constrained */
1521 if (mst_substream == twl4030->master_substream)
1522 slv_substream = twl4030->slave_substream;
1523 else if (mst_substream == twl4030->slave_substream)
1524 slv_substream = twl4030->master_substream;
1525 else /* This should not happen.. */
1526 return;
1527
1528 /* Set the constraints according to the already configured stream */
1529 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1530 SNDRV_PCM_HW_PARAM_RATE,
1531 twl4030->rate,
1532 twl4030->rate);
1533
1534 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1535 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1536 twl4030->sample_bits,
1537 twl4030->sample_bits);
1538
1539 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1540 SNDRV_PCM_HW_PARAM_CHANNELS,
1541 twl4030->channels,
1542 twl4030->channels);
1543}
1544
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001545/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1546 * capture has to be enabled/disabled. */
1547static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1548 int enable)
1549{
1550 u8 reg, mask;
1551
1552 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1553
1554 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1555 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1556 else
1557 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1558
1559 if (enable)
1560 reg |= mask;
1561 else
1562 reg &= ~mask;
1563
1564 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1565}
1566
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001567static int twl4030_startup(struct snd_pcm_substream *substream,
1568 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001569{
1570 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1571 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001572 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001573 struct twl4030_priv *twl4030 = codec->private_data;
1574
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001575 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001576 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001577 /* The DAI has one configuration for playback and capture, so
1578 * if the DAI has been already configured then constrain this
1579 * substream to match it. */
1580 if (twl4030->configured)
1581 twl4030_constraints(twl4030, twl4030->master_substream);
1582 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001583 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1584 TWL4030_OPTION_1)) {
1585 /* In option2 4 channel is not supported, set the
1586 * constraint for the first stream for channels, the
1587 * second stream will 'inherit' this cosntraint */
1588 snd_pcm_hw_constraint_minmax(substream->runtime,
1589 SNDRV_PCM_HW_PARAM_CHANNELS,
1590 2, 2);
1591 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001592 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001593 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001594
1595 return 0;
1596}
1597
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001598static void twl4030_shutdown(struct snd_pcm_substream *substream,
1599 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001600{
1601 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1602 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001603 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001604 struct twl4030_priv *twl4030 = codec->private_data;
1605
1606 if (twl4030->master_substream == substream)
1607 twl4030->master_substream = twl4030->slave_substream;
1608
1609 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001610
1611 /* If all streams are closed, or the remaining stream has not yet
1612 * been configured than set the DAI as not configured. */
1613 if (!twl4030->master_substream)
1614 twl4030->configured = 0;
1615 else if (!twl4030->master_substream->runtime->channels)
1616 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001617
1618 /* If the closing substream had 4 channel, do the necessary cleanup */
1619 if (substream->runtime->channels == 4)
1620 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001621}
1622
Steve Sakomancc175572008-10-30 21:35:26 -07001623static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001624 struct snd_pcm_hw_params *params,
1625 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001626{
1627 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1628 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001629 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001630 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -07001631 u8 mode, old_mode, format, old_format;
1632
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001633 /* If the substream has 4 channel, do the necessary setup */
1634 if (params_channels(params) == 4) {
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001635 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1636 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1637
1638 /* Safety check: are we in the correct operating mode and
1639 * the interface is in TDM mode? */
1640 if ((mode & TWL4030_OPTION_1) &&
1641 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001642 twl4030_tdm_enable(codec, substream->stream, 1);
1643 else
1644 return -EINVAL;
1645 }
1646
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001647 if (twl4030->configured)
1648 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001649 return 0;
1650
Steve Sakomancc175572008-10-30 21:35:26 -07001651 /* bit rate */
1652 old_mode = twl4030_read_reg_cache(codec,
1653 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1654 mode = old_mode & ~TWL4030_APLL_RATE;
1655
1656 switch (params_rate(params)) {
1657 case 8000:
1658 mode |= TWL4030_APLL_RATE_8000;
1659 break;
1660 case 11025:
1661 mode |= TWL4030_APLL_RATE_11025;
1662 break;
1663 case 12000:
1664 mode |= TWL4030_APLL_RATE_12000;
1665 break;
1666 case 16000:
1667 mode |= TWL4030_APLL_RATE_16000;
1668 break;
1669 case 22050:
1670 mode |= TWL4030_APLL_RATE_22050;
1671 break;
1672 case 24000:
1673 mode |= TWL4030_APLL_RATE_24000;
1674 break;
1675 case 32000:
1676 mode |= TWL4030_APLL_RATE_32000;
1677 break;
1678 case 44100:
1679 mode |= TWL4030_APLL_RATE_44100;
1680 break;
1681 case 48000:
1682 mode |= TWL4030_APLL_RATE_48000;
1683 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001684 case 96000:
1685 mode |= TWL4030_APLL_RATE_96000;
1686 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001687 default:
1688 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1689 params_rate(params));
1690 return -EINVAL;
1691 }
1692
1693 if (mode != old_mode) {
1694 /* change rate and set CODECPDZ */
Peter Ujfalusi73939582009-01-29 14:57:50 +02001695 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001696 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001697 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001698 }
1699
1700 /* sample size */
1701 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1702 format = old_format;
1703 format &= ~TWL4030_DATA_WIDTH;
1704 switch (params_format(params)) {
1705 case SNDRV_PCM_FORMAT_S16_LE:
1706 format |= TWL4030_DATA_WIDTH_16S_16W;
1707 break;
1708 case SNDRV_PCM_FORMAT_S24_LE:
1709 format |= TWL4030_DATA_WIDTH_32S_24W;
1710 break;
1711 default:
1712 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1713 params_format(params));
1714 return -EINVAL;
1715 }
1716
1717 if (format != old_format) {
1718
1719 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001720 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001721
1722 /* change format */
1723 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1724
1725 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001726 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001727 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001728
1729 /* Store the important parameters for the DAI configuration and set
1730 * the DAI as configured */
1731 twl4030->configured = 1;
1732 twl4030->rate = params_rate(params);
1733 twl4030->sample_bits = hw_param_interval(params,
1734 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1735 twl4030->channels = params_channels(params);
1736
1737 /* If both playback and capture streams are open, and one of them
1738 * is setting the hw parameters right now (since we are here), set
1739 * constraints to the other stream to match the current one. */
1740 if (twl4030->slave_substream)
1741 twl4030_constraints(twl4030, substream);
1742
Steve Sakomancc175572008-10-30 21:35:26 -07001743 return 0;
1744}
1745
1746static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1747 int clk_id, unsigned int freq, int dir)
1748{
1749 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001750 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001751 u8 apll_ctrl;
Steve Sakomancc175572008-10-30 21:35:26 -07001752
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001753 apll_ctrl = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
1754 apll_ctrl &= ~TWL4030_APLL_INFREQ;
Steve Sakomancc175572008-10-30 21:35:26 -07001755 switch (freq) {
1756 case 19200000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001757 apll_ctrl |= TWL4030_APLL_INFREQ_19200KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001758 twl4030->sysclk = 19200;
Steve Sakomancc175572008-10-30 21:35:26 -07001759 break;
1760 case 26000000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001761 apll_ctrl |= TWL4030_APLL_INFREQ_26000KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001762 twl4030->sysclk = 26000;
Steve Sakomancc175572008-10-30 21:35:26 -07001763 break;
1764 case 38400000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001765 apll_ctrl |= TWL4030_APLL_INFREQ_38400KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001766 twl4030->sysclk = 38400;
Steve Sakomancc175572008-10-30 21:35:26 -07001767 break;
1768 default:
1769 printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
1770 freq);
1771 return -EINVAL;
1772 }
1773
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001774 twl4030_write(codec, TWL4030_REG_APLL_CTL, apll_ctrl);
Steve Sakomancc175572008-10-30 21:35:26 -07001775
1776 return 0;
1777}
1778
1779static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1780 unsigned int fmt)
1781{
1782 struct snd_soc_codec *codec = codec_dai->codec;
1783 u8 old_format, format;
1784
1785 /* get format */
1786 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1787 format = old_format;
1788
1789 /* set master/slave audio interface */
1790 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1791 case SND_SOC_DAIFMT_CBM_CFM:
1792 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001793 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001794 break;
1795 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001796 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001797 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001798 break;
1799 default:
1800 return -EINVAL;
1801 }
1802
1803 /* interface format */
1804 format &= ~TWL4030_AIF_FORMAT;
1805 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1806 case SND_SOC_DAIFMT_I2S:
1807 format |= TWL4030_AIF_FORMAT_CODEC;
1808 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001809 case SND_SOC_DAIFMT_DSP_A:
1810 format |= TWL4030_AIF_FORMAT_TDM;
1811 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001812 default:
1813 return -EINVAL;
1814 }
1815
1816 if (format != old_format) {
1817
1818 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001819 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001820
1821 /* change format */
1822 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1823
1824 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001825 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001826 }
1827
1828 return 0;
1829}
1830
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001831static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1832{
1833 struct snd_soc_codec *codec = dai->codec;
1834 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1835
1836 if (tristate)
1837 reg |= TWL4030_AIF_TRI_EN;
1838 else
1839 reg &= ~TWL4030_AIF_TRI_EN;
1840
1841 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1842}
1843
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001844/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1845 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1846static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1847 int enable)
1848{
1849 u8 reg, mask;
1850
1851 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1852
1853 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1854 mask = TWL4030_ARXL1_VRX_EN;
1855 else
1856 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1857
1858 if (enable)
1859 reg |= mask;
1860 else
1861 reg &= ~mask;
1862
1863 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1864}
1865
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001866static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1867 struct snd_soc_dai *dai)
1868{
1869 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1870 struct snd_soc_device *socdev = rtd->socdev;
1871 struct snd_soc_codec *codec = socdev->card->codec;
1872 u8 infreq;
1873 u8 mode;
1874
1875 /* If the system master clock is not 26MHz, the voice PCM interface is
1876 * not avilable.
1877 */
1878 infreq = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL)
1879 & TWL4030_APLL_INFREQ;
1880
1881 if (infreq != TWL4030_APLL_INFREQ_26000KHZ) {
1882 printk(KERN_ERR "TWL4030 voice startup: "
1883 "MCLK is not 26MHz, call set_sysclk() on init\n");
1884 return -EINVAL;
1885 }
1886
1887 /* If the codec mode is not option2, the voice PCM interface is not
1888 * avilable.
1889 */
1890 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1891 & TWL4030_OPT_MODE;
1892
1893 if (mode != TWL4030_OPTION_2) {
1894 printk(KERN_ERR "TWL4030 voice startup: "
1895 "the codec mode is not option2\n");
1896 return -EINVAL;
1897 }
1898
1899 return 0;
1900}
1901
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001902static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1903 struct snd_soc_dai *dai)
1904{
1905 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1906 struct snd_soc_device *socdev = rtd->socdev;
1907 struct snd_soc_codec *codec = socdev->card->codec;
1908
1909 /* Enable voice digital filters */
1910 twl4030_voice_enable(codec, substream->stream, 0);
1911}
1912
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001913static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1914 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1915{
1916 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1917 struct snd_soc_device *socdev = rtd->socdev;
1918 struct snd_soc_codec *codec = socdev->card->codec;
1919 u8 old_mode, mode;
1920
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001921 /* Enable voice digital filters */
1922 twl4030_voice_enable(codec, substream->stream, 1);
1923
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001924 /* bit rate */
1925 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1926 & ~(TWL4030_CODECPDZ);
1927 mode = old_mode;
1928
1929 switch (params_rate(params)) {
1930 case 8000:
1931 mode &= ~(TWL4030_SEL_16K);
1932 break;
1933 case 16000:
1934 mode |= TWL4030_SEL_16K;
1935 break;
1936 default:
1937 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
1938 params_rate(params));
1939 return -EINVAL;
1940 }
1941
1942 if (mode != old_mode) {
1943 /* change rate and set CODECPDZ */
1944 twl4030_codec_enable(codec, 0);
1945 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1946 twl4030_codec_enable(codec, 1);
1947 }
1948
1949 return 0;
1950}
1951
1952static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1953 int clk_id, unsigned int freq, int dir)
1954{
1955 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001956 u8 apll_ctrl;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001957
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001958 apll_ctrl = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
1959 apll_ctrl &= ~TWL4030_APLL_INFREQ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001960 switch (freq) {
1961 case 26000000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001962 apll_ctrl |= TWL4030_APLL_INFREQ_26000KHZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001963 break;
1964 default:
1965 printk(KERN_ERR "TWL4030 voice set sysclk: unknown rate %d\n",
1966 freq);
1967 return -EINVAL;
1968 }
1969
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001970 twl4030_write(codec, TWL4030_REG_APLL_CTL, apll_ctrl);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001971
1972 return 0;
1973}
1974
1975static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1976 unsigned int fmt)
1977{
1978 struct snd_soc_codec *codec = codec_dai->codec;
1979 u8 old_format, format;
1980
1981 /* get format */
1982 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
1983 format = old_format;
1984
1985 /* set master/slave audio interface */
1986 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05001987 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001988 format &= ~(TWL4030_VIF_SLAVE_EN);
1989 break;
1990 case SND_SOC_DAIFMT_CBS_CFS:
1991 format |= TWL4030_VIF_SLAVE_EN;
1992 break;
1993 default:
1994 return -EINVAL;
1995 }
1996
1997 /* clock inversion */
1998 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1999 case SND_SOC_DAIFMT_IB_NF:
2000 format &= ~(TWL4030_VIF_FORMAT);
2001 break;
2002 case SND_SOC_DAIFMT_NB_IF:
2003 format |= TWL4030_VIF_FORMAT;
2004 break;
2005 default:
2006 return -EINVAL;
2007 }
2008
2009 if (format != old_format) {
2010 /* change format and set CODECPDZ */
2011 twl4030_codec_enable(codec, 0);
2012 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2013 twl4030_codec_enable(codec, 1);
2014 }
2015
2016 return 0;
2017}
2018
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002019static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2020{
2021 struct snd_soc_codec *codec = dai->codec;
2022 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2023
2024 if (tristate)
2025 reg |= TWL4030_VIF_TRI_EN;
2026 else
2027 reg &= ~TWL4030_VIF_TRI_EN;
2028
2029 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2030}
2031
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002032#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07002033#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2034
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002035static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002036 .startup = twl4030_startup,
2037 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002038 .hw_params = twl4030_hw_params,
2039 .set_sysclk = twl4030_set_dai_sysclk,
2040 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002041 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002042};
2043
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002044static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2045 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002046 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002047 .hw_params = twl4030_voice_hw_params,
2048 .set_sysclk = twl4030_voice_set_dai_sysclk,
2049 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002050 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002051};
2052
2053struct snd_soc_dai twl4030_dai[] = {
2054{
Steve Sakomancc175572008-10-30 21:35:26 -07002055 .name = "twl4030",
2056 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002057 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002058 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002059 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002060 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07002061 .formats = TWL4030_FORMATS,},
2062 .capture = {
2063 .stream_name = "Capture",
2064 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002065 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002066 .rates = TWL4030_RATES,
2067 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002068 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002069},
2070{
2071 .name = "twl4030 Voice",
2072 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002073 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002074 .channels_min = 1,
2075 .channels_max = 1,
2076 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2077 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2078 .capture = {
2079 .stream_name = "Capture",
2080 .channels_min = 1,
2081 .channels_max = 2,
2082 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2083 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2084 .ops = &twl4030_dai_voice_ops,
2085},
Steve Sakomancc175572008-10-30 21:35:26 -07002086};
2087EXPORT_SYMBOL_GPL(twl4030_dai);
2088
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002089static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
Steve Sakomancc175572008-10-30 21:35:26 -07002090{
2091 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002092 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002093
2094 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2095
2096 return 0;
2097}
2098
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002099static int twl4030_soc_resume(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002100{
2101 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002102 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002103
2104 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2105 twl4030_set_bias_level(codec, codec->suspend_bias_level);
2106 return 0;
2107}
2108
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002109static struct snd_soc_codec *twl4030_codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002110
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002111static int twl4030_soc_probe(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002112{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002113 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002114 struct twl4030_setup_data *setup = socdev->codec_data;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002115 struct snd_soc_codec *codec;
2116 struct twl4030_priv *twl4030;
2117 int ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002118
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002119 BUG_ON(!twl4030_codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002120
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002121 codec = twl4030_codec;
2122 twl4030 = codec->private_data;
2123 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002124
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002125 /* Configuration for headset ramp delay from setup data */
2126 if (setup) {
2127 unsigned char hs_pop;
2128
2129 if (setup->sysclk)
2130 twl4030->sysclk = setup->sysclk;
2131 else
2132 twl4030->sysclk = 26000;
2133
2134 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
2135 hs_pop &= ~TWL4030_RAMP_DELAY;
2136 hs_pop |= (setup->ramp_delay_value << 2);
2137 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
2138 } else {
2139 twl4030->sysclk = 26000;
2140 }
2141
Steve Sakomancc175572008-10-30 21:35:26 -07002142 /* register pcms */
2143 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2144 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002145 dev_err(&pdev->dev, "failed to create pcms\n");
2146 return ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002147 }
2148
Ian Molton3e8e1952009-01-09 00:23:21 +00002149 snd_soc_add_controls(codec, twl4030_snd_controls,
2150 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07002151 twl4030_add_widgets(codec);
2152
Mark Brown968a6022008-11-28 11:49:07 +00002153 ret = snd_soc_init_card(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07002154 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002155 dev_err(&pdev->dev, "failed to register card\n");
Steve Sakomancc175572008-10-30 21:35:26 -07002156 goto card_err;
2157 }
2158
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002159 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002160
2161card_err:
2162 snd_soc_free_pcms(socdev);
2163 snd_soc_dapm_free(socdev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002164
Steve Sakomancc175572008-10-30 21:35:26 -07002165 return ret;
2166}
2167
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002168static int twl4030_soc_remove(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002169{
2170 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002171 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002172
Peter Ujfalusi73939582009-01-29 14:57:50 +02002173 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02002174 snd_soc_free_pcms(socdev);
2175 snd_soc_dapm_free(socdev);
Peter Ujfalusi73939582009-01-29 14:57:50 +02002176 kfree(codec->private_data);
Steve Sakomancc175572008-10-30 21:35:26 -07002177 kfree(codec);
2178
2179 return 0;
2180}
2181
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002182static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2183{
2184 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2185 struct snd_soc_codec *codec;
2186 struct twl4030_priv *twl4030;
2187 int ret;
2188
2189 if (!pdata || !(pdata->audio_mclk == 19200000 ||
2190 pdata->audio_mclk == 26000000 ||
2191 pdata->audio_mclk == 38400000)) {
2192 dev_err(&pdev->dev, "Invalid platform_data\n");
2193 return -EINVAL;
2194 }
2195
2196 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2197 if (twl4030 == NULL) {
2198 dev_err(&pdev->dev, "Can not allocate memroy\n");
2199 return -ENOMEM;
2200 }
2201
2202 codec = &twl4030->codec;
2203 codec->private_data = twl4030;
2204 codec->dev = &pdev->dev;
2205 twl4030_dai[0].dev = &pdev->dev;
2206 twl4030_dai[1].dev = &pdev->dev;
2207
2208 mutex_init(&codec->mutex);
2209 INIT_LIST_HEAD(&codec->dapm_widgets);
2210 INIT_LIST_HEAD(&codec->dapm_paths);
2211
2212 codec->name = "twl4030";
2213 codec->owner = THIS_MODULE;
2214 codec->read = twl4030_read_reg_cache;
2215 codec->write = twl4030_write;
2216 codec->set_bias_level = twl4030_set_bias_level;
2217 codec->dai = twl4030_dai;
2218 codec->num_dai = ARRAY_SIZE(twl4030_dai),
2219 codec->reg_cache_size = sizeof(twl4030_reg);
2220 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2221 GFP_KERNEL);
2222 if (codec->reg_cache == NULL) {
2223 ret = -ENOMEM;
2224 goto error_cache;
2225 }
2226
2227 platform_set_drvdata(pdev, twl4030);
2228 twl4030_codec = codec;
2229
2230 /* Set the defaults, and power up the codec */
2231 twl4030_init_chip(codec);
2232 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2233
2234 ret = snd_soc_register_codec(codec);
2235 if (ret != 0) {
2236 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2237 goto error_codec;
2238 }
2239
2240 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2241 if (ret != 0) {
2242 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2243 snd_soc_unregister_codec(codec);
2244 goto error_codec;
2245 }
2246
2247 return 0;
2248
2249error_codec:
2250 twl4030_power_down(codec);
2251 kfree(codec->reg_cache);
2252error_cache:
2253 kfree(twl4030);
2254 return ret;
2255}
2256
2257static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2258{
2259 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2260
2261 kfree(twl4030);
2262
2263 twl4030_codec = NULL;
2264 return 0;
2265}
2266
2267MODULE_ALIAS("platform:twl4030_codec_audio");
2268
2269static struct platform_driver twl4030_codec_driver = {
2270 .probe = twl4030_codec_probe,
2271 .remove = __devexit_p(twl4030_codec_remove),
2272 .driver = {
2273 .name = "twl4030_codec_audio",
2274 .owner = THIS_MODULE,
2275 },
Steve Sakomancc175572008-10-30 21:35:26 -07002276};
Steve Sakomancc175572008-10-30 21:35:26 -07002277
Takashi Iwai24e07db2008-12-10 07:40:24 +01002278static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00002279{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002280 return platform_driver_register(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002281}
Takashi Iwai24e07db2008-12-10 07:40:24 +01002282module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00002283
2284static void __exit twl4030_exit(void)
2285{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002286 platform_driver_unregister(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002287}
2288module_exit(twl4030_exit);
2289
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002290struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2291 .probe = twl4030_soc_probe,
2292 .remove = twl4030_soc_remove,
2293 .suspend = twl4030_soc_suspend,
2294 .resume = twl4030_soc_resume,
2295};
2296EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2297
Steve Sakomancc175572008-10-30 21:35:26 -07002298MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2299MODULE_AUTHOR("Steve Sakoman");
2300MODULE_LICENSE("GPL");