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Bard Liao997b0522013-06-11 13:10:16 +08001/*
Oder Chioub0c27842014-04-10 10:57:34 +08002 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
Bard Liao997b0522013-06-11 13:10:16 +08003 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
Sachin Kamataffb74a2014-04-04 11:29:11 +053021#include <linux/of.h>
Stephen Warrendcad9f02013-06-12 11:34:30 -060022#include <linux/of_gpio.h>
Bard Liao997b0522013-06-11 13:10:16 +080023#include <linux/platform_device.h>
24#include <linux/spi/spi.h>
Liam Girdwood02b80772013-09-13 17:57:36 +010025#include <linux/acpi.h>
Bard Liao997b0522013-06-11 13:10:16 +080026#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/initval.h>
32#include <sound/tlv.h>
33
Oder Chiou49ef7922014-05-20 15:01:53 +080034#include "rl6231.h"
Bard Liao997b0522013-06-11 13:10:16 +080035#include "rt5640.h"
36
37#define RT5640_DEVICE_ID 0x6231
38
39#define RT5640_PR_RANGE_BASE (0xff + 1)
40#define RT5640_PR_SPACING 0x100
41
42#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
43
44static const struct regmap_range_cfg rt5640_ranges[] = {
45 { .name = "PR", .range_min = RT5640_PR_BASE,
46 .range_max = RT5640_PR_BASE + 0xb4,
47 .selector_reg = RT5640_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5640_PRIV_DATA,
51 .window_len = 0x1, },
52};
53
54static struct reg_default init_list[] = {
55 {RT5640_PR_BASE + 0x3d, 0x3600},
Bard Liao997b0522013-06-11 13:10:16 +080056 {RT5640_PR_BASE + 0x12, 0x0aa8},
57 {RT5640_PR_BASE + 0x14, 0x0aaa},
58 {RT5640_PR_BASE + 0x20, 0x6110},
59 {RT5640_PR_BASE + 0x21, 0xe0e0},
60 {RT5640_PR_BASE + 0x23, 0x1804},
61};
62#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
63
Oder Chiou2f2a7142014-03-28 20:28:25 +080064static const struct reg_default rt5640_reg[] = {
Bard Liao997b0522013-06-11 13:10:16 +080065 { 0x00, 0x000e },
66 { 0x01, 0xc8c8 },
67 { 0x02, 0xc8c8 },
68 { 0x03, 0xc8c8 },
69 { 0x04, 0x8000 },
70 { 0x0d, 0x0000 },
71 { 0x0e, 0x0000 },
72 { 0x0f, 0x0808 },
73 { 0x19, 0xafaf },
74 { 0x1a, 0xafaf },
75 { 0x1b, 0x0000 },
76 { 0x1c, 0x2f2f },
77 { 0x1d, 0x2f2f },
78 { 0x1e, 0x0000 },
79 { 0x27, 0x7060 },
80 { 0x28, 0x7070 },
81 { 0x29, 0x8080 },
82 { 0x2a, 0x5454 },
83 { 0x2b, 0x5454 },
84 { 0x2c, 0xaa00 },
85 { 0x2d, 0x0000 },
86 { 0x2e, 0xa000 },
87 { 0x2f, 0x0000 },
88 { 0x3b, 0x0000 },
89 { 0x3c, 0x007f },
90 { 0x3d, 0x0000 },
91 { 0x3e, 0x007f },
92 { 0x45, 0xe000 },
93 { 0x46, 0x003e },
94 { 0x47, 0x003e },
95 { 0x48, 0xf800 },
96 { 0x49, 0x3800 },
97 { 0x4a, 0x0004 },
98 { 0x4c, 0xfc00 },
99 { 0x4d, 0x0000 },
100 { 0x4f, 0x01ff },
101 { 0x50, 0x0000 },
102 { 0x51, 0x0000 },
103 { 0x52, 0x01ff },
104 { 0x53, 0xf000 },
105 { 0x61, 0x0000 },
106 { 0x62, 0x0000 },
107 { 0x63, 0x00c0 },
108 { 0x64, 0x0000 },
109 { 0x65, 0x0000 },
110 { 0x66, 0x0000 },
111 { 0x6a, 0x0000 },
112 { 0x6c, 0x0000 },
113 { 0x70, 0x8000 },
114 { 0x71, 0x8000 },
115 { 0x72, 0x8000 },
116 { 0x73, 0x1114 },
117 { 0x74, 0x0c00 },
118 { 0x75, 0x1d00 },
119 { 0x80, 0x0000 },
120 { 0x81, 0x0000 },
121 { 0x82, 0x0000 },
122 { 0x83, 0x0000 },
123 { 0x84, 0x0000 },
124 { 0x85, 0x0008 },
125 { 0x89, 0x0000 },
126 { 0x8a, 0x0000 },
127 { 0x8b, 0x0600 },
128 { 0x8c, 0x0228 },
129 { 0x8d, 0xa000 },
130 { 0x8e, 0x0004 },
131 { 0x8f, 0x1100 },
132 { 0x90, 0x0646 },
133 { 0x91, 0x0c00 },
134 { 0x92, 0x0000 },
135 { 0x93, 0x3000 },
136 { 0xb0, 0x2080 },
137 { 0xb1, 0x0000 },
138 { 0xb4, 0x2206 },
139 { 0xb5, 0x1f00 },
140 { 0xb6, 0x0000 },
141 { 0xb8, 0x034b },
142 { 0xb9, 0x0066 },
143 { 0xba, 0x000b },
144 { 0xbb, 0x0000 },
145 { 0xbc, 0x0000 },
146 { 0xbd, 0x0000 },
147 { 0xbe, 0x0000 },
148 { 0xbf, 0x0000 },
149 { 0xc0, 0x0400 },
150 { 0xc2, 0x0000 },
151 { 0xc4, 0x0000 },
152 { 0xc5, 0x0000 },
153 { 0xc6, 0x2000 },
154 { 0xc8, 0x0000 },
155 { 0xc9, 0x0000 },
156 { 0xca, 0x0000 },
157 { 0xcb, 0x0000 },
158 { 0xcc, 0x0000 },
159 { 0xcf, 0x0013 },
160 { 0xd0, 0x0680 },
161 { 0xd1, 0x1c17 },
162 { 0xd2, 0x8c00 },
163 { 0xd3, 0xaa20 },
164 { 0xd6, 0x0400 },
165 { 0xd9, 0x0809 },
166 { 0xfe, 0x10ec },
167 { 0xff, 0x6231 },
168};
169
170static int rt5640_reset(struct snd_soc_codec *codec)
171{
172 return snd_soc_write(codec, RT5640_RESET, 0);
173}
174
175static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
176{
177 int i;
178
179 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
180 if ((reg >= rt5640_ranges[i].window_start &&
181 reg <= rt5640_ranges[i].window_start +
182 rt5640_ranges[i].window_len) ||
183 (reg >= rt5640_ranges[i].range_min &&
184 reg <= rt5640_ranges[i].range_max))
185 return true;
186
187 switch (reg) {
188 case RT5640_RESET:
189 case RT5640_ASRC_5:
190 case RT5640_EQ_CTRL1:
191 case RT5640_DRC_AGC_1:
192 case RT5640_ANC_CTRL1:
193 case RT5640_IRQ_CTRL2:
194 case RT5640_INT_IRQ_ST:
195 case RT5640_DSP_CTRL2:
196 case RT5640_DSP_CTRL3:
197 case RT5640_PRIV_INDEX:
198 case RT5640_PRIV_DATA:
199 case RT5640_PGM_REG_ARR1:
200 case RT5640_PGM_REG_ARR3:
201 case RT5640_VENDOR_ID:
202 case RT5640_VENDOR_ID1:
203 case RT5640_VENDOR_ID2:
204 return true;
205 default:
206 return false;
207 }
208}
209
210static bool rt5640_readable_register(struct device *dev, unsigned int reg)
211{
212 int i;
213
214 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
215 if ((reg >= rt5640_ranges[i].window_start &&
216 reg <= rt5640_ranges[i].window_start +
217 rt5640_ranges[i].window_len) ||
218 (reg >= rt5640_ranges[i].range_min &&
219 reg <= rt5640_ranges[i].range_max))
220 return true;
221
222 switch (reg) {
223 case RT5640_RESET:
224 case RT5640_SPK_VOL:
225 case RT5640_HP_VOL:
226 case RT5640_OUTPUT:
227 case RT5640_MONO_OUT:
228 case RT5640_IN1_IN2:
229 case RT5640_IN3_IN4:
230 case RT5640_INL_INR_VOL:
231 case RT5640_DAC1_DIG_VOL:
232 case RT5640_DAC2_DIG_VOL:
233 case RT5640_DAC2_CTRL:
234 case RT5640_ADC_DIG_VOL:
235 case RT5640_ADC_DATA:
236 case RT5640_ADC_BST_VOL:
237 case RT5640_STO_ADC_MIXER:
238 case RT5640_MONO_ADC_MIXER:
239 case RT5640_AD_DA_MIXER:
240 case RT5640_STO_DAC_MIXER:
241 case RT5640_MONO_DAC_MIXER:
242 case RT5640_DIG_MIXER:
243 case RT5640_DSP_PATH1:
244 case RT5640_DSP_PATH2:
245 case RT5640_DIG_INF_DATA:
246 case RT5640_REC_L1_MIXER:
247 case RT5640_REC_L2_MIXER:
248 case RT5640_REC_R1_MIXER:
249 case RT5640_REC_R2_MIXER:
250 case RT5640_HPO_MIXER:
251 case RT5640_SPK_L_MIXER:
252 case RT5640_SPK_R_MIXER:
253 case RT5640_SPO_L_MIXER:
254 case RT5640_SPO_R_MIXER:
255 case RT5640_SPO_CLSD_RATIO:
256 case RT5640_MONO_MIXER:
257 case RT5640_OUT_L1_MIXER:
258 case RT5640_OUT_L2_MIXER:
259 case RT5640_OUT_L3_MIXER:
260 case RT5640_OUT_R1_MIXER:
261 case RT5640_OUT_R2_MIXER:
262 case RT5640_OUT_R3_MIXER:
263 case RT5640_LOUT_MIXER:
264 case RT5640_PWR_DIG1:
265 case RT5640_PWR_DIG2:
266 case RT5640_PWR_ANLG1:
267 case RT5640_PWR_ANLG2:
268 case RT5640_PWR_MIXER:
269 case RT5640_PWR_VOL:
270 case RT5640_PRIV_INDEX:
271 case RT5640_PRIV_DATA:
272 case RT5640_I2S1_SDP:
273 case RT5640_I2S2_SDP:
274 case RT5640_ADDA_CLK1:
275 case RT5640_ADDA_CLK2:
276 case RT5640_DMIC:
277 case RT5640_GLB_CLK:
278 case RT5640_PLL_CTRL1:
279 case RT5640_PLL_CTRL2:
280 case RT5640_ASRC_1:
281 case RT5640_ASRC_2:
282 case RT5640_ASRC_3:
283 case RT5640_ASRC_4:
284 case RT5640_ASRC_5:
285 case RT5640_HP_OVCD:
286 case RT5640_CLS_D_OVCD:
287 case RT5640_CLS_D_OUT:
288 case RT5640_DEPOP_M1:
289 case RT5640_DEPOP_M2:
290 case RT5640_DEPOP_M3:
291 case RT5640_CHARGE_PUMP:
292 case RT5640_PV_DET_SPK_G:
293 case RT5640_MICBIAS:
294 case RT5640_EQ_CTRL1:
295 case RT5640_EQ_CTRL2:
296 case RT5640_WIND_FILTER:
297 case RT5640_DRC_AGC_1:
298 case RT5640_DRC_AGC_2:
299 case RT5640_DRC_AGC_3:
300 case RT5640_SVOL_ZC:
301 case RT5640_ANC_CTRL1:
302 case RT5640_ANC_CTRL2:
303 case RT5640_ANC_CTRL3:
304 case RT5640_JD_CTRL:
305 case RT5640_ANC_JD:
306 case RT5640_IRQ_CTRL1:
307 case RT5640_IRQ_CTRL2:
308 case RT5640_INT_IRQ_ST:
309 case RT5640_GPIO_CTRL1:
310 case RT5640_GPIO_CTRL2:
311 case RT5640_GPIO_CTRL3:
312 case RT5640_DSP_CTRL1:
313 case RT5640_DSP_CTRL2:
314 case RT5640_DSP_CTRL3:
315 case RT5640_DSP_CTRL4:
316 case RT5640_PGM_REG_ARR1:
317 case RT5640_PGM_REG_ARR2:
318 case RT5640_PGM_REG_ARR3:
319 case RT5640_PGM_REG_ARR4:
320 case RT5640_PGM_REG_ARR5:
321 case RT5640_SCB_FUNC:
322 case RT5640_SCB_CTRL:
323 case RT5640_BASE_BACK:
324 case RT5640_MP3_PLUS1:
325 case RT5640_MP3_PLUS2:
326 case RT5640_3D_HP:
327 case RT5640_ADJ_HPF:
328 case RT5640_HP_CALIB_AMP_DET:
329 case RT5640_HP_CALIB2:
330 case RT5640_SV_ZCD1:
331 case RT5640_SV_ZCD2:
332 case RT5640_DUMMY1:
333 case RT5640_DUMMY2:
334 case RT5640_DUMMY3:
335 case RT5640_VENDOR_ID:
336 case RT5640_VENDOR_ID1:
337 case RT5640_VENDOR_ID2:
338 return true;
339 default:
340 return false;
341 }
342}
343
344static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
345static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
346static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
347static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
348static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
349
350/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
351static unsigned int bst_tlv[] = {
352 TLV_DB_RANGE_HEAD(7),
353 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
354 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
355 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
356 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
357 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
358 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
359 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
360};
361
362/* Interface data select */
363static const char * const rt5640_data_select[] = {
364 "Normal", "left copy to right", "right copy to left", "Swap"};
365
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100366static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
367 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800368
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100369static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
370 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800371
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100372static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
373 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800374
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100375static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
376 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800377
378/* Class D speaker gain ratio */
379static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
380 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
381
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100382static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
383 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
Bard Liao997b0522013-06-11 13:10:16 +0800384
385static const struct snd_kcontrol_new rt5640_snd_controls[] = {
386 /* Speaker Output Volume */
Bard Liao997b0522013-06-11 13:10:16 +0800387 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
388 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
389 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
390 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
391 /* Headphone Output Volume */
Bard Liao997b0522013-06-11 13:10:16 +0800392 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
393 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
394 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
395 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
396 /* OUTPUT Control */
397 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
398 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
399 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
400 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
401 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
402 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
Oder Chiou022d21f2014-04-08 19:40:00 +0800403
Bard Liao997b0522013-06-11 13:10:16 +0800404 /* DAC Digital Volume */
405 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
406 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
407 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
408 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
409 175, 0, dac_vol_tlv),
Bard Liao997b0522013-06-11 13:10:16 +0800410 /* IN1/IN2 Control */
411 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
412 RT5640_BST_SFT1, 8, 0, bst_tlv),
413 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
414 RT5640_BST_SFT2, 8, 0, bst_tlv),
415 /* INL/INR Volume Control */
416 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
417 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
418 31, 1, in_vol_tlv),
419 /* ADC Digital Volume Control */
420 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
421 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
422 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
423 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
424 127, 0, adc_vol_tlv),
425 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
426 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
427 127, 0, adc_vol_tlv),
428 /* ADC Boost Volume Control */
429 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
430 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
431 3, 0, adc_bst_tlv),
432 /* Class D speaker gain ratio */
433 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
434
435 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
436 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
437 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
438 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
439};
440
Oder Chiou022d21f2014-04-08 19:40:00 +0800441static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
442 /* MONO Output Control */
443 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
444 1, 1),
445
446 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
447 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
448};
449
Bard Liao997b0522013-06-11 13:10:16 +0800450/**
451 * set_dmic_clk - Set parameter of dmic.
452 *
453 * @w: DAPM widget.
454 * @kcontrol: The kcontrol of this widget.
455 * @event: Event id.
456 *
Bard Liao997b0522013-06-11 13:10:16 +0800457 */
458static int set_dmic_clk(struct snd_soc_dapm_widget *w,
459 struct snd_kcontrol *kcontrol, int event)
460{
461 struct snd_soc_codec *codec = w->codec;
462 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Oder Chiou49ef7922014-05-20 15:01:53 +0800463 int idx = -EINVAL;
Bard Liao997b0522013-06-11 13:10:16 +0800464
Oder Chiou49ef7922014-05-20 15:01:53 +0800465 idx = rl6231_calc_dmic_clk(rt5640->sysclk);
466
Bard Liao997b0522013-06-11 13:10:16 +0800467 if (idx < 0)
468 dev_err(codec->dev, "Failed to set DMIC clock\n");
469 else
470 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
471 idx << RT5640_DMIC_CLK_SFT);
472 return idx;
473}
474
Oder Chiou218a3f92014-03-28 20:28:26 +0800475static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
Bard Liao997b0522013-06-11 13:10:16 +0800476 struct snd_soc_dapm_widget *sink)
477{
478 unsigned int val;
479
480 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
481 val &= RT5640_SCLK_SRC_MASK;
Oder Chiouacf04e62014-03-28 20:28:27 +0800482 if (val == RT5640_SCLK_SRC_PLL1)
Bard Liao997b0522013-06-11 13:10:16 +0800483 return 1;
484 else
485 return 0;
486}
487
488/* Digital Mixer */
489static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
490 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
491 RT5640_M_ADC_L1_SFT, 1, 1),
492 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
493 RT5640_M_ADC_L2_SFT, 1, 1),
494};
495
496static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
497 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
498 RT5640_M_ADC_R1_SFT, 1, 1),
499 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
500 RT5640_M_ADC_R2_SFT, 1, 1),
501};
502
503static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
504 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
505 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
506 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
507 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
508};
509
510static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
511 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
512 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
513 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
514 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
515};
516
517static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
518 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
519 RT5640_M_ADCMIX_L_SFT, 1, 1),
520 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
521 RT5640_M_IF1_DAC_L_SFT, 1, 1),
522};
523
524static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
525 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
526 RT5640_M_ADCMIX_R_SFT, 1, 1),
527 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
528 RT5640_M_IF1_DAC_R_SFT, 1, 1),
529};
530
531static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
532 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
533 RT5640_M_DAC_L1_SFT, 1, 1),
534 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
535 RT5640_M_DAC_L2_SFT, 1, 1),
536 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
537 RT5640_M_ANC_DAC_L_SFT, 1, 1),
538};
539
540static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
541 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
542 RT5640_M_DAC_R1_SFT, 1, 1),
543 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
544 RT5640_M_DAC_R2_SFT, 1, 1),
545 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
546 RT5640_M_ANC_DAC_R_SFT, 1, 1),
547};
548
Oder Chiou022d21f2014-04-08 19:40:00 +0800549static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
550 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_DAC_L1_SFT, 1, 1),
552 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
553 RT5640_M_DAC_L2_SFT, 1, 1),
554};
555
556static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
557 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
558 RT5640_M_DAC_R1_SFT, 1, 1),
559 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
560 RT5640_M_DAC_R2_SFT, 1, 1),
561};
562
Bard Liao997b0522013-06-11 13:10:16 +0800563static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
564 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
565 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
566 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
567 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
568 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
569 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
570};
571
572static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
573 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
574 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
575 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
576 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
577 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
578 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
579};
580
581static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
582 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
583 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
584 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
585 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
586};
587
588static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
589 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
590 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
591 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
592 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
593};
594
595/* Analog Input Mixer */
596static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
597 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
598 RT5640_M_HP_L_RM_L_SFT, 1, 1),
599 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
600 RT5640_M_IN_L_RM_L_SFT, 1, 1),
601 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
602 RT5640_M_BST4_RM_L_SFT, 1, 1),
603 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
604 RT5640_M_BST1_RM_L_SFT, 1, 1),
605 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
606 RT5640_M_OM_L_RM_L_SFT, 1, 1),
607};
608
609static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
610 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
611 RT5640_M_HP_R_RM_R_SFT, 1, 1),
612 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
613 RT5640_M_IN_R_RM_R_SFT, 1, 1),
614 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
615 RT5640_M_BST4_RM_R_SFT, 1, 1),
616 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
617 RT5640_M_BST1_RM_R_SFT, 1, 1),
618 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
619 RT5640_M_OM_R_RM_R_SFT, 1, 1),
620};
621
622/* Analog Output Mixer */
623static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
624 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
625 RT5640_M_RM_L_SM_L_SFT, 1, 1),
626 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
627 RT5640_M_IN_L_SM_L_SFT, 1, 1),
628 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
629 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
630 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
631 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
632 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
633 RT5640_M_OM_L_SM_L_SFT, 1, 1),
634};
635
636static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
637 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
638 RT5640_M_RM_R_SM_R_SFT, 1, 1),
639 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
640 RT5640_M_IN_R_SM_R_SFT, 1, 1),
641 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
642 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
643 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
644 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
645 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
646 RT5640_M_OM_R_SM_R_SFT, 1, 1),
647};
648
649static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
650 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
651 RT5640_M_SM_L_OM_L_SFT, 1, 1),
652 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
653 RT5640_M_BST1_OM_L_SFT, 1, 1),
654 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
655 RT5640_M_IN_L_OM_L_SFT, 1, 1),
656 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
657 RT5640_M_RM_L_OM_L_SFT, 1, 1),
658 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
659 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
660 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
661 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
662 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
663 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
664};
665
666static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
667 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
668 RT5640_M_SM_L_OM_R_SFT, 1, 1),
669 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
670 RT5640_M_BST4_OM_R_SFT, 1, 1),
671 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
672 RT5640_M_BST1_OM_R_SFT, 1, 1),
673 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
674 RT5640_M_IN_R_OM_R_SFT, 1, 1),
675 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
676 RT5640_M_RM_R_OM_R_SFT, 1, 1),
677 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
678 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
679 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
680 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
682 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
683};
684
Oder Chiou022d21f2014-04-08 19:40:00 +0800685static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
686 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
687 RT5640_M_BST1_OM_L_SFT, 1, 1),
688 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
689 RT5640_M_IN_L_OM_L_SFT, 1, 1),
690 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
691 RT5640_M_RM_L_OM_L_SFT, 1, 1),
692 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
693 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
694};
695
696static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
697 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
698 RT5640_M_BST4_OM_R_SFT, 1, 1),
699 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
700 RT5640_M_BST1_OM_R_SFT, 1, 1),
701 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
702 RT5640_M_IN_R_OM_R_SFT, 1, 1),
703 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
704 RT5640_M_RM_R_OM_R_SFT, 1, 1),
705 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
706 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
707};
708
Bard Liao997b0522013-06-11 13:10:16 +0800709static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
710 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
711 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
712 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
713 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
714 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
715 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
716 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
717 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
718 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
719 RT5640_M_BST1_SPM_L_SFT, 1, 1),
720};
721
722static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
723 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
724 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
725 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
726 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
727 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
728 RT5640_M_BST1_SPM_R_SFT, 1, 1),
729};
730
731static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
732 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
733 RT5640_M_DAC2_HM_SFT, 1, 1),
734 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
735 RT5640_M_DAC1_HM_SFT, 1, 1),
736 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
737 RT5640_M_HPVOL_HM_SFT, 1, 1),
738};
739
Oder Chiou022d21f2014-04-08 19:40:00 +0800740static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
741 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
742 RT5640_M_DAC1_HM_SFT, 1, 1),
743 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
744 RT5640_M_HPVOL_HM_SFT, 1, 1),
745};
746
Bard Liao997b0522013-06-11 13:10:16 +0800747static const struct snd_kcontrol_new rt5640_lout_mix[] = {
748 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
749 RT5640_M_DAC_L1_LM_SFT, 1, 1),
750 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
751 RT5640_M_DAC_R1_LM_SFT, 1, 1),
752 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
753 RT5640_M_OV_L_LM_SFT, 1, 1),
754 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
755 RT5640_M_OV_R_LM_SFT, 1, 1),
756};
757
758static const struct snd_kcontrol_new rt5640_mono_mix[] = {
759 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
760 RT5640_M_DAC_R2_MM_SFT, 1, 1),
761 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
762 RT5640_M_DAC_L2_MM_SFT, 1, 1),
763 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
764 RT5640_M_OV_R_MM_SFT, 1, 1),
765 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
766 RT5640_M_OV_L_MM_SFT, 1, 1),
767 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
768 RT5640_M_BST1_MM_SFT, 1, 1),
769};
770
Bard Liao246693b2013-08-23 10:29:26 +0800771static const struct snd_kcontrol_new spk_l_enable_control =
772 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
773 RT5640_L_MUTE_SFT, 1, 1);
774
775static const struct snd_kcontrol_new spk_r_enable_control =
776 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
777 RT5640_R_MUTE_SFT, 1, 1);
778
779static const struct snd_kcontrol_new hp_l_enable_control =
780 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
781 RT5640_L_MUTE_SFT, 1, 1);
782
783static const struct snd_kcontrol_new hp_r_enable_control =
784 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
785 RT5640_R_MUTE_SFT, 1, 1);
786
Bard Liao997b0522013-06-11 13:10:16 +0800787/* Stereo ADC source */
788static const char * const rt5640_stereo_adc1_src[] = {
789 "DIG MIX", "ADC"
790};
791
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100792static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
793 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800794
795static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
796 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
797
798static const char * const rt5640_stereo_adc2_src[] = {
799 "DMIC1", "DMIC2", "DIG MIX"
800};
801
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100802static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
803 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800804
805static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
806 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
807
808/* Mono ADC source */
809static const char * const rt5640_mono_adc_l1_src[] = {
810 "Mono DAC MIXL", "ADCL"
811};
812
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100813static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
814 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800815
816static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
817 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
818
819static const char * const rt5640_mono_adc_l2_src[] = {
820 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
821};
822
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100823static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
824 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800825
826static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
827 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
828
829static const char * const rt5640_mono_adc_r1_src[] = {
830 "Mono DAC MIXR", "ADCR"
831};
832
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100833static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
834 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800835
836static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
837 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
838
839static const char * const rt5640_mono_adc_r2_src[] = {
840 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
841};
842
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100843static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
844 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800845
846static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
847 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
848
849/* DAC2 channel source */
850static const char * const rt5640_dac_l2_src[] = {
851 "IF2", "Base L/R"
852};
853
854static int rt5640_dac_l2_values[] = {
855 0,
856 3,
857};
858
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100859static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
860 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
861 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
Bard Liao997b0522013-06-11 13:10:16 +0800862
863static const struct snd_kcontrol_new rt5640_dac_l2_mux =
Lars-Peter Clausen712fb1c2014-04-14 21:31:02 +0200864 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
Bard Liao997b0522013-06-11 13:10:16 +0800865
866static const char * const rt5640_dac_r2_src[] = {
867 "IF2",
868};
869
870static int rt5640_dac_r2_values[] = {
871 0,
872};
873
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100874static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
875 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
876 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
Bard Liao997b0522013-06-11 13:10:16 +0800877
878static const struct snd_kcontrol_new rt5640_dac_r2_mux =
879 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
880
881/* digital interface and iis interface map */
882static const char * const rt5640_dai_iis_map[] = {
883 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
884};
885
886static int rt5640_dai_iis_map_values[] = {
887 0,
888 5,
889 6,
890 7,
891};
892
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100893static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
894 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
895 0x7, rt5640_dai_iis_map,
896 rt5640_dai_iis_map_values);
Bard Liao997b0522013-06-11 13:10:16 +0800897
898static const struct snd_kcontrol_new rt5640_dai_mux =
Lars-Peter Clausen712fb1c2014-04-14 21:31:02 +0200899 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
Bard Liao997b0522013-06-11 13:10:16 +0800900
901/* SDI select */
902static const char * const rt5640_sdi_sel[] = {
903 "IF1", "IF2"
904};
905
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100906static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
907 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
Bard Liao997b0522013-06-11 13:10:16 +0800908
909static const struct snd_kcontrol_new rt5640_sdi_mux =
910 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
911
Sachin Kamat89d05132013-09-13 15:22:18 +0530912static void hp_amp_power_on(struct snd_soc_codec *codec)
Bard Liao246693b2013-08-23 10:29:26 +0800913{
914 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
915
916 /* depop parameters */
917 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
918 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
919 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
920 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
921 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
922 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
923 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
924 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
925 0x9f00);
926 /* headphone amp power on */
927 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
928 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
929 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
930 RT5640_PWR_HA,
931 RT5640_PWR_HA);
932 usleep_range(10000, 15000);
933 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
934 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
935 RT5640_PWR_FV1 | RT5640_PWR_FV2);
936}
937
938static void rt5640_pmu_depop(struct snd_soc_codec *codec)
939{
940 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
941
942 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
943 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
944 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
945 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
946 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
947
948 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
949 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
950 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
951 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
952 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
953
954 regmap_write(rt5640->regmap, RT5640_PR_BASE +
955 RT5640_MAMP_INT_REG2, 0x1c00);
956 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
957 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
958 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
959 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
960 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
961}
962
963static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
964 struct snd_kcontrol *kcontrol, int event)
965{
966 struct snd_soc_codec *codec = w->codec;
967 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
968
969 switch (event) {
970 case SND_SOC_DAPM_POST_PMU:
971 rt5640_pmu_depop(codec);
972 rt5640->hp_mute = 0;
973 break;
974
975 case SND_SOC_DAPM_PRE_PMD:
976 rt5640->hp_mute = 1;
977 usleep_range(70000, 75000);
978 break;
979
980 default:
981 return 0;
982 }
983
984 return 0;
985}
986
987static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
988 struct snd_kcontrol *kcontrol, int event)
989{
990 struct snd_soc_codec *codec = w->codec;
991
992 switch (event) {
993 case SND_SOC_DAPM_POST_PMU:
994 hp_amp_power_on(codec);
995 break;
996 default:
997 return 0;
998 }
999
1000 return 0;
1001}
1002
1003static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1004 struct snd_kcontrol *kcontrol, int event)
1005{
1006 struct snd_soc_codec *codec = w->codec;
1007 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1008
1009 switch (event) {
1010 case SND_SOC_DAPM_POST_PMU:
1011 if (!rt5640->hp_mute)
1012 usleep_range(80000, 85000);
1013
1014 break;
1015
1016 default:
1017 return 0;
1018 }
1019
1020 return 0;
1021}
1022
Bard Liao997b0522013-06-11 13:10:16 +08001023static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1024 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1025 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1026 /* Input Side */
1027 /* micbias */
1028 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1029 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1030 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
Stephen Warren9be94ae2013-06-12 15:34:23 -06001031 RT5640_PWR_MB1_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001032 /* Input Lines */
1033 SND_SOC_DAPM_INPUT("DMIC1"),
1034 SND_SOC_DAPM_INPUT("DMIC2"),
1035 SND_SOC_DAPM_INPUT("IN1P"),
1036 SND_SOC_DAPM_INPUT("IN1N"),
1037 SND_SOC_DAPM_INPUT("IN2P"),
1038 SND_SOC_DAPM_INPUT("IN2N"),
1039 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1040 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1041 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1042 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1043
1044 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1045 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
Oder Chiou71d97a792014-03-28 10:46:18 +08001046 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1047 NULL, 0),
1048 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1049 NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001050 /* Boost */
1051 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1052 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1053 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1054 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1055 /* Input Volume */
1056 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1057 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1058 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1059 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001060 /* REC Mixer */
1061 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1062 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1063 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1064 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1065 /* ADCs */
1066 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1067 RT5640_PWR_ADC_L_BIT, 0),
1068 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1069 RT5640_PWR_ADC_R_BIT, 0),
1070 /* ADC Mux */
1071 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1072 &rt5640_sto_adc_2_mux),
1073 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1074 &rt5640_sto_adc_2_mux),
1075 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1076 &rt5640_sto_adc_1_mux),
1077 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1078 &rt5640_sto_adc_1_mux),
1079 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1080 &rt5640_mono_adc_l2_mux),
1081 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1082 &rt5640_mono_adc_l1_mux),
1083 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1084 &rt5640_mono_adc_r1_mux),
1085 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1086 &rt5640_mono_adc_r2_mux),
1087 /* ADC Mixer */
1088 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1089 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1090 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1091 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1092 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1093 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1094 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1095 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1096 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1097 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1098 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1099 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1100 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1101 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1102
1103 /* Digital Interface */
1104 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1105 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1106 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1107 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1108 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1109 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1110 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1111 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1112 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1113 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1114 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1115 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1116 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1117 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1118 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1119 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1120 /* Digital Interface Select */
1121 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1122 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1123 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1124 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1125 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1126 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1127 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1128 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1129 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1130 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1131 /* Audio Interface */
1132 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1133 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1134 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1135 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
Oder Chiou022d21f2014-04-08 19:40:00 +08001136
Bard Liao997b0522013-06-11 13:10:16 +08001137 /* Output Side */
1138 /* DAC mixer before sound effect */
1139 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1140 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1141 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1142 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
Oder Chiou022d21f2014-04-08 19:40:00 +08001143
Bard Liao997b0522013-06-11 13:10:16 +08001144 /* DAC Mixer */
Bard Liao997b0522013-06-11 13:10:16 +08001145 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1146 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1147 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1148 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1149 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1150 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1151 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1152 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1153 /* DACs */
1154 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1155 RT5640_PWR_DAC_L1_BIT, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001156 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1157 RT5640_PWR_DAC_R1_BIT, 0),
Oder Chiou022d21f2014-04-08 19:40:00 +08001158
Bard Liao997b0522013-06-11 13:10:16 +08001159 /* SPK/OUT Mixer */
1160 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1161 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1162 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1163 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
Bard Liao997b0522013-06-11 13:10:16 +08001164 /* Ouput Volume */
1165 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1166 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1167 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1168 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1169 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1170 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1171 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1172 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1173 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1174 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1175 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1176 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1177 /* SPO/HPO/LOUT/Mono Mixer */
1178 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1179 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1180 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1181 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
Bard Liao997b0522013-06-11 13:10:16 +08001182 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1183 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
Bard Liao246693b2013-08-23 10:29:26 +08001184 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1185 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1186 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1187 rt5640_hp_event,
1188 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1189 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
Bard Liao997b0522013-06-11 13:10:16 +08001190 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
Bard Liao246693b2013-08-23 10:29:26 +08001191 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
Bard Liao997b0522013-06-11 13:10:16 +08001192 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1193 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
Bard Liao246693b2013-08-23 10:29:26 +08001194 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1195
1196 /* Output Switch */
1197 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1198 &spk_l_enable_control),
1199 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1200 &spk_r_enable_control),
1201 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1202 &hp_l_enable_control),
1203 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1204 &hp_r_enable_control),
1205 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
Bard Liao997b0522013-06-11 13:10:16 +08001206 /* Output Lines */
1207 SND_SOC_DAPM_OUTPUT("SPOLP"),
1208 SND_SOC_DAPM_OUTPUT("SPOLN"),
1209 SND_SOC_DAPM_OUTPUT("SPORP"),
1210 SND_SOC_DAPM_OUTPUT("SPORN"),
1211 SND_SOC_DAPM_OUTPUT("HPOL"),
1212 SND_SOC_DAPM_OUTPUT("HPOR"),
1213 SND_SOC_DAPM_OUTPUT("LOUTL"),
1214 SND_SOC_DAPM_OUTPUT("LOUTR"),
Oder Chiou022d21f2014-04-08 19:40:00 +08001215};
1216
1217static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1218 /* Audio DSP */
1219 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1220 /* ANC */
1221 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1222
1223 /* DAC2 channel Mux */
1224 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1225 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1226
1227 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1228 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1229 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1230 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1231
1232 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_R2_BIT,
1233 0),
1234 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_L2_BIT,
1235 0),
1236
1237 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1238 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1239 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1240 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1241
1242 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1243 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1244 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1245 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1246
1247 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1248 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1249 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1250 RT5640_PWR_MA_BIT, 0, NULL, 0),
1251
Bard Liao997b0522013-06-11 13:10:16 +08001252 SND_SOC_DAPM_OUTPUT("MONOP"),
1253 SND_SOC_DAPM_OUTPUT("MONON"),
1254};
1255
Oder Chiou022d21f2014-04-08 19:40:00 +08001256static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1257 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1258 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1259 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1260 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1261
1262 SND_SOC_DAPM_SUPPLY("DAC L2 Filter", RT5640_PWR_DIG1,
1263 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1264 SND_SOC_DAPM_SUPPLY("DAC R2 Filter", RT5640_PWR_DIG1,
1265 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
1266
1267 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1268 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1269 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1270 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1271
1272 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1273 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1274 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1275 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1276};
1277
Bard Liao997b0522013-06-11 13:10:16 +08001278static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1279 {"IN1P", NULL, "LDO2"},
1280 {"IN2P", NULL, "LDO2"},
1281
1282 {"DMIC L1", NULL, "DMIC1"},
1283 {"DMIC R1", NULL, "DMIC1"},
1284 {"DMIC L2", NULL, "DMIC2"},
1285 {"DMIC R2", NULL, "DMIC2"},
1286
1287 {"BST1", NULL, "IN1P"},
1288 {"BST1", NULL, "IN1N"},
1289 {"BST2", NULL, "IN2P"},
1290 {"BST2", NULL, "IN2N"},
1291
1292 {"INL VOL", NULL, "IN2P"},
1293 {"INR VOL", NULL, "IN2N"},
1294
1295 {"RECMIXL", "HPOL Switch", "HPOL"},
1296 {"RECMIXL", "INL Switch", "INL VOL"},
1297 {"RECMIXL", "BST2 Switch", "BST2"},
1298 {"RECMIXL", "BST1 Switch", "BST1"},
1299 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1300
1301 {"RECMIXR", "HPOR Switch", "HPOR"},
1302 {"RECMIXR", "INR Switch", "INR VOL"},
1303 {"RECMIXR", "BST2 Switch", "BST2"},
1304 {"RECMIXR", "BST1 Switch", "BST1"},
1305 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1306
1307 {"ADC L", NULL, "RECMIXL"},
1308 {"ADC R", NULL, "RECMIXR"},
1309
1310 {"DMIC L1", NULL, "DMIC CLK"},
1311 {"DMIC L1", NULL, "DMIC1 Power"},
1312 {"DMIC R1", NULL, "DMIC CLK"},
1313 {"DMIC R1", NULL, "DMIC1 Power"},
1314 {"DMIC L2", NULL, "DMIC CLK"},
1315 {"DMIC L2", NULL, "DMIC2 Power"},
1316 {"DMIC R2", NULL, "DMIC CLK"},
1317 {"DMIC R2", NULL, "DMIC2 Power"},
1318
1319 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1320 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1321 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1322 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1323 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1324
1325 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1326 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1327 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1328 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1329 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1330
1331 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1332 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1333 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1334 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1335 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1336
1337 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1338 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1339 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1340 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1341 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1342
1343 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1344 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1345 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001346 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001347
1348 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1349 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1350 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001351 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001352
1353 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1354 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1355 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001356 {"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001357
1358 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1359 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1360 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001361 {"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001362
1363 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1364 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1365 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1366 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1367
1368 {"IF1 ADC", NULL, "I2S1"},
1369 {"IF1 ADC", NULL, "IF1 ADC L"},
1370 {"IF1 ADC", NULL, "IF1 ADC R"},
1371 {"IF2 ADC", NULL, "I2S2"},
1372 {"IF2 ADC", NULL, "IF2 ADC L"},
1373 {"IF2 ADC", NULL, "IF2 ADC R"},
1374
1375 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1376 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1377 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1378 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1379 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1380 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1381
1382 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1383 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1384 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1385 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1386 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1387 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1388
1389 {"AIF1TX", NULL, "DAI1 TX Mux"},
1390 {"AIF1TX", NULL, "SDI1 TX Mux"},
1391 {"AIF2TX", NULL, "DAI2 TX Mux"},
1392 {"AIF2TX", NULL, "SDI2 TX Mux"},
1393
1394 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1395 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1396 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1397 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1398
1399 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1400 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1401 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1402 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1403
1404 {"IF1 DAC", NULL, "I2S1"},
1405 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1406 {"IF2 DAC", NULL, "I2S2"},
1407 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1408
1409 {"IF1 DAC L", NULL, "IF1 DAC"},
1410 {"IF1 DAC R", NULL, "IF1 DAC"},
1411 {"IF2 DAC L", NULL, "IF2 DAC"},
1412 {"IF2 DAC R", NULL, "IF2 DAC"},
1413
1414 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1415 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1416 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1417 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1418
Bard Liao997b0522013-06-11 13:10:16 +08001419 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001420 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001421
1422 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001423 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001424
1425 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001426 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001427
1428 {"DAC L1", NULL, "Stereo DAC MIXL"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001429 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001430 {"DAC R1", NULL, "Stereo DAC MIXR"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001431 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001432
1433 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1434 {"SPK MIXL", "INL Switch", "INL VOL"},
1435 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
Bard Liao997b0522013-06-11 13:10:16 +08001436 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1437 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1438 {"SPK MIXR", "INR Switch", "INR VOL"},
1439 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
Bard Liao997b0522013-06-11 13:10:16 +08001440 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1441
Bard Liao997b0522013-06-11 13:10:16 +08001442 {"OUT MIXL", "BST1 Switch", "BST1"},
1443 {"OUT MIXL", "INL Switch", "INL VOL"},
1444 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001445 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1446
Bard Liao997b0522013-06-11 13:10:16 +08001447 {"OUT MIXR", "BST2 Switch", "BST2"},
1448 {"OUT MIXR", "BST1 Switch", "BST1"},
1449 {"OUT MIXR", "INR Switch", "INR VOL"},
1450 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001451 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1452
1453 {"SPKVOL L", NULL, "SPK MIXL"},
1454 {"SPKVOL R", NULL, "SPK MIXR"},
1455 {"HPOVOL L", NULL, "OUT MIXL"},
1456 {"HPOVOL R", NULL, "OUT MIXR"},
1457 {"OUTVOL L", NULL, "OUT MIXL"},
1458 {"OUTVOL R", NULL, "OUT MIXR"},
1459
1460 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1461 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1462 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1463 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1464 {"SPOL MIX", "BST1 Switch", "BST1"},
1465 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1466 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1467 {"SPOR MIX", "BST1 Switch", "BST1"},
1468
Bard Liao997b0522013-06-11 13:10:16 +08001469 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1470 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
Bard Liao246693b2013-08-23 10:29:26 +08001471 {"HPO MIX L", NULL, "HP L Amp"},
Bard Liao997b0522013-06-11 13:10:16 +08001472 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1473 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
Bard Liao246693b2013-08-23 10:29:26 +08001474 {"HPO MIX R", NULL, "HP R Amp"},
Bard Liao997b0522013-06-11 13:10:16 +08001475
1476 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1477 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1478 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1479 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1480
Bard Liao246693b2013-08-23 10:29:26 +08001481 {"HP Amp", NULL, "HPO MIX L"},
1482 {"HP Amp", NULL, "HPO MIX R"},
Bard Liao997b0522013-06-11 13:10:16 +08001483
Bard Liao246693b2013-08-23 10:29:26 +08001484 {"Speaker L Playback", "Switch", "SPOL MIX"},
1485 {"Speaker R Playback", "Switch", "SPOR MIX"},
1486 {"SPOLP", NULL, "Speaker L Playback"},
1487 {"SPOLN", NULL, "Speaker L Playback"},
1488 {"SPORP", NULL, "Speaker R Playback"},
1489 {"SPORN", NULL, "Speaker R Playback"},
Bard Liao997b0522013-06-11 13:10:16 +08001490
1491 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1492 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1493 {"SPORP", NULL, "Improve SPK Amp Drv"},
1494 {"SPORN", NULL, "Improve SPK Amp Drv"},
1495
1496 {"HPOL", NULL, "Improve HP Amp Drv"},
1497 {"HPOR", NULL, "Improve HP Amp Drv"},
1498
Bard Liao246693b2013-08-23 10:29:26 +08001499 {"HP L Playback", "Switch", "HP Amp"},
1500 {"HP R Playback", "Switch", "HP Amp"},
1501 {"HPOL", NULL, "HP L Playback"},
1502 {"HPOR", NULL, "HP R Playback"},
Bard Liao997b0522013-06-11 13:10:16 +08001503 {"LOUTL", NULL, "LOUT MIX"},
1504 {"LOUTR", NULL, "LOUT MIX"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001505};
1506
1507static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1508 {"ANC", NULL, "Stereo ADC MIXL"},
1509 {"ANC", NULL, "Stereo ADC MIXR"},
1510
1511 {"Audio DSP", NULL, "DAC MIXL"},
1512 {"Audio DSP", NULL, "DAC MIXR"},
1513
1514 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1515 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1516
1517 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1518
1519 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1520 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1521 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1522 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1523
1524 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1525 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1526
1527 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1528 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1529
1530 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1531 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1532
1533 {"DAC L2", NULL, "Mono DAC MIXL"},
1534 {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll},
1535 {"DAC R2", NULL, "Mono DAC MIXR"},
1536 {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll},
1537
1538 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1539 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1540
1541 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1542 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1543
1544 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1545 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1546
1547 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1548 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1549
1550 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1551 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1552
1553 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1554 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1555 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1556 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1557 {"Mono MIX", "BST1 Switch", "BST1"},
1558
Bard Liao997b0522013-06-11 13:10:16 +08001559 {"MONOP", NULL, "Mono MIX"},
1560 {"MONON", NULL, "Mono MIX"},
1561 {"MONOP", NULL, "Improve MONO Amp Drv"},
1562};
1563
Oder Chiou022d21f2014-04-08 19:40:00 +08001564static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1565 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1566 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1567
1568 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1569 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1570
1571 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1572 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1573
1574 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1575 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1576
1577 {"IF2 DAC L", NULL, "DAC L2 Filter"},
1578 {"IF2 DAC R", NULL, "DAC R2 Filter"},
1579};
1580
Bard Liao997b0522013-06-11 13:10:16 +08001581static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1582{
1583 int ret = 0, val;
1584
1585 if (codec == NULL)
1586 return -EINVAL;
1587
1588 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1589 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1590 switch (dai_id) {
1591 case RT5640_AIF1:
1592 switch (val) {
1593 case RT5640_IF_123:
1594 case RT5640_IF_132:
1595 ret |= RT5640_U_IF1;
1596 break;
1597 case RT5640_IF_113:
1598 ret |= RT5640_U_IF1;
1599 case RT5640_IF_312:
1600 case RT5640_IF_213:
1601 ret |= RT5640_U_IF2;
1602 break;
1603 }
1604 break;
1605
1606 case RT5640_AIF2:
1607 switch (val) {
1608 case RT5640_IF_231:
1609 case RT5640_IF_213:
1610 ret |= RT5640_U_IF1;
1611 break;
1612 case RT5640_IF_223:
1613 ret |= RT5640_U_IF1;
1614 case RT5640_IF_123:
1615 case RT5640_IF_321:
1616 ret |= RT5640_U_IF2;
1617 break;
1618 }
1619 break;
1620
1621 default:
1622 ret = -EINVAL;
1623 break;
1624 }
1625
1626 return ret;
1627}
1628
Bard Liao997b0522013-06-11 13:10:16 +08001629static int rt5640_hw_params(struct snd_pcm_substream *substream,
1630 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1631{
Lars-Peter Clausenab642462014-03-13 21:24:54 +01001632 struct snd_soc_codec *codec = dai->codec;
Bard Liao997b0522013-06-11 13:10:16 +08001633 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Takashi Iwai5a7615c2013-10-30 08:35:06 +01001634 unsigned int val_len = 0, val_clk, mask_clk;
1635 int dai_sel, pre_div, bclk_ms, frame_size;
Bard Liao997b0522013-06-11 13:10:16 +08001636
1637 rt5640->lrck[dai->id] = params_rate(params);
Oder Chioud92950e2014-05-20 15:01:55 +08001638 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
Bard Liao997b0522013-06-11 13:10:16 +08001639 if (pre_div < 0) {
Liam Girdwood9e9cb9b2013-09-13 17:57:35 +01001640 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1641 rt5640->lrck[dai->id], dai->id);
Bard Liao997b0522013-06-11 13:10:16 +08001642 return -EINVAL;
1643 }
1644 frame_size = snd_soc_params_to_frame_size(params);
1645 if (frame_size < 0) {
1646 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1647 return frame_size;
1648 }
1649 if (frame_size > 32)
1650 bclk_ms = 1;
1651 else
1652 bclk_ms = 0;
1653 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1654
1655 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1656 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1657 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1658 bclk_ms, pre_div, dai->id);
1659
Oder Chiou9bccae72014-03-27 19:34:51 +08001660 switch (params_width(params)) {
1661 case 16:
Bard Liao997b0522013-06-11 13:10:16 +08001662 break;
Oder Chiou9bccae72014-03-27 19:34:51 +08001663 case 20:
Bard Liao997b0522013-06-11 13:10:16 +08001664 val_len |= RT5640_I2S_DL_20;
1665 break;
Oder Chiou9bccae72014-03-27 19:34:51 +08001666 case 24:
Bard Liao997b0522013-06-11 13:10:16 +08001667 val_len |= RT5640_I2S_DL_24;
1668 break;
Oder Chiou9bccae72014-03-27 19:34:51 +08001669 case 8:
Bard Liao997b0522013-06-11 13:10:16 +08001670 val_len |= RT5640_I2S_DL_8;
1671 break;
1672 default:
1673 return -EINVAL;
1674 }
1675
1676 dai_sel = get_sdp_info(codec, dai->id);
1677 if (dai_sel < 0) {
1678 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1679 return -EINVAL;
1680 }
1681 if (dai_sel & RT5640_U_IF1) {
1682 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1683 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1684 pre_div << RT5640_I2S_PD1_SFT;
1685 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1686 RT5640_I2S_DL_MASK, val_len);
1687 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1688 }
1689 if (dai_sel & RT5640_U_IF2) {
1690 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1691 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1692 pre_div << RT5640_I2S_PD2_SFT;
1693 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1694 RT5640_I2S_DL_MASK, val_len);
1695 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1696 }
1697
1698 return 0;
1699}
1700
1701static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1702{
1703 struct snd_soc_codec *codec = dai->codec;
1704 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Takashi Iwai5a7615c2013-10-30 08:35:06 +01001705 unsigned int reg_val = 0;
1706 int dai_sel;
Bard Liao997b0522013-06-11 13:10:16 +08001707
1708 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1709 case SND_SOC_DAIFMT_CBM_CFM:
1710 rt5640->master[dai->id] = 1;
1711 break;
1712 case SND_SOC_DAIFMT_CBS_CFS:
1713 reg_val |= RT5640_I2S_MS_S;
1714 rt5640->master[dai->id] = 0;
1715 break;
1716 default:
1717 return -EINVAL;
1718 }
1719
1720 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1721 case SND_SOC_DAIFMT_NB_NF:
1722 break;
1723 case SND_SOC_DAIFMT_IB_NF:
1724 reg_val |= RT5640_I2S_BP_INV;
1725 break;
1726 default:
1727 return -EINVAL;
1728 }
1729
1730 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1731 case SND_SOC_DAIFMT_I2S:
1732 break;
1733 case SND_SOC_DAIFMT_LEFT_J:
1734 reg_val |= RT5640_I2S_DF_LEFT;
1735 break;
1736 case SND_SOC_DAIFMT_DSP_A:
1737 reg_val |= RT5640_I2S_DF_PCM_A;
1738 break;
1739 case SND_SOC_DAIFMT_DSP_B:
1740 reg_val |= RT5640_I2S_DF_PCM_B;
1741 break;
1742 default:
1743 return -EINVAL;
1744 }
1745
1746 dai_sel = get_sdp_info(codec, dai->id);
1747 if (dai_sel < 0) {
1748 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1749 return -EINVAL;
1750 }
1751 if (dai_sel & RT5640_U_IF1) {
1752 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1753 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1754 RT5640_I2S_DF_MASK, reg_val);
1755 }
1756 if (dai_sel & RT5640_U_IF2) {
1757 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1758 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1759 RT5640_I2S_DF_MASK, reg_val);
1760 }
1761
1762 return 0;
1763}
1764
1765static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1766 int clk_id, unsigned int freq, int dir)
1767{
1768 struct snd_soc_codec *codec = dai->codec;
1769 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1770 unsigned int reg_val = 0;
1771
1772 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1773 return 0;
1774
1775 switch (clk_id) {
1776 case RT5640_SCLK_S_MCLK:
1777 reg_val |= RT5640_SCLK_SRC_MCLK;
1778 break;
1779 case RT5640_SCLK_S_PLL1:
1780 reg_val |= RT5640_SCLK_SRC_PLL1;
1781 break;
Bard Liao997b0522013-06-11 13:10:16 +08001782 default:
1783 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1784 return -EINVAL;
1785 }
1786 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1787 RT5640_SCLK_SRC_MASK, reg_val);
1788 rt5640->sysclk = freq;
1789 rt5640->sysclk_src = clk_id;
1790
1791 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1792 return 0;
1793}
1794
Bard Liao997b0522013-06-11 13:10:16 +08001795static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1796 unsigned int freq_in, unsigned int freq_out)
1797{
1798 struct snd_soc_codec *codec = dai->codec;
1799 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001800 struct rl6231_pll_code pll_code;
Bard Liao997b0522013-06-11 13:10:16 +08001801 int ret, dai_sel;
1802
1803 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1804 freq_out == rt5640->pll_out)
1805 return 0;
1806
1807 if (!freq_in || !freq_out) {
1808 dev_dbg(codec->dev, "PLL disabled\n");
1809
1810 rt5640->pll_in = 0;
1811 rt5640->pll_out = 0;
1812 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1813 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1814 return 0;
1815 }
1816
1817 switch (source) {
1818 case RT5640_PLL1_S_MCLK:
1819 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1820 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1821 break;
1822 case RT5640_PLL1_S_BCLK1:
1823 case RT5640_PLL1_S_BCLK2:
1824 dai_sel = get_sdp_info(codec, dai->id);
1825 if (dai_sel < 0) {
1826 dev_err(codec->dev,
1827 "Failed to get sdp info: %d\n", dai_sel);
1828 return -EINVAL;
1829 }
1830 if (dai_sel & RT5640_U_IF1) {
1831 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1832 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1833 }
1834 if (dai_sel & RT5640_U_IF2) {
1835 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1836 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1837 }
1838 break;
1839 default:
1840 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1841 return -EINVAL;
1842 }
1843
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001844 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
Bard Liao997b0522013-06-11 13:10:16 +08001845 if (ret < 0) {
1846 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1847 return ret;
1848 }
1849
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001850 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1851 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1852 pll_code.n_code, pll_code.k_code);
Bard Liao997b0522013-06-11 13:10:16 +08001853
1854 snd_soc_write(codec, RT5640_PLL_CTRL1,
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001855 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
Bard Liao997b0522013-06-11 13:10:16 +08001856 snd_soc_write(codec, RT5640_PLL_CTRL2,
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001857 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
1858 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
Bard Liao997b0522013-06-11 13:10:16 +08001859
1860 rt5640->pll_in = freq_in;
1861 rt5640->pll_out = freq_out;
1862 rt5640->pll_src = source;
1863
1864 return 0;
1865}
1866
1867static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1868 enum snd_soc_bias_level level)
1869{
Bard Liao997b0522013-06-11 13:10:16 +08001870 switch (level) {
1871 case SND_SOC_BIAS_STANDBY:
1872 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
Bard Liao997b0522013-06-11 13:10:16 +08001873 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1874 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1875 RT5640_PWR_BG | RT5640_PWR_VREF2,
1876 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1877 RT5640_PWR_BG | RT5640_PWR_VREF2);
Bard Liao246693b2013-08-23 10:29:26 +08001878 usleep_range(10000, 15000);
Bard Liao997b0522013-06-11 13:10:16 +08001879 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1880 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1881 RT5640_PWR_FV1 | RT5640_PWR_FV2);
Bard Liao997b0522013-06-11 13:10:16 +08001882 snd_soc_update_bits(codec, RT5640_DUMMY1,
1883 0x0301, 0x0301);
Bard Liao997b0522013-06-11 13:10:16 +08001884 snd_soc_update_bits(codec, RT5640_MICBIAS,
1885 0x0030, 0x0030);
1886 }
1887 break;
1888
1889 case SND_SOC_BIAS_OFF:
1890 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1891 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1892 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1893 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1894 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1895 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1896 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1897 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1898 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1899 break;
1900
1901 default:
1902 break;
1903 }
1904 codec->dapm.bias_level = level;
1905
1906 return 0;
1907}
1908
1909static int rt5640_probe(struct snd_soc_codec *codec)
1910{
1911 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Bard Liao997b0522013-06-11 13:10:16 +08001912
1913 rt5640->codec = codec;
Bard Liao997b0522013-06-11 13:10:16 +08001914
Bard Liao997b0522013-06-11 13:10:16 +08001915 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1916
1917 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
Bard Liao997b0522013-06-11 13:10:16 +08001918 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1919 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1920
Bard Liao8bfc6d22014-04-17 10:24:06 +08001921 switch (snd_soc_read(codec, RT5640_RESET) & RT5640_ID_MASK) {
1922 case RT5640_ID_5640:
1923 case RT5640_ID_5642:
Oder Chiou022d21f2014-04-08 19:40:00 +08001924 snd_soc_add_codec_controls(codec,
1925 rt5640_specific_snd_controls,
1926 ARRAY_SIZE(rt5640_specific_snd_controls));
1927 snd_soc_dapm_new_controls(&codec->dapm,
1928 rt5640_specific_dapm_widgets,
1929 ARRAY_SIZE(rt5640_specific_dapm_widgets));
1930 snd_soc_dapm_add_routes(&codec->dapm,
1931 rt5640_specific_dapm_routes,
1932 ARRAY_SIZE(rt5640_specific_dapm_routes));
1933 break;
Bard Liao8bfc6d22014-04-17 10:24:06 +08001934 case RT5640_ID_5639:
Oder Chiou022d21f2014-04-08 19:40:00 +08001935 snd_soc_dapm_new_controls(&codec->dapm,
1936 rt5639_specific_dapm_widgets,
1937 ARRAY_SIZE(rt5639_specific_dapm_widgets));
1938 snd_soc_dapm_add_routes(&codec->dapm,
1939 rt5639_specific_dapm_routes,
1940 ARRAY_SIZE(rt5639_specific_dapm_routes));
1941 break;
Bard Liao57f174f2014-05-06 15:56:06 +08001942 default:
1943 dev_err(codec->dev,
1944 "The driver is for RT5639 RT5640 or RT5642 only\n");
1945 return -ENODEV;
Oder Chiou022d21f2014-04-08 19:40:00 +08001946 }
1947
Bard Liao997b0522013-06-11 13:10:16 +08001948 return 0;
1949}
1950
1951static int rt5640_remove(struct snd_soc_codec *codec)
1952{
1953 rt5640_reset(codec);
1954
1955 return 0;
1956}
1957
1958#ifdef CONFIG_PM
1959static int rt5640_suspend(struct snd_soc_codec *codec)
1960{
1961 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1962
1963 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1964 rt5640_reset(codec);
1965 regcache_cache_only(rt5640->regmap, true);
1966 regcache_mark_dirty(rt5640->regmap);
Mark Browne58f3012013-10-16 17:26:22 +01001967 if (gpio_is_valid(rt5640->pdata.ldo1_en))
1968 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
Bard Liao997b0522013-06-11 13:10:16 +08001969
1970 return 0;
1971}
1972
1973static int rt5640_resume(struct snd_soc_codec *codec)
1974{
Mark Browne58f3012013-10-16 17:26:22 +01001975 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1976
1977 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
1978 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
1979 msleep(400);
1980 }
Bard Liao997b0522013-06-11 13:10:16 +08001981
Oder Chiou4c9185b2014-03-27 15:55:47 +08001982 regcache_cache_only(rt5640->regmap, false);
1983 regcache_sync(rt5640->regmap);
1984
Bard Liao997b0522013-06-11 13:10:16 +08001985 return 0;
1986}
1987#else
1988#define rt5640_suspend NULL
1989#define rt5640_resume NULL
1990#endif
1991
1992#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1993#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1994 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1995
Stephen Warren9be94ae2013-06-12 15:34:23 -06001996static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
Bard Liao997b0522013-06-11 13:10:16 +08001997 .hw_params = rt5640_hw_params,
1998 .set_fmt = rt5640_set_dai_fmt,
1999 .set_sysclk = rt5640_set_dai_sysclk,
2000 .set_pll = rt5640_set_dai_pll,
2001};
2002
Stephen Warren9be94ae2013-06-12 15:34:23 -06002003static struct snd_soc_dai_driver rt5640_dai[] = {
Bard Liao997b0522013-06-11 13:10:16 +08002004 {
2005 .name = "rt5640-aif1",
2006 .id = RT5640_AIF1,
2007 .playback = {
2008 .stream_name = "AIF1 Playback",
2009 .channels_min = 1,
2010 .channels_max = 2,
2011 .rates = RT5640_STEREO_RATES,
2012 .formats = RT5640_FORMATS,
2013 },
2014 .capture = {
2015 .stream_name = "AIF1 Capture",
2016 .channels_min = 1,
2017 .channels_max = 2,
2018 .rates = RT5640_STEREO_RATES,
2019 .formats = RT5640_FORMATS,
2020 },
2021 .ops = &rt5640_aif_dai_ops,
2022 },
2023 {
2024 .name = "rt5640-aif2",
2025 .id = RT5640_AIF2,
2026 .playback = {
2027 .stream_name = "AIF2 Playback",
2028 .channels_min = 1,
2029 .channels_max = 2,
2030 .rates = RT5640_STEREO_RATES,
2031 .formats = RT5640_FORMATS,
2032 },
2033 .capture = {
2034 .stream_name = "AIF2 Capture",
2035 .channels_min = 1,
2036 .channels_max = 2,
2037 .rates = RT5640_STEREO_RATES,
2038 .formats = RT5640_FORMATS,
2039 },
2040 .ops = &rt5640_aif_dai_ops,
2041 },
2042};
2043
2044static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2045 .probe = rt5640_probe,
2046 .remove = rt5640_remove,
2047 .suspend = rt5640_suspend,
2048 .resume = rt5640_resume,
2049 .set_bias_level = rt5640_set_bias_level,
Oder Chiou09caf302014-03-31 10:21:10 +08002050 .idle_bias_off = true,
Bard Liao997b0522013-06-11 13:10:16 +08002051 .controls = rt5640_snd_controls,
2052 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2053 .dapm_widgets = rt5640_dapm_widgets,
2054 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2055 .dapm_routes = rt5640_dapm_routes,
2056 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2057};
2058
2059static const struct regmap_config rt5640_regmap = {
2060 .reg_bits = 8,
2061 .val_bits = 16,
2062
2063 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2064 RT5640_PR_SPACING),
2065 .volatile_reg = rt5640_volatile_register,
2066 .readable_reg = rt5640_readable_register,
2067
2068 .cache_type = REGCACHE_RBTREE,
2069 .reg_defaults = rt5640_reg,
2070 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2071 .ranges = rt5640_ranges,
2072 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2073};
2074
2075static const struct i2c_device_id rt5640_i2c_id[] = {
2076 { "rt5640", 0 },
Oder Chioub0c27842014-04-10 10:57:34 +08002077 { "rt5639", 0 },
Bard Liao8bfc6d22014-04-17 10:24:06 +08002078 { "rt5642", 0 },
Bard Liao997b0522013-06-11 13:10:16 +08002079 { }
2080};
2081MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2082
Stephen Warren03a620d2014-03-31 11:05:17 -06002083#if defined(CONFIG_OF)
2084static const struct of_device_id rt5640_of_match[] = {
Oder Chiou33fcec22014-04-28 16:55:21 +08002085 { .compatible = "realtek,rt5639", },
Stephen Warren03a620d2014-03-31 11:05:17 -06002086 { .compatible = "realtek,rt5640", },
2087 {},
2088};
2089MODULE_DEVICE_TABLE(of, rt5640_of_match);
2090#endif
2091
Thierry Reding32fcb972013-09-19 11:18:06 +02002092#ifdef CONFIG_ACPI
Liam Girdwood02b80772013-09-13 17:57:36 +01002093static struct acpi_device_id rt5640_acpi_match[] = {
2094 { "INT33CA", 0 },
Jarkko Nikulab31b2b62014-02-07 09:35:16 +02002095 { "10EC5640", 0 },
Liam Girdwood02b80772013-09-13 17:57:36 +01002096 { },
2097};
2098MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
Thierry Reding32fcb972013-09-19 11:18:06 +02002099#endif
Liam Girdwood02b80772013-09-13 17:57:36 +01002100
Stephen Warrendcad9f02013-06-12 11:34:30 -06002101static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2102{
2103 rt5640->pdata.in1_diff = of_property_read_bool(np,
2104 "realtek,in1-differential");
2105 rt5640->pdata.in2_diff = of_property_read_bool(np,
2106 "realtek,in2-differential");
2107
2108 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2109 "realtek,ldo1-en-gpios", 0);
2110 /*
2111 * LDO1_EN is optional (it may be statically tied on the board).
2112 * -ENOENT means that the property doesn't exist, i.e. there is no
2113 * GPIO, so is not an error. Any other error code means the property
2114 * exists, but could not be parsed.
2115 */
2116 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2117 (rt5640->pdata.ldo1_en != -ENOENT))
2118 return rt5640->pdata.ldo1_en;
2119
2120 return 0;
2121}
2122
Bard Liao997b0522013-06-11 13:10:16 +08002123static int rt5640_i2c_probe(struct i2c_client *i2c,
2124 const struct i2c_device_id *id)
2125{
2126 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2127 struct rt5640_priv *rt5640;
2128 int ret;
2129 unsigned int val;
2130
2131 rt5640 = devm_kzalloc(&i2c->dev,
2132 sizeof(struct rt5640_priv),
2133 GFP_KERNEL);
2134 if (NULL == rt5640)
2135 return -ENOMEM;
Stephen Warrendcad9f02013-06-12 11:34:30 -06002136 i2c_set_clientdata(i2c, rt5640);
2137
2138 if (pdata) {
2139 rt5640->pdata = *pdata;
2140 /*
2141 * Translate zero'd out (default) pdata value to an invalid
2142 * GPIO ID. This makes the pdata and DT paths consistent in
2143 * terms of the value left in this field when no GPIO is
2144 * specified, but means we can't actually use GPIO 0.
2145 */
2146 if (!rt5640->pdata.ldo1_en)
2147 rt5640->pdata.ldo1_en = -EINVAL;
2148 } else if (i2c->dev.of_node) {
2149 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2150 if (ret)
2151 return ret;
2152 } else
2153 rt5640->pdata.ldo1_en = -EINVAL;
Bard Liao997b0522013-06-11 13:10:16 +08002154
2155 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2156 if (IS_ERR(rt5640->regmap)) {
2157 ret = PTR_ERR(rt5640->regmap);
2158 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2159 ret);
2160 return ret;
2161 }
2162
Stephen Warrendcad9f02013-06-12 11:34:30 -06002163 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
Bard Liao997b0522013-06-11 13:10:16 +08002164 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2165 GPIOF_OUT_INIT_HIGH,
2166 "RT5640 LDO1_EN");
2167 if (ret < 0) {
2168 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2169 rt5640->pdata.ldo1_en, ret);
2170 return ret;
2171 }
2172 msleep(400);
2173 }
2174
2175 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
Oder Chiou3441e522014-03-28 20:28:29 +08002176 if (val != RT5640_DEVICE_ID) {
Bard Liao997b0522013-06-11 13:10:16 +08002177 dev_err(&i2c->dev,
2178 "Device with ID register %x is not rt5640/39\n", val);
2179 return -ENODEV;
2180 }
2181
2182 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2183
2184 ret = regmap_register_patch(rt5640->regmap, init_list,
2185 ARRAY_SIZE(init_list));
2186 if (ret != 0)
2187 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2188
2189 if (rt5640->pdata.in1_diff)
2190 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2191 RT5640_IN_DF1, RT5640_IN_DF1);
2192
2193 if (rt5640->pdata.in2_diff)
2194 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2195 RT5640_IN_DF2, RT5640_IN_DF2);
2196
Oder Chiou71d97a792014-03-28 10:46:18 +08002197 if (rt5640->pdata.dmic_en) {
2198 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2199 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2200
2201 if (rt5640->pdata.dmic1_data_pin) {
2202 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2203 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
2204 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2205 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
2206 }
2207
2208 if (rt5640->pdata.dmic2_data_pin) {
2209 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2210 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
2211 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2212 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
2213 }
2214 }
2215
Bard Liao246693b2013-08-23 10:29:26 +08002216 rt5640->hp_mute = 1;
2217
Axel Lin1657caf2014-06-10 11:35:56 +08002218 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2219 rt5640_dai, ARRAY_SIZE(rt5640_dai));
Bard Liao997b0522013-06-11 13:10:16 +08002220}
2221
2222static int rt5640_i2c_remove(struct i2c_client *i2c)
2223{
2224 snd_soc_unregister_codec(&i2c->dev);
2225
2226 return 0;
2227}
2228
Stephen Warren9be94ae2013-06-12 15:34:23 -06002229static struct i2c_driver rt5640_i2c_driver = {
Bard Liao997b0522013-06-11 13:10:16 +08002230 .driver = {
2231 .name = "rt5640",
2232 .owner = THIS_MODULE,
Liam Girdwood02b80772013-09-13 17:57:36 +01002233 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
Stephen Warren03a620d2014-03-31 11:05:17 -06002234 .of_match_table = of_match_ptr(rt5640_of_match),
Bard Liao997b0522013-06-11 13:10:16 +08002235 },
2236 .probe = rt5640_i2c_probe,
2237 .remove = rt5640_i2c_remove,
2238 .id_table = rt5640_i2c_id,
2239};
2240module_i2c_driver(rt5640_i2c_driver);
2241
Oder Chioub0c27842014-04-10 10:57:34 +08002242MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
Bard Liao997b0522013-06-11 13:10:16 +08002243MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2244MODULE_LICENSE("GPL v2");