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AnilKumar Ch571ccb22012-10-15 18:05:39 +05301/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * AM335x Starter Kit
11 * http://www.ti.com/tool/tmdssk3358
12 */
13
14/dts-v1/;
15
Florian Vaussardeb33ef662013-06-03 16:12:22 +020016#include "am33xx.dtsi"
Laurent Pincharteb9bdef2013-07-18 00:54:24 +020017#include <dt-bindings/pwm/pwm.h>
Eliad Peller99f84ca2015-03-18 18:38:29 +020018#include <dt-bindings/interrupt-controller/irq.h>
AnilKumar Ch571ccb22012-10-15 18:05:39 +053019
20/ {
21 model = "TI AM335x EVM-SK";
22 compatible = "ti,am335x-evmsk", "ti,am33xx";
23
24 cpus {
25 cpu@0 {
26 cpu0-supply = <&vdd1_reg>;
27 };
28 };
29
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>; /* 256 MB */
33 };
34
Javier Martinez Canillas4c049a52016-08-01 12:46:58 -040035 vbat: fixedregulator0 {
AnilKumar Ch571ccb22012-10-15 18:05:39 +053036 compatible = "regulator-fixed";
37 regulator-name = "vbat";
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
40 regulator-boot-on;
41 };
42
Javier Martinez Canillas4c049a52016-08-01 12:46:58 -040043 lis3_reg: fixedregulator1 {
AnilKumar Ch571ccb22012-10-15 18:05:39 +053044 compatible = "regulator-fixed";
45 regulator-name = "lis3_reg";
46 regulator-boot-on;
47 };
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053048
Javier Martinez Canillas4c049a52016-08-01 12:46:58 -040049 wl12xx_vmmc: fixedregulator2 {
Imre Kaloz90f4f012014-03-03 10:02:56 +010050 pinctrl-names = "default";
51 pinctrl-0 = <&wl12xx_gpio>;
52 compatible = "regulator-fixed";
53 regulator-name = "vwl1271";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
56 gpio = <&gpio1 29 0>;
57 startup-delay-us = <70000>;
58 enable-active-high;
59 };
60
Javier Martinez Canillas4c049a52016-08-01 12:46:58 -040061 vtt_fixed: fixedregulator3 {
Dave Gerlach12f03232014-05-05 14:58:29 -050062 compatible = "regulator-fixed";
63 regulator-name = "vtt";
64 regulator-min-microvolt = <1500000>;
65 regulator-max-microvolt = <1500000>;
66 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
67 regulator-always-on;
68 regulator-boot-on;
69 enable-active-high;
70 };
71
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053072 leds {
Vaibhav Hiremathb8f70c32013-03-26 15:42:15 +053073 pinctrl-names = "default";
74 pinctrl-0 = <&user_leds_s0>;
75
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053076 compatible = "gpio-leds";
77
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -040078 led1 {
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053079 label = "evmsk:green:usr0";
Florian Vaussarde94233c2013-06-03 16:12:23 +020080 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053081 default-state = "off";
82 };
83
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -040084 led2 {
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053085 label = "evmsk:green:usr1";
Florian Vaussarde94233c2013-06-03 16:12:23 +020086 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053087 default-state = "off";
88 };
89
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -040090 led3 {
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053091 label = "evmsk:green:mmc0";
Florian Vaussarde94233c2013-06-03 16:12:23 +020092 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053093 linux,default-trigger = "mmc0";
94 default-state = "off";
95 };
96
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -040097 led4 {
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053098 label = "evmsk:green:heartbeat";
Florian Vaussarde94233c2013-06-03 16:12:23 +020099 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +0530100 linux,default-trigger = "heartbeat";
101 default-state = "off";
102 };
103 };
AnilKumar Ch00834b72012-11-06 19:18:38 +0530104
Javier Martinez Canillas57a78a82016-08-01 12:47:01 -0400105 gpio_buttons: gpio_buttons0 {
AnilKumar Ch00834b72012-11-06 19:18:38 +0530106 compatible = "gpio-keys";
107 #address-cells = <1>;
108 #size-cells = <0>;
109
Javier Martinez Canillas57a78a82016-08-01 12:47:01 -0400110 switch1 {
AnilKumar Ch00834b72012-11-06 19:18:38 +0530111 label = "button0";
112 linux,code = <0x100>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200113 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530114 };
115
Javier Martinez Canillas57a78a82016-08-01 12:47:01 -0400116 switch2 {
AnilKumar Ch00834b72012-11-06 19:18:38 +0530117 label = "button1";
118 linux,code = <0x101>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200119 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530120 };
121
Javier Martinez Canillas57a78a82016-08-01 12:47:01 -0400122 switch3 {
AnilKumar Ch00834b72012-11-06 19:18:38 +0530123 label = "button2";
124 linux,code = <0x102>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200125 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
Sudeep Holla3efda002015-10-21 11:10:06 +0100126 wakeup-source;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530127 };
128
Javier Martinez Canillas57a78a82016-08-01 12:47:01 -0400129 switch4 {
AnilKumar Ch00834b72012-11-06 19:18:38 +0530130 label = "button3";
131 linux,code = <0x103>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200132 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530133 };
134 };
Philip Avinash1632fbd2013-06-06 15:52:39 +0200135
136 backlight {
137 compatible = "pwm-backlight";
Laurent Pincharteb9bdef2013-07-18 00:54:24 +0200138 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
Philip Avinash1632fbd2013-06-06 15:52:39 +0200139 brightness-levels = <0 58 61 66 75 90 125 170 255>;
140 default-brightness-level = <8>;
141 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300142
143 sound {
Peter Ujfalusib3c616e2015-07-02 17:06:31 +0300144 compatible = "simple-audio-card";
145 simple-audio-card,name = "AM335x-EVMSK";
146 simple-audio-card,widgets =
147 "Headphone", "Headphone Jack";
148 simple-audio-card,routing =
149 "Headphone Jack", "HPLOUT",
150 "Headphone Jack", "HPROUT";
151 simple-audio-card,format = "dsp_b";
152 simple-audio-card,bitclock-master = <&sound_master>;
153 simple-audio-card,frame-master = <&sound_master>;
154 simple-audio-card,bitclock-inversion;
155
156 simple-audio-card,cpu {
157 sound-dai = <&mcasp1>;
158 };
159
160 sound_master: simple-audio-card,codec {
161 sound-dai = <&tlv320aic3106>;
162 system-clock-frequency = <24000000>;
163 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300164 };
Darren Etheridgeb675d1e2014-07-01 16:00:20 -0500165
166 panel {
167 compatible = "ti,tilcdc,panel";
168 pinctrl-names = "default", "sleep";
169 pinctrl-0 = <&lcd_pins_default>;
170 pinctrl-1 = <&lcd_pins_sleep>;
171 status = "okay";
172 panel-info {
173 ac-bias = <255>;
174 ac-bias-intrpt = <0>;
175 dma-burst-sz = <16>;
176 bpp = <32>;
177 fdd = <0x80>;
178 sync-edge = <0>;
179 sync-ctrl = <1>;
180 raster-order = <0>;
181 fifo-th = <0>;
182 };
183 display-timings {
184 480x272 {
185 hactive = <480>;
186 vactive = <272>;
187 hback-porch = <43>;
188 hfront-porch = <8>;
189 hsync-len = <4>;
190 vback-porch = <12>;
191 vfront-porch = <4>;
192 vsync-len = <10>;
193 clock-frequency = <9000000>;
194 hsync-active = <0>;
195 vsync-active = <0>;
196 };
197 };
198 };
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530199};
200
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200201&am33xx_pinmux {
202 pinctrl-names = "default";
203 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
204
Darren Etheridgeb675d1e2014-07-01 16:00:20 -0500205 lcd_pins_default: lcd_pins_default {
206 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300207 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
208 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
209 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
210 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
211 AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
212 AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
213 AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
214 AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
215 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
216 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
217 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
218 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
219 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
220 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
221 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
222 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
223 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
224 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
225 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
226 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
227 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
228 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
229 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
230 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
231 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
232 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
233 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
234 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
Darren Etheridgeb675d1e2014-07-01 16:00:20 -0500235 >;
236 };
237
238 lcd_pins_sleep: lcd_pins_sleep {
239 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300240 AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */
241 AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */
242 AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */
243 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */
244 AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */
245 AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */
246 AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */
247 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */
248 AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
249 AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
250 AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
251 AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
252 AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
253 AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
254 AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
255 AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
256 AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
257 AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
258 AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
259 AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
260 AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
261 AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
262 AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
263 AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
264 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */
265 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
266 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
267 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
Darren Etheridgeb675d1e2014-07-01 16:00:20 -0500268 >;
269 };
270
271
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200272 user_leds_s0: user_leds_s0 {
273 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300274 AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
275 AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
276 AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
277 AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200278 >;
279 };
280
281 gpio_keys_s0: gpio_keys_s0 {
282 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300283 AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
284 AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
285 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
286 AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200287 >;
288 };
289
290 i2c0_pins: pinmux_i2c0_pins {
291 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300292 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
293 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200294 >;
295 };
296
297 uart0_pins: pinmux_uart0_pins {
298 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300299 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
300 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200301 >;
302 };
303
304 clkout2_pin: pinmux_clkout2_pin {
305 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300306 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200307 >;
308 };
309
310 ecap2_pins: backlight_pins {
311 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300312 AM33XX_IOPAD(0x99c, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200313 >;
314 };
315
316 cpsw_default: cpsw_default {
317 pinctrl-single,pins = <
318 /* Slave 1 */
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300319 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
320 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
321 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
322 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
323 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
324 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
325 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
326 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
327 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
328 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
329 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
330 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200331
332 /* Slave 2 */
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300333 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
334 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
335 AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
336 AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
337 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
338 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
339 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
340 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
341 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
342 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
343 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
344 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200345 >;
346 };
347
348 cpsw_sleep: cpsw_sleep {
349 pinctrl-single,pins = <
350 /* Slave 1 reset value */
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300351 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
352 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
353 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
354 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
355 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
356 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
357 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
358 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
359 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
360 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
361 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
362 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200363
364 /* Slave 2 reset value*/
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300365 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
366 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
367 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
368 AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
369 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
370 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
371 AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
372 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
373 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
374 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
375 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
376 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200377 >;
378 };
379
380 davinci_mdio_default: davinci_mdio_default {
381 pinctrl-single,pins = <
382 /* MDIO */
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300383 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
384 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200385 >;
386 };
387
388 davinci_mdio_sleep: davinci_mdio_sleep {
389 pinctrl-single,pins = <
390 /* MDIO reset value */
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300391 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
392 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200393 >;
394 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300395
Peter Ujfalusi29ea5ef2013-12-23 11:28:35 +0200396 mmc1_pins: pinmux_mmc1_pins {
397 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300398 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
Peter Ujfalusi29ea5ef2013-12-23 11:28:35 +0200399 >;
400 };
401
Peter Ujfalusib4529852013-10-20 20:04:11 +0300402 mcasp1_pins: mcasp1_pins {
403 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300404 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
405 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
406 AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
407 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
Peter Ujfalusib4529852013-10-20 20:04:11 +0300408 >;
409 };
Imre Kaloz90f4f012014-03-03 10:02:56 +0100410
Peter Ujfalusied8830f2015-07-02 17:06:30 +0300411 mcasp1_pins_sleep: mcasp1_pins_sleep {
412 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300413 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
414 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
415 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
416 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
Peter Ujfalusied8830f2015-07-02 17:06:30 +0300417 >;
418 };
419
Imre Kaloz90f4f012014-03-03 10:02:56 +0100420 mmc2_pins: pinmux_mmc2_pins {
421 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300422 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
423 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
424 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
425 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
426 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
427 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
428 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
Imre Kaloz90f4f012014-03-03 10:02:56 +0100429 >;
430 };
431
432 wl12xx_gpio: pinmux_wl12xx_gpio {
433 pinctrl-single,pins = <
Javier Martinez Canillas06e08fd2015-11-13 01:53:47 -0300434 AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
Imre Kaloz90f4f012014-03-03 10:02:56 +0100435 >;
436 };
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200437};
438
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200439&uart0 {
440 pinctrl-names = "default";
441 pinctrl-0 = <&uart0_pins>;
442
443 status = "okay";
444};
445
446&i2c0 {
447 pinctrl-names = "default";
448 pinctrl-0 = <&i2c0_pins>;
449
450 status = "okay";
451 clock-frequency = <400000>;
452
453 tps: tps@2d {
454 reg = <0x2d>;
455 };
456
457 lis331dlh: lis331dlh@18 {
458 compatible = "st,lis331dlh", "st,lis3lv02d";
459 reg = <0x18>;
460 Vdd-supply = <&lis3_reg>;
461 Vdd_IO-supply = <&lis3_reg>;
462
463 st,click-single-x;
464 st,click-single-y;
465 st,click-single-z;
466 st,click-thresh-x = <10>;
467 st,click-thresh-y = <10>;
468 st,click-thresh-z = <10>;
469 st,irq1-click;
470 st,irq2-click;
471 st,wakeup-x-lo;
472 st,wakeup-x-hi;
473 st,wakeup-y-lo;
474 st,wakeup-y-hi;
475 st,wakeup-z-lo;
476 st,wakeup-z-hi;
477 st,min-limit-x = <120>;
478 st,min-limit-y = <120>;
479 st,min-limit-z = <140>;
480 st,max-limit-x = <550>;
481 st,max-limit-y = <550>;
482 st,max-limit-z = <750>;
483 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300484
485 tlv320aic3106: tlv320aic3106@1b {
Peter Ujfalusib3c616e2015-07-02 17:06:31 +0300486 #sound-dai-cells = <0>;
Peter Ujfalusib4529852013-10-20 20:04:11 +0300487 compatible = "ti,tlv320aic3106";
488 reg = <0x1b>;
489 status = "okay";
490
491 /* Regulators */
492 AVDD-supply = <&vaux2_reg>;
493 IOVDD-supply = <&vaux2_reg>;
494 DRVDD-supply = <&vaux2_reg>;
495 DVDD-supply = <&vbat>;
496 };
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200497};
498
499&usb {
500 status = "okay";
Guido Martínez0f686d22014-04-28 17:54:34 -0300501};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200502
Guido Martínez0f686d22014-04-28 17:54:34 -0300503&usb_ctrl_mod {
504 status = "okay";
505};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200506
Guido Martínez0f686d22014-04-28 17:54:34 -0300507&usb0_phy {
508 status = "okay";
509};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200510
Guido Martínez0f686d22014-04-28 17:54:34 -0300511&usb1_phy {
512 status = "okay";
513};
Yegor Yefremoveda1a4b2014-02-28 08:19:04 +0100514
Guido Martínez0f686d22014-04-28 17:54:34 -0300515&usb0 {
516 status = "okay";
517};
Yegor Yefremoveda1a4b2014-02-28 08:19:04 +0100518
Guido Martínez0f686d22014-04-28 17:54:34 -0300519&usb1 {
520 status = "okay";
521 dr_mode = "host";
522};
Yegor Yefremovcae2a9e2014-03-10 16:26:57 +0100523
Guido Martínez0f686d22014-04-28 17:54:34 -0300524&cppi41dma {
525 status = "okay";
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200526};
527
528&epwmss2 {
529 status = "okay";
530
531 ecap2: ecap@48304100 {
532 status = "okay";
533 pinctrl-names = "default";
534 pinctrl-0 = <&ecap2_pins>;
535 };
536};
537
Florian Vaussardeb33ef662013-06-03 16:12:22 +0200538#include "tps65910.dtsi"
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530539
540&tps {
541 vcc1-supply = <&vbat>;
542 vcc2-supply = <&vbat>;
543 vcc3-supply = <&vbat>;
544 vcc4-supply = <&vbat>;
545 vcc5-supply = <&vbat>;
546 vcc6-supply = <&vbat>;
547 vcc7-supply = <&vbat>;
548 vccio-supply = <&vbat>;
549
550 regulators {
551 vrtc_reg: regulator@0 {
552 regulator-always-on;
553 };
554
555 vio_reg: regulator@1 {
556 regulator-always-on;
557 };
558
559 vdd1_reg: regulator@2 {
560 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
561 regulator-name = "vdd_mpu";
562 regulator-min-microvolt = <912500>;
Dave Gerlachfb515b82016-05-18 18:36:26 -0500563 regulator-max-microvolt = <1351500>;
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530564 regulator-boot-on;
565 regulator-always-on;
566 };
567
568 vdd2_reg: regulator@3 {
569 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
570 regulator-name = "vdd_core";
571 regulator-min-microvolt = <912500>;
572 regulator-max-microvolt = <1150000>;
573 regulator-boot-on;
574 regulator-always-on;
575 };
576
577 vdd3_reg: regulator@4 {
578 regulator-always-on;
579 };
580
581 vdig1_reg: regulator@5 {
582 regulator-always-on;
583 };
584
585 vdig2_reg: regulator@6 {
586 regulator-always-on;
587 };
588
589 vpll_reg: regulator@7 {
590 regulator-always-on;
591 };
592
593 vdac_reg: regulator@8 {
594 regulator-always-on;
595 };
596
597 vaux1_reg: regulator@9 {
598 regulator-always-on;
599 };
600
601 vaux2_reg: regulator@10 {
602 regulator-always-on;
603 };
604
605 vaux33_reg: regulator@11 {
606 regulator-always-on;
607 };
608
609 vmmc_reg: regulator@12 {
Matt Porter55b44522013-09-10 14:24:39 -0500610 regulator-min-microvolt = <1800000>;
611 regulator-max-microvolt = <3300000>;
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530612 regulator-always-on;
613 };
614 };
615};
Mugunthan V N94a924c2013-06-07 17:02:53 +0530616
617&mac {
618 pinctrl-names = "default", "sleep";
619 pinctrl-0 = <&cpsw_default>;
620 pinctrl-1 = <&cpsw_sleep>;
Yegor Yefremov18c49af2014-03-05 08:29:19 +0100621 dual_emac = <1>;
Johan Hovold16c75a12014-05-08 10:57:36 +0200622 status = "okay";
Mugunthan V N94a924c2013-06-07 17:02:53 +0530623};
624
625&davinci_mdio {
626 pinctrl-names = "default", "sleep";
627 pinctrl-0 = <&davinci_mdio_default>;
628 pinctrl-1 = <&davinci_mdio_sleep>;
Johan Hovold16c75a12014-05-08 10:57:36 +0200629 status = "okay";
Mugunthan V N94a924c2013-06-07 17:02:53 +0530630};
Linus Torvalds496322b2013-07-09 18:24:39 -0700631
Mugunthan V Nf6655d62013-06-03 20:10:09 +0000632&cpsw_emac0 {
633 phy_id = <&davinci_mdio>, <0>;
Mugunthan V N6d75afe2013-06-03 20:10:11 +0000634 phy-mode = "rgmii-txid";
Yegor Yefremov18c49af2014-03-05 08:29:19 +0100635 dual_emac_res_vlan = <1>;
Mugunthan V Nf6655d62013-06-03 20:10:09 +0000636};
637
638&cpsw_emac1 {
639 phy_id = <&davinci_mdio>, <1>;
Mugunthan V N6d75afe2013-06-03 20:10:11 +0000640 phy-mode = "rgmii-txid";
Yegor Yefremov18c49af2014-03-05 08:29:19 +0100641 dual_emac_res_vlan = <2>;
Mugunthan V Nf6655d62013-06-03 20:10:09 +0000642};
Matt Porter55b44522013-09-10 14:24:39 -0500643
644&mmc1 {
645 status = "okay";
646 vmmc-supply = <&vmmc_reg>;
Balaji T K0d8d40f2013-09-27 17:05:10 +0530647 bus-width = <4>;
Peter Ujfalusi29ea5ef2013-12-23 11:28:35 +0200648 pinctrl-names = "default";
649 pinctrl-0 = <&mmc1_pins>;
Mugunthan V Nc7ce74b2015-10-12 14:37:10 +0530650 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
Matt Porter55b44522013-09-10 14:24:39 -0500651};
Mark A. Greerf8302e12013-08-23 14:12:35 -0700652
653&sham {
654 status = "okay";
655};
Mark A. Greer99919e5e2013-08-23 14:12:36 -0700656
657&aes {
658 status = "okay";
659};
Rajendra Nayak6046adb2013-10-09 15:42:01 +0530660
661&gpio0 {
662 ti,no-reset-on-init;
663};
Peter Ujfalusib4529852013-10-20 20:04:11 +0300664
Imre Kaloz90f4f012014-03-03 10:02:56 +0100665&mmc2 {
666 status = "okay";
667 vmmc-supply = <&wl12xx_vmmc>;
668 ti,non-removable;
669 bus-width = <4>;
670 cap-power-off-card;
671 pinctrl-names = "default";
672 pinctrl-0 = <&mmc2_pins>;
Eliad Peller99f84ca2015-03-18 18:38:29 +0200673
674 #address-cells = <1>;
675 #size-cells = <0>;
676 wlcore: wlcore@2 {
677 compatible = "ti,wl1271";
678 reg = <2>;
Romain Izardf25bf742015-05-20 10:00:10 -0700679 interrupt-parent = <&gpio0>;
Eliad Peller99f84ca2015-03-18 18:38:29 +0200680 interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
681 ref-clock-frequency = <38400000>;
682 };
Imre Kaloz90f4f012014-03-03 10:02:56 +0100683};
684
Peter Ujfalusib4529852013-10-20 20:04:11 +0300685&mcasp1 {
Peter Ujfalusib3c616e2015-07-02 17:06:31 +0300686 #sound-dai-cells = <0>;
Peter Ujfalusied8830f2015-07-02 17:06:30 +0300687 pinctrl-names = "default", "sleep";
Peter Ujfalusic8b518a2015-07-02 17:06:29 +0300688 pinctrl-0 = <&mcasp1_pins>;
Peter Ujfalusied8830f2015-07-02 17:06:30 +0300689 pinctrl-1 = <&mcasp1_pins_sleep>;
Peter Ujfalusib4529852013-10-20 20:04:11 +0300690
Peter Ujfalusic8b518a2015-07-02 17:06:29 +0300691 status = "okay";
Peter Ujfalusib4529852013-10-20 20:04:11 +0300692
Peter Ujfalusic8b518a2015-07-02 17:06:29 +0300693 op-mode = <0>; /* MCASP_IIS_MODE */
694 tdm-slots = <2>;
695 /* 4 serializers */
696 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
697 0 0 1 2
698 >;
699 tx-num-evt = <32>;
700 rx-num-evt = <32>;
Peter Ujfalusib4529852013-10-20 20:04:11 +0300701};
Linus Torvalds4937e2a2013-11-15 16:43:53 -0800702
Felipe Balbi2c027b72013-11-10 23:58:31 -0800703&tscadc {
704 status = "okay";
705 tsc {
706 ti,wires = <4>;
707 ti,x-plate-resistance = <200>;
708 ti,coordinate-readouts = <5>;
709 ti,wire-config = <0x00 0x11 0x22 0x33>;
710 };
711};
Darren Etheridgeb675d1e2014-07-01 16:00:20 -0500712
713&lcdc {
714 status = "okay";
715};