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Daniel Lezcano7880e452014-05-09 06:43:26 +09001/* linux/arch/arm/mach-exynos/cpuidle.c
Jaecheol Lee3d739982011-03-16 07:28:23 +09002 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/cpuidle.h>
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080014#include <linux/cpu_pm.h>
Jaecheol Lee3d739982011-03-16 07:28:23 +090015#include <linux/io.h>
Kyungmin Park76ee4552011-11-08 19:57:59 +090016#include <linux/export.h>
Arnd Bergmann96c3a252014-03-19 18:29:36 +010017#include <linux/module.h>
Kyungmin Park76ee4552011-11-08 19:57:59 +090018#include <linux/time.h>
Bartlomiej Zolnierkiewicz35baa332013-08-30 12:15:04 +020019#include <linux/platform_device.h>
Jaecheol Lee3d739982011-03-16 07:28:23 +090020
21#include <asm/proc-fns.h>
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080022#include <asm/smp_scu.h>
23#include <asm/suspend.h>
24#include <asm/unified.h>
Amit Daniel Kachhap06c77b32012-05-12 16:29:21 +090025#include <asm/cpuidle.h>
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080026
27#include <plat/cpu.h>
Amit Daniel Kachhap89693012013-07-24 14:06:13 +090028#include <plat/pm.h>
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080029
Kukjin Kimb5fd1302013-12-19 04:22:09 +090030#include <mach/map.h>
31
Kukjin Kimccd458c2012-12-31 10:06:48 -080032#include "common.h"
Kukjin Kim65c9a852013-12-19 04:06:56 +090033#include "regs-pmu.h"
Kukjin Kimccd458c2012-12-31 10:06:48 -080034
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080035#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
36 S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
37 (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
38#define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
39 S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
40 (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
41
42#define S5P_CHECK_AFTR 0xFCBA0D10
Jaecheol Lee3d739982011-03-16 07:28:23 +090043
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080044/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
Daniel Lezcano7880e452014-05-09 06:43:26 +090045static void exynos_set_wakeupmask(void)
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080046{
47 __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
48}
49
50static unsigned int g_pwr_ctrl, g_diag_reg;
51
52static void save_cpu_arch_register(void)
53{
54 /*read power control register*/
55 asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl) : : "cc");
56 /*read diagnostic register*/
57 asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg) : : "cc");
58 return;
59}
60
61static void restore_cpu_arch_register(void)
62{
63 /*write power control register*/
64 asm("mcr p15, 0, %0, c15, c0, 0" : : "r"(g_pwr_ctrl) : "cc");
65 /*write diagnostic register*/
66 asm("mcr p15, 0, %0, c15, c0, 1" : : "r"(g_diag_reg) : "cc");
67 return;
68}
69
70static int idle_finisher(unsigned long flags)
71{
72 cpu_do_idle();
73 return 1;
74}
75
Daniel Lezcano7880e452014-05-09 06:43:26 +090076static int exynos_enter_core0_aftr(struct cpuidle_device *dev,
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080077 struct cpuidle_driver *drv,
78 int index)
79{
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080080 unsigned long tmp;
81
Daniel Lezcano7880e452014-05-09 06:43:26 +090082 exynos_set_wakeupmask();
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080083
84 /* Set value of power down register for aftr mode */
Jongpill Lee7d44d2b2012-02-17 09:51:31 +090085 exynos_sys_powerdown_conf(SYS_AFTR);
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080086
Tomasz Figa8dec0672014-03-21 02:59:30 +090087 __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -080088 __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
89
90 save_cpu_arch_register();
91
92 /* Setting Central Sequence Register for power down mode */
93 tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
94 tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
95 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
96
97 cpu_pm_enter();
98 cpu_suspend(0, idle_finisher);
99
100#ifdef CONFIG_SMP
Abhilash Kesavana6332082012-11-22 14:46:34 +0900101 if (!soc_is_exynos5250())
102 scu_enable(S5P_VA_SCU);
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -0800103#endif
104 cpu_pm_exit();
105
106 restore_cpu_arch_register();
107
108 /*
109 * If PMU failed while entering sleep mode, WFI will be
110 * ignored by PMU and then exiting cpu_do_idle().
111 * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
112 * in this situation.
113 */
114 tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
115 if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
116 tmp |= S5P_CENTRAL_LOWPWR_CFG;
117 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
118 }
119
120 /* Clear wakeup state register */
121 __raw_writel(0x0, S5P_WAKEUP_STAT);
122
Deepthi Dharware978aa72011-10-28 16:20:09 +0530123 return index;
Jaecheol Lee3d739982011-03-16 07:28:23 +0900124}
125
Daniel Lezcano7880e452014-05-09 06:43:26 +0900126static int exynos_enter_lowpower(struct cpuidle_device *dev,
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -0800127 struct cpuidle_driver *drv,
128 int index)
129{
130 int new_index = index;
131
Bartlomiej Zolnierkiewicz118f5c12013-12-20 19:47:23 +0100132 /* AFTR can only be entered when cores other than CPU0 are offline */
133 if (num_online_cpus() > 1 || dev->cpu != 0)
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -0800134 new_index = drv->safe_state_index;
135
136 if (new_index == 0)
Amit Daniel Kachhap06c77b32012-05-12 16:29:21 +0900137 return arm_cpuidle_simple_enter(dev, drv, new_index);
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -0800138 else
Daniel Lezcano7880e452014-05-09 06:43:26 +0900139 return exynos_enter_core0_aftr(dev, drv, new_index);
Amit Daniel Kachhap67173ca2012-03-08 02:07:27 -0800140}
141
Daniel Lezcano7880e452014-05-09 06:43:26 +0900142static struct cpuidle_driver exynos_idle_driver = {
143 .name = "exynos_idle",
Daniel Lezcano53af16a2014-05-09 06:43:26 +0900144 .owner = THIS_MODULE,
145 .states = {
146 [0] = ARM_CPUIDLE_WFI_STATE,
147 [1] = {
Daniel Lezcano7880e452014-05-09 06:43:26 +0900148 .enter = exynos_enter_lowpower,
Daniel Lezcano53af16a2014-05-09 06:43:26 +0900149 .exit_latency = 300,
150 .target_residency = 100000,
151 .flags = CPUIDLE_FLAG_TIME_VALID,
152 .name = "C1",
153 .desc = "ARM power down",
154 },
155 },
156 .state_count = 2,
157 .safe_state_index = 0,
158};
159
Jingoo Hanf612a4f2013-10-21 10:53:03 +0900160static int exynos_cpuidle_probe(struct platform_device *pdev)
Jaecheol Lee3d739982011-03-16 07:28:23 +0900161{
Daniel Lezcano043c86b2014-05-09 06:43:26 +0900162 int ret;
Jaecheol Lee3d739982011-03-16 07:28:23 +0900163
Amit Daniel Kachhap1e9fec02013-08-28 00:48:24 +0900164 if (soc_is_exynos5440())
Daniel Lezcano7880e452014-05-09 06:43:26 +0900165 exynos_idle_driver.state_count = 1;
Amit Daniel Kachhap1e9fec02013-08-28 00:48:24 +0900166
Daniel Lezcano7880e452014-05-09 06:43:26 +0900167 ret = cpuidle_register(&exynos_idle_driver, NULL);
Daniel Lezcano5db9f432013-01-18 21:57:58 -0800168 if (ret) {
Jingoo Hanae7c4c82013-10-21 10:52:15 +0900169 dev_err(&pdev->dev, "failed to register cpuidle driver\n");
Daniel Lezcano5db9f432013-01-18 21:57:58 -0800170 return ret;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530171 }
Jaecheol Lee3d739982011-03-16 07:28:23 +0900172
Jaecheol Lee3d739982011-03-16 07:28:23 +0900173 return 0;
174}
Bartlomiej Zolnierkiewicz35baa332013-08-30 12:15:04 +0200175
176static struct platform_driver exynos_cpuidle_driver = {
177 .probe = exynos_cpuidle_probe,
178 .driver = {
179 .name = "exynos_cpuidle",
180 .owner = THIS_MODULE,
181 },
182};
183
184module_platform_driver(exynos_cpuidle_driver);