blob: 00a3abe103a5ac472dfb352a1bb0cec42cd29ddb [file] [log] [blame]
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +05301/*
2 * clk-s2mps11.c - Clock driver for S2MPS11.
3 *
4 * Copyright (C) 2013 Samsung Electornics
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/err.h>
24#include <linux/of.h>
25#include <linux/clkdev.h>
26#include <linux/regmap.h>
27#include <linux/clk-provider.h>
28#include <linux/platform_device.h>
29#include <linux/mfd/samsung/s2mps11.h>
30#include <linux/mfd/samsung/core.h>
31
32#define s2mps11_name(a) (a->hw.init->name)
33
34static struct clk **clk_table;
35static struct clk_onecell_data clk_data;
36
37enum {
38 S2MPS11_CLK_AP = 0,
39 S2MPS11_CLK_CP,
40 S2MPS11_CLK_BT,
41 S2MPS11_CLKS_NUM,
42};
43
44struct s2mps11_clk {
45 struct sec_pmic_dev *iodev;
46 struct clk_hw hw;
47 struct clk *clk;
48 struct clk_lookup *lookup;
49 u32 mask;
50 bool enabled;
51};
52
53static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
54{
55 return container_of(hw, struct s2mps11_clk, hw);
56}
57
58static int s2mps11_clk_prepare(struct clk_hw *hw)
59{
60 struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
61 int ret;
62
Krzysztof Kozlowski1b1ccee2013-12-11 15:07:43 +010063 ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +053064 S2MPS11_REG_RTC_CTRL,
65 s2mps11->mask, s2mps11->mask);
66 if (!ret)
67 s2mps11->enabled = true;
68
69 return ret;
70}
71
72static void s2mps11_clk_unprepare(struct clk_hw *hw)
73{
74 struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
75 int ret;
76
Krzysztof Kozlowski1b1ccee2013-12-11 15:07:43 +010077 ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, S2MPS11_REG_RTC_CTRL,
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +053078 s2mps11->mask, ~s2mps11->mask);
79
80 if (!ret)
81 s2mps11->enabled = false;
82}
83
84static int s2mps11_clk_is_enabled(struct clk_hw *hw)
85{
86 struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
87
88 return s2mps11->enabled;
89}
90
91static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
92 unsigned long parent_rate)
93{
94 struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
95 if (s2mps11->enabled)
96 return 32768;
97 else
98 return 0;
99}
100
101static struct clk_ops s2mps11_clk_ops = {
102 .prepare = s2mps11_clk_prepare,
103 .unprepare = s2mps11_clk_unprepare,
104 .is_enabled = s2mps11_clk_is_enabled,
105 .recalc_rate = s2mps11_clk_recalc_rate,
106};
107
108static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
109 [S2MPS11_CLK_AP] = {
110 .name = "s2mps11_ap",
111 .ops = &s2mps11_clk_ops,
112 .flags = CLK_IS_ROOT,
113 },
114 [S2MPS11_CLK_CP] = {
115 .name = "s2mps11_cp",
116 .ops = &s2mps11_clk_ops,
117 .flags = CLK_IS_ROOT,
118 },
119 [S2MPS11_CLK_BT] = {
120 .name = "s2mps11_bt",
121 .ops = &s2mps11_clk_ops,
122 .flags = CLK_IS_ROOT,
123 },
124};
125
126static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev)
127{
128 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
129 struct device_node *clk_np;
130 int i;
131
132 if (!iodev->dev->of_node)
133 return NULL;
134
135 clk_np = of_find_node_by_name(iodev->dev->of_node, "clocks");
136 if (!clk_np) {
137 dev_err(&pdev->dev, "could not find clock sub-node\n");
138 return ERR_PTR(-EINVAL);
139 }
140
141 clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
142 S2MPS11_CLKS_NUM, GFP_KERNEL);
143 if (!clk_table)
144 return ERR_PTR(-ENOMEM);
145
146 for (i = 0; i < S2MPS11_CLKS_NUM; i++)
147 of_property_read_string_index(clk_np, "clock-output-names", i,
148 &s2mps11_clks_init[i].name);
149
150 return clk_np;
151}
152
153static int s2mps11_clk_probe(struct platform_device *pdev)
154{
155 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
156 struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
157 struct device_node *clk_np = NULL;
158 int i, ret = 0;
159 u32 val;
160
161 s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
162 S2MPS11_CLKS_NUM, GFP_KERNEL);
163 if (!s2mps11_clks)
164 return -ENOMEM;
165
166 s2mps11_clk = s2mps11_clks;
167
168 clk_np = s2mps11_clk_parse_dt(pdev);
169 if (IS_ERR(clk_np))
170 return PTR_ERR(clk_np);
171
172 for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
173 s2mps11_clk->iodev = iodev;
174 s2mps11_clk->hw.init = &s2mps11_clks_init[i];
175 s2mps11_clk->mask = 1 << i;
176
Krzysztof Kozlowski1b1ccee2013-12-11 15:07:43 +0100177 ret = regmap_read(s2mps11_clk->iodev->regmap_pmic,
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530178 S2MPS11_REG_RTC_CTRL, &val);
179 if (ret < 0)
180 goto err_reg;
181
182 s2mps11_clk->enabled = val & s2mps11_clk->mask;
183
184 s2mps11_clk->clk = devm_clk_register(&pdev->dev,
185 &s2mps11_clk->hw);
186 if (IS_ERR(s2mps11_clk->clk)) {
187 dev_err(&pdev->dev, "Fail to register : %s\n",
188 s2mps11_name(s2mps11_clk));
189 ret = PTR_ERR(s2mps11_clk->clk);
190 goto err_reg;
191 }
192
193 s2mps11_clk->lookup = devm_kzalloc(&pdev->dev,
194 sizeof(struct clk_lookup), GFP_KERNEL);
195 if (!s2mps11_clk->lookup) {
196 ret = -ENOMEM;
197 goto err_lup;
198 }
199
200 s2mps11_clk->lookup->con_id = s2mps11_name(s2mps11_clk);
201 s2mps11_clk->lookup->clk = s2mps11_clk->clk;
202
203 clkdev_add(s2mps11_clk->lookup);
204 }
205
206 if (clk_table) {
207 for (i = 0; i < S2MPS11_CLKS_NUM; i++)
208 clk_table[i] = s2mps11_clks[i].clk;
209
210 clk_data.clks = clk_table;
211 clk_data.clk_num = S2MPS11_CLKS_NUM;
212 of_clk_add_provider(clk_np, of_clk_src_onecell_get, &clk_data);
213 }
214
215 platform_set_drvdata(pdev, s2mps11_clks);
216
217 return ret;
218err_lup:
219 devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
220err_reg:
221 while (s2mps11_clk > s2mps11_clks) {
222 if (s2mps11_clk->lookup) {
223 clkdev_drop(s2mps11_clk->lookup);
224 devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
225 }
226 s2mps11_clk--;
227 }
228
229 return ret;
230}
231
232static int s2mps11_clk_remove(struct platform_device *pdev)
233{
234 struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
235 int i;
236
237 for (i = 0; i < S2MPS11_CLKS_NUM; i++)
238 clkdev_drop(s2mps11_clks[i].lookup);
239
240 return 0;
241}
242
243static const struct platform_device_id s2mps11_clk_id[] = {
244 { "s2mps11-clk", 0},
245 { },
246};
247MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
248
249static struct platform_driver s2mps11_clk_driver = {
250 .driver = {
251 .name = "s2mps11-clk",
252 .owner = THIS_MODULE,
253 },
254 .probe = s2mps11_clk_probe,
255 .remove = s2mps11_clk_remove,
256 .id_table = s2mps11_clk_id,
257};
258
259static int __init s2mps11_clk_init(void)
260{
261 return platform_driver_register(&s2mps11_clk_driver);
262}
263subsys_initcall(s2mps11_clk_init);
264
265static void __init s2mps11_clk_cleanup(void)
266{
267 platform_driver_unregister(&s2mps11_clk_driver);
268}
269module_exit(s2mps11_clk_cleanup);
270
271MODULE_DESCRIPTION("S2MPS11 Clock Driver");
272MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
273MODULE_LICENSE("GPL");