Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 1 | /* |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 2 | * MTD SPI driver for ST M25Pxx (and similar) serial flash chips |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 3 | * |
| 4 | * Author: Mike Lavender, mike@steroidmicros.com |
| 5 | * |
| 6 | * Copyright (c) 2005, Intec Automation Inc. |
| 7 | * |
| 8 | * Some parts are based on lart.c by Abraham Van Der Merwe |
| 9 | * |
| 10 | * Cleaned up and generalized based on mtd_dataflash.c |
| 11 | * |
| 12 | * This code is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License version 2 as |
| 14 | * published by the Free Software Foundation. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/device.h> |
| 21 | #include <linux/interrupt.h> |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 22 | #include <linux/mutex.h> |
| 23 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 24 | #include <linux/mtd/mtd.h> |
| 25 | #include <linux/mtd/partitions.h> |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 26 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 27 | #include <linux/spi/spi.h> |
| 28 | #include <linux/spi/flash.h> |
| 29 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 30 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 31 | #define FLASH_PAGESIZE 256 |
| 32 | |
| 33 | /* Flash opcodes. */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 34 | #define OPCODE_WREN 0x06 /* Write enable */ |
| 35 | #define OPCODE_RDSR 0x05 /* Read status register */ |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 36 | #define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 37 | #define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */ |
| 38 | #define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */ |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 39 | #define OPCODE_BE_4K 0x20 /* Erase 4KiB block */ |
| 40 | #define OPCODE_BE_32K 0x52 /* Erase 32KiB block */ |
| 41 | #define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 42 | #define OPCODE_RDID 0x9f /* Read JEDEC ID */ |
| 43 | |
| 44 | /* Status Register bits. */ |
| 45 | #define SR_WIP 1 /* Write in progress */ |
| 46 | #define SR_WEL 2 /* Write enable latch */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 47 | /* meaning of other SR_* bits may differ between vendors */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 48 | #define SR_BP0 4 /* Block protect 0 */ |
| 49 | #define SR_BP1 8 /* Block protect 1 */ |
| 50 | #define SR_BP2 0x10 /* Block protect 2 */ |
| 51 | #define SR_SRWD 0x80 /* SR write protect */ |
| 52 | |
| 53 | /* Define max times to check status register before we give up. */ |
| 54 | #define MAX_READY_WAIT_COUNT 100000 |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 55 | #define CMD_SIZE 4 |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 56 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 57 | #ifdef CONFIG_M25PXX_USE_FAST_READ |
| 58 | #define OPCODE_READ OPCODE_FAST_READ |
| 59 | #define FAST_READ_DUMMY_BYTE 1 |
| 60 | #else |
| 61 | #define OPCODE_READ OPCODE_NORM_READ |
| 62 | #define FAST_READ_DUMMY_BYTE 0 |
| 63 | #endif |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 64 | |
| 65 | #ifdef CONFIG_MTD_PARTITIONS |
| 66 | #define mtd_has_partitions() (1) |
| 67 | #else |
| 68 | #define mtd_has_partitions() (0) |
| 69 | #endif |
| 70 | |
| 71 | /****************************************************************************/ |
| 72 | |
| 73 | struct m25p { |
| 74 | struct spi_device *spi; |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 75 | struct mutex lock; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 76 | struct mtd_info mtd; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 77 | unsigned partitioned:1; |
| 78 | u8 erase_opcode; |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 79 | u8 command[CMD_SIZE + FAST_READ_DUMMY_BYTE]; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 80 | }; |
| 81 | |
| 82 | static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) |
| 83 | { |
| 84 | return container_of(mtd, struct m25p, mtd); |
| 85 | } |
| 86 | |
| 87 | /****************************************************************************/ |
| 88 | |
| 89 | /* |
| 90 | * Internal helper functions |
| 91 | */ |
| 92 | |
| 93 | /* |
| 94 | * Read the status register, returning its value in the location |
| 95 | * Return the status register value. |
| 96 | * Returns negative if error occurred. |
| 97 | */ |
| 98 | static int read_sr(struct m25p *flash) |
| 99 | { |
| 100 | ssize_t retval; |
| 101 | u8 code = OPCODE_RDSR; |
| 102 | u8 val; |
| 103 | |
| 104 | retval = spi_write_then_read(flash->spi, &code, 1, &val, 1); |
| 105 | |
| 106 | if (retval < 0) { |
| 107 | dev_err(&flash->spi->dev, "error %d reading SR\n", |
| 108 | (int) retval); |
| 109 | return retval; |
| 110 | } |
| 111 | |
| 112 | return val; |
| 113 | } |
| 114 | |
| 115 | |
| 116 | /* |
| 117 | * Set write enable latch with Write Enable command. |
| 118 | * Returns negative if error occurred. |
| 119 | */ |
| 120 | static inline int write_enable(struct m25p *flash) |
| 121 | { |
| 122 | u8 code = OPCODE_WREN; |
| 123 | |
| 124 | return spi_write_then_read(flash->spi, &code, 1, NULL, 0); |
| 125 | } |
| 126 | |
| 127 | |
| 128 | /* |
| 129 | * Service routine to read status register until ready, or timeout occurs. |
| 130 | * Returns non-zero if error. |
| 131 | */ |
| 132 | static int wait_till_ready(struct m25p *flash) |
| 133 | { |
| 134 | int count; |
| 135 | int sr; |
| 136 | |
| 137 | /* one chip guarantees max 5 msec wait here after page writes, |
| 138 | * but potentially three seconds (!) after page erase. |
| 139 | */ |
| 140 | for (count = 0; count < MAX_READY_WAIT_COUNT; count++) { |
| 141 | if ((sr = read_sr(flash)) < 0) |
| 142 | break; |
| 143 | else if (!(sr & SR_WIP)) |
| 144 | return 0; |
| 145 | |
| 146 | /* REVISIT sometimes sleeping would be best */ |
| 147 | } |
| 148 | |
| 149 | return 1; |
| 150 | } |
| 151 | |
| 152 | |
| 153 | /* |
| 154 | * Erase one sector of flash memory at offset ``offset'' which is any |
| 155 | * address within the sector which should be erased. |
| 156 | * |
| 157 | * Returns 0 if successful, non-zero otherwise. |
| 158 | */ |
| 159 | static int erase_sector(struct m25p *flash, u32 offset) |
| 160 | { |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 161 | DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB at 0x%08x\n", |
Harvey Harrison | cb53b3b | 2008-04-18 13:44:19 -0700 | [diff] [blame] | 162 | flash->spi->dev.bus_id, __func__, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 163 | flash->mtd.erasesize / 1024, offset); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 164 | |
| 165 | /* Wait until finished previous write command. */ |
| 166 | if (wait_till_ready(flash)) |
| 167 | return 1; |
| 168 | |
| 169 | /* Send write enable, then erase commands. */ |
| 170 | write_enable(flash); |
| 171 | |
| 172 | /* Set up command buffer. */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 173 | flash->command[0] = flash->erase_opcode; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 174 | flash->command[1] = offset >> 16; |
| 175 | flash->command[2] = offset >> 8; |
| 176 | flash->command[3] = offset; |
| 177 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 178 | spi_write(flash->spi, flash->command, CMD_SIZE); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 179 | |
| 180 | return 0; |
| 181 | } |
| 182 | |
| 183 | /****************************************************************************/ |
| 184 | |
| 185 | /* |
| 186 | * MTD implementation |
| 187 | */ |
| 188 | |
| 189 | /* |
| 190 | * Erase an address range on the flash chip. The address range may extend |
| 191 | * one or more erase sectors. Return an error is there is a problem erasing. |
| 192 | */ |
| 193 | static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr) |
| 194 | { |
| 195 | struct m25p *flash = mtd_to_m25p(mtd); |
| 196 | u32 addr,len; |
| 197 | |
Andrew Morton | 19676ff | 2006-05-29 11:33:33 +0100 | [diff] [blame] | 198 | DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %d\n", |
Harvey Harrison | cb53b3b | 2008-04-18 13:44:19 -0700 | [diff] [blame] | 199 | flash->spi->dev.bus_id, __func__, "at", |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 200 | (u32)instr->addr, instr->len); |
| 201 | |
| 202 | /* sanity checks */ |
| 203 | if (instr->addr + instr->len > flash->mtd.size) |
| 204 | return -EINVAL; |
| 205 | if ((instr->addr % mtd->erasesize) != 0 |
| 206 | || (instr->len % mtd->erasesize) != 0) { |
| 207 | return -EINVAL; |
| 208 | } |
| 209 | |
| 210 | addr = instr->addr; |
| 211 | len = instr->len; |
| 212 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 213 | mutex_lock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 214 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 215 | /* REVISIT in some cases we could speed up erasing large regions |
| 216 | * by using OPCODE_SE instead of OPCODE_BE_4K |
| 217 | */ |
| 218 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 219 | /* now erase those sectors */ |
| 220 | while (len) { |
| 221 | if (erase_sector(flash, addr)) { |
| 222 | instr->state = MTD_ERASE_FAILED; |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 223 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 224 | return -EIO; |
| 225 | } |
| 226 | |
| 227 | addr += mtd->erasesize; |
| 228 | len -= mtd->erasesize; |
| 229 | } |
| 230 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 231 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 232 | |
| 233 | instr->state = MTD_ERASE_DONE; |
| 234 | mtd_erase_callback(instr); |
| 235 | |
| 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | /* |
| 240 | * Read an address range from the flash chip. The address range |
| 241 | * may be any size provided it is within the physical boundaries. |
| 242 | */ |
| 243 | static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 244 | size_t *retlen, u_char *buf) |
| 245 | { |
| 246 | struct m25p *flash = mtd_to_m25p(mtd); |
| 247 | struct spi_transfer t[2]; |
| 248 | struct spi_message m; |
| 249 | |
| 250 | DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n", |
Harvey Harrison | cb53b3b | 2008-04-18 13:44:19 -0700 | [diff] [blame] | 251 | flash->spi->dev.bus_id, __func__, "from", |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 252 | (u32)from, len); |
| 253 | |
| 254 | /* sanity checks */ |
| 255 | if (!len) |
| 256 | return 0; |
| 257 | |
| 258 | if (from + len > flash->mtd.size) |
| 259 | return -EINVAL; |
| 260 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 261 | spi_message_init(&m); |
| 262 | memset(t, 0, (sizeof t)); |
| 263 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 264 | /* NOTE: |
| 265 | * OPCODE_FAST_READ (if available) is faster. |
| 266 | * Should add 1 byte DUMMY_BYTE. |
| 267 | */ |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 268 | t[0].tx_buf = flash->command; |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 269 | t[0].len = CMD_SIZE + FAST_READ_DUMMY_BYTE; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 270 | spi_message_add_tail(&t[0], &m); |
| 271 | |
| 272 | t[1].rx_buf = buf; |
| 273 | t[1].len = len; |
| 274 | spi_message_add_tail(&t[1], &m); |
| 275 | |
| 276 | /* Byte count starts at zero. */ |
| 277 | if (retlen) |
| 278 | *retlen = 0; |
| 279 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 280 | mutex_lock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 281 | |
| 282 | /* Wait till previous write/erase is done. */ |
| 283 | if (wait_till_ready(flash)) { |
| 284 | /* REVISIT status return?? */ |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 285 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 286 | return 1; |
| 287 | } |
| 288 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 289 | /* FIXME switch to OPCODE_FAST_READ. It's required for higher |
| 290 | * clocks; and at this writing, every chip this driver handles |
| 291 | * supports that opcode. |
| 292 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 293 | |
| 294 | /* Set up the write data buffer. */ |
| 295 | flash->command[0] = OPCODE_READ; |
| 296 | flash->command[1] = from >> 16; |
| 297 | flash->command[2] = from >> 8; |
| 298 | flash->command[3] = from; |
| 299 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 300 | spi_sync(flash->spi, &m); |
| 301 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 302 | *retlen = m.actual_length - CMD_SIZE - FAST_READ_DUMMY_BYTE; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 303 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 304 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 305 | |
| 306 | return 0; |
| 307 | } |
| 308 | |
| 309 | /* |
| 310 | * Write an address range to the flash chip. Data must be written in |
| 311 | * FLASH_PAGESIZE chunks. The address range may be any size provided |
| 312 | * it is within the physical boundaries. |
| 313 | */ |
| 314 | static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 315 | size_t *retlen, const u_char *buf) |
| 316 | { |
| 317 | struct m25p *flash = mtd_to_m25p(mtd); |
| 318 | u32 page_offset, page_size; |
| 319 | struct spi_transfer t[2]; |
| 320 | struct spi_message m; |
| 321 | |
| 322 | DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n", |
Harvey Harrison | cb53b3b | 2008-04-18 13:44:19 -0700 | [diff] [blame] | 323 | flash->spi->dev.bus_id, __func__, "to", |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 324 | (u32)to, len); |
| 325 | |
| 326 | if (retlen) |
| 327 | *retlen = 0; |
| 328 | |
| 329 | /* sanity checks */ |
| 330 | if (!len) |
| 331 | return(0); |
| 332 | |
| 333 | if (to + len > flash->mtd.size) |
| 334 | return -EINVAL; |
| 335 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 336 | spi_message_init(&m); |
| 337 | memset(t, 0, (sizeof t)); |
| 338 | |
| 339 | t[0].tx_buf = flash->command; |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 340 | t[0].len = CMD_SIZE; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 341 | spi_message_add_tail(&t[0], &m); |
| 342 | |
| 343 | t[1].tx_buf = buf; |
| 344 | spi_message_add_tail(&t[1], &m); |
| 345 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 346 | mutex_lock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 347 | |
| 348 | /* Wait until finished previous write command. */ |
| 349 | if (wait_till_ready(flash)) |
| 350 | return 1; |
| 351 | |
| 352 | write_enable(flash); |
| 353 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 354 | /* Set up the opcode in the write buffer. */ |
| 355 | flash->command[0] = OPCODE_PP; |
| 356 | flash->command[1] = to >> 16; |
| 357 | flash->command[2] = to >> 8; |
| 358 | flash->command[3] = to; |
| 359 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 360 | /* what page do we start with? */ |
| 361 | page_offset = to % FLASH_PAGESIZE; |
| 362 | |
| 363 | /* do all the bytes fit onto one page? */ |
| 364 | if (page_offset + len <= FLASH_PAGESIZE) { |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 365 | t[1].len = len; |
| 366 | |
| 367 | spi_sync(flash->spi, &m); |
| 368 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 369 | *retlen = m.actual_length - CMD_SIZE; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 370 | } else { |
| 371 | u32 i; |
| 372 | |
| 373 | /* the size of data remaining on the first page */ |
| 374 | page_size = FLASH_PAGESIZE - page_offset; |
| 375 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 376 | t[1].len = page_size; |
| 377 | spi_sync(flash->spi, &m); |
| 378 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 379 | *retlen = m.actual_length - CMD_SIZE; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 380 | |
| 381 | /* write everything in PAGESIZE chunks */ |
| 382 | for (i = page_size; i < len; i += page_size) { |
| 383 | page_size = len - i; |
| 384 | if (page_size > FLASH_PAGESIZE) |
| 385 | page_size = FLASH_PAGESIZE; |
| 386 | |
| 387 | /* write the next page to flash */ |
| 388 | flash->command[1] = (to + i) >> 16; |
| 389 | flash->command[2] = (to + i) >> 8; |
| 390 | flash->command[3] = (to + i); |
| 391 | |
| 392 | t[1].tx_buf = buf + i; |
| 393 | t[1].len = page_size; |
| 394 | |
| 395 | wait_till_ready(flash); |
| 396 | |
| 397 | write_enable(flash); |
| 398 | |
| 399 | spi_sync(flash->spi, &m); |
| 400 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 401 | if (retlen) |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 402 | *retlen += m.actual_length - CMD_SIZE; |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 403 | } |
| 404 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 405 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 406 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | |
| 411 | |
| 412 | /****************************************************************************/ |
| 413 | |
| 414 | /* |
| 415 | * SPI device driver setup and teardown |
| 416 | */ |
| 417 | |
| 418 | struct flash_info { |
| 419 | char *name; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 420 | |
| 421 | /* JEDEC id zero means "no ID" (most older chips); otherwise it has |
| 422 | * a high byte of zero plus three data bytes: the manufacturer id, |
| 423 | * then a two byte device id. |
| 424 | */ |
| 425 | u32 jedec_id; |
| 426 | |
| 427 | /* The size listed here is what works with OPCODE_SE, which isn't |
| 428 | * necessarily called a "sector" by the vendor. |
| 429 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 430 | unsigned sector_size; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 431 | u16 n_sectors; |
| 432 | |
| 433 | u16 flags; |
| 434 | #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 435 | }; |
| 436 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 437 | |
| 438 | /* NOTE: double check command sets and memory organization when you add |
| 439 | * more flash chips. This current list focusses on newer chips, which |
| 440 | * have been converging on command sets which including JEDEC ID. |
| 441 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 442 | static struct flash_info __devinitdata m25p_data [] = { |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 443 | |
| 444 | /* Atmel -- some are (confusingly) marketed as "DataFlash" */ |
| 445 | { "at25fs010", 0x1f6601, 32 * 1024, 4, SECT_4K, }, |
| 446 | { "at25fs040", 0x1f6604, 64 * 1024, 8, SECT_4K, }, |
| 447 | |
| 448 | { "at25df041a", 0x1f4401, 64 * 1024, 8, SECT_4K, }, |
Michael Hennerich | 3887ed5 | 2008-04-25 12:07:33 +0800 | [diff] [blame] | 449 | { "at25df641", 0x1f4800, 64 * 1024, 128, SECT_4K, }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 450 | |
| 451 | { "at26f004", 0x1f0400, 64 * 1024, 8, SECT_4K, }, |
| 452 | { "at26df081a", 0x1f4501, 64 * 1024, 16, SECT_4K, }, |
| 453 | { "at26df161a", 0x1f4601, 64 * 1024, 32, SECT_4K, }, |
| 454 | { "at26df321", 0x1f4701, 64 * 1024, 64, SECT_4K, }, |
| 455 | |
| 456 | /* Spansion -- single (large) sector size only, at least |
| 457 | * for the chips listed here (without boot sectors). |
| 458 | */ |
| 459 | { "s25sl004a", 0x010212, 64 * 1024, 8, }, |
| 460 | { "s25sl008a", 0x010213, 64 * 1024, 16, }, |
| 461 | { "s25sl016a", 0x010214, 64 * 1024, 32, }, |
| 462 | { "s25sl032a", 0x010215, 64 * 1024, 64, }, |
| 463 | { "s25sl064a", 0x010216, 64 * 1024, 128, }, |
| 464 | |
| 465 | /* SST -- large erase sizes are "overlays", "sectors" are 4K */ |
| 466 | { "sst25vf040b", 0xbf258d, 64 * 1024, 8, SECT_4K, }, |
| 467 | { "sst25vf080b", 0xbf258e, 64 * 1024, 16, SECT_4K, }, |
| 468 | { "sst25vf016b", 0xbf2541, 64 * 1024, 32, SECT_4K, }, |
| 469 | { "sst25vf032b", 0xbf254a, 64 * 1024, 64, SECT_4K, }, |
| 470 | |
| 471 | /* ST Microelectronics -- newer production may have feature updates */ |
| 472 | { "m25p05", 0x202010, 32 * 1024, 2, }, |
| 473 | { "m25p10", 0x202011, 32 * 1024, 4, }, |
| 474 | { "m25p20", 0x202012, 64 * 1024, 4, }, |
| 475 | { "m25p40", 0x202013, 64 * 1024, 8, }, |
| 476 | { "m25p80", 0, 64 * 1024, 16, }, |
| 477 | { "m25p16", 0x202015, 64 * 1024, 32, }, |
| 478 | { "m25p32", 0x202016, 64 * 1024, 64, }, |
| 479 | { "m25p64", 0x202017, 64 * 1024, 128, }, |
| 480 | { "m25p128", 0x202018, 256 * 1024, 64, }, |
| 481 | |
| 482 | { "m45pe80", 0x204014, 64 * 1024, 16, }, |
| 483 | { "m45pe16", 0x204015, 64 * 1024, 32, }, |
| 484 | |
| 485 | { "m25pe80", 0x208014, 64 * 1024, 16, }, |
| 486 | { "m25pe16", 0x208015, 64 * 1024, 32, SECT_4K, }, |
| 487 | |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 488 | /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 489 | { "w25x10", 0xef3011, 64 * 1024, 2, SECT_4K, }, |
| 490 | { "w25x20", 0xef3012, 64 * 1024, 4, SECT_4K, }, |
| 491 | { "w25x40", 0xef3013, 64 * 1024, 8, SECT_4K, }, |
| 492 | { "w25x80", 0xef3014, 64 * 1024, 16, SECT_4K, }, |
| 493 | { "w25x16", 0xef3015, 64 * 1024, 32, SECT_4K, }, |
| 494 | { "w25x32", 0xef3016, 64 * 1024, 64, SECT_4K, }, |
| 495 | { "w25x64", 0xef3017, 64 * 1024, 128, SECT_4K, }, |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 496 | }; |
| 497 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 498 | static struct flash_info *__devinit jedec_probe(struct spi_device *spi) |
| 499 | { |
| 500 | int tmp; |
| 501 | u8 code = OPCODE_RDID; |
| 502 | u8 id[3]; |
| 503 | u32 jedec; |
| 504 | struct flash_info *info; |
| 505 | |
| 506 | /* JEDEC also defines an optional "extended device information" |
| 507 | * string for after vendor-specific data, after the three bytes |
| 508 | * we use here. Supporting some chips might require using it. |
| 509 | */ |
| 510 | tmp = spi_write_then_read(spi, &code, 1, id, 3); |
| 511 | if (tmp < 0) { |
| 512 | DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", |
| 513 | spi->dev.bus_id, tmp); |
| 514 | return NULL; |
| 515 | } |
| 516 | jedec = id[0]; |
| 517 | jedec = jedec << 8; |
| 518 | jedec |= id[1]; |
| 519 | jedec = jedec << 8; |
| 520 | jedec |= id[2]; |
| 521 | |
| 522 | for (tmp = 0, info = m25p_data; |
| 523 | tmp < ARRAY_SIZE(m25p_data); |
| 524 | tmp++, info++) { |
| 525 | if (info->jedec_id == jedec) |
| 526 | return info; |
| 527 | } |
| 528 | dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec); |
| 529 | return NULL; |
| 530 | } |
| 531 | |
| 532 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 533 | /* |
| 534 | * board specific setup should have ensured the SPI clock used here |
| 535 | * matches what the READ command supports, at least until this driver |
| 536 | * understands FAST_READ (for clocks over 25 MHz). |
| 537 | */ |
| 538 | static int __devinit m25p_probe(struct spi_device *spi) |
| 539 | { |
| 540 | struct flash_platform_data *data; |
| 541 | struct m25p *flash; |
| 542 | struct flash_info *info; |
| 543 | unsigned i; |
| 544 | |
| 545 | /* Platform data helps sort out which chip type we have, as |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 546 | * well as how this board partitions it. If we don't have |
| 547 | * a chip ID, try the JEDEC id commands; they'll work for most |
| 548 | * newer chips, even if we don't recognize the particular chip. |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 549 | */ |
| 550 | data = spi->dev.platform_data; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 551 | if (data && data->type) { |
| 552 | for (i = 0, info = m25p_data; |
| 553 | i < ARRAY_SIZE(m25p_data); |
| 554 | i++, info++) { |
| 555 | if (strcmp(data->type, info->name) == 0) |
| 556 | break; |
| 557 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 558 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 559 | /* unrecognized chip? */ |
| 560 | if (i == ARRAY_SIZE(m25p_data)) { |
| 561 | DEBUG(MTD_DEBUG_LEVEL0, "%s: unrecognized id %s\n", |
| 562 | spi->dev.bus_id, data->type); |
| 563 | info = NULL; |
| 564 | |
| 565 | /* recognized; is that chip really what's there? */ |
| 566 | } else if (info->jedec_id) { |
| 567 | struct flash_info *chip = jedec_probe(spi); |
| 568 | |
| 569 | if (!chip || chip != info) { |
| 570 | dev_warn(&spi->dev, "found %s, expected %s\n", |
| 571 | chip ? chip->name : "UNKNOWN", |
| 572 | info->name); |
| 573 | info = NULL; |
| 574 | } |
| 575 | } |
| 576 | } else |
| 577 | info = jedec_probe(spi); |
| 578 | |
| 579 | if (!info) |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 580 | return -ENODEV; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 581 | |
Christoph Lameter | e94b176 | 2006-12-06 20:33:17 -0800 | [diff] [blame] | 582 | flash = kzalloc(sizeof *flash, GFP_KERNEL); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 583 | if (!flash) |
| 584 | return -ENOMEM; |
| 585 | |
| 586 | flash->spi = spi; |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 587 | mutex_init(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 588 | dev_set_drvdata(&spi->dev, flash); |
| 589 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 590 | if (data && data->name) |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 591 | flash->mtd.name = data->name; |
| 592 | else |
| 593 | flash->mtd.name = spi->dev.bus_id; |
| 594 | |
| 595 | flash->mtd.type = MTD_NORFLASH; |
Artem B. Bityutskiy | 783ed81 | 2006-06-14 19:53:44 +0400 | [diff] [blame] | 596 | flash->mtd.writesize = 1; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 597 | flash->mtd.flags = MTD_CAP_NORFLASH; |
| 598 | flash->mtd.size = info->sector_size * info->n_sectors; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 599 | flash->mtd.erase = m25p80_erase; |
| 600 | flash->mtd.read = m25p80_read; |
| 601 | flash->mtd.write = m25p80_write; |
| 602 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 603 | /* prefer "small sector" erase if possible */ |
| 604 | if (info->flags & SECT_4K) { |
| 605 | flash->erase_opcode = OPCODE_BE_4K; |
| 606 | flash->mtd.erasesize = 4096; |
| 607 | } else { |
| 608 | flash->erase_opcode = OPCODE_SE; |
| 609 | flash->mtd.erasesize = info->sector_size; |
| 610 | } |
| 611 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 612 | dev_info(&spi->dev, "%s (%d Kbytes)\n", info->name, |
| 613 | flash->mtd.size / 1024); |
| 614 | |
| 615 | DEBUG(MTD_DEBUG_LEVEL2, |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 616 | "mtd .name = %s, .size = 0x%.8x (%uMiB) " |
| 617 | ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n", |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 618 | flash->mtd.name, |
| 619 | flash->mtd.size, flash->mtd.size / (1024*1024), |
| 620 | flash->mtd.erasesize, flash->mtd.erasesize / 1024, |
| 621 | flash->mtd.numeraseregions); |
| 622 | |
| 623 | if (flash->mtd.numeraseregions) |
| 624 | for (i = 0; i < flash->mtd.numeraseregions; i++) |
| 625 | DEBUG(MTD_DEBUG_LEVEL2, |
| 626 | "mtd.eraseregions[%d] = { .offset = 0x%.8x, " |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 627 | ".erasesize = 0x%.8x (%uKiB), " |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 628 | ".numblocks = %d }\n", |
| 629 | i, flash->mtd.eraseregions[i].offset, |
| 630 | flash->mtd.eraseregions[i].erasesize, |
| 631 | flash->mtd.eraseregions[i].erasesize / 1024, |
| 632 | flash->mtd.eraseregions[i].numblocks); |
| 633 | |
| 634 | |
| 635 | /* partitions should match sector boundaries; and it may be good to |
| 636 | * use readonly partitions for writeprotected sectors (BP2..BP0). |
| 637 | */ |
| 638 | if (mtd_has_partitions()) { |
| 639 | struct mtd_partition *parts = NULL; |
| 640 | int nr_parts = 0; |
| 641 | |
| 642 | #ifdef CONFIG_MTD_CMDLINE_PARTS |
| 643 | static const char *part_probes[] = { "cmdlinepart", NULL, }; |
| 644 | |
| 645 | nr_parts = parse_mtd_partitions(&flash->mtd, |
| 646 | part_probes, &parts, 0); |
| 647 | #endif |
| 648 | |
| 649 | if (nr_parts <= 0 && data && data->parts) { |
| 650 | parts = data->parts; |
| 651 | nr_parts = data->nr_parts; |
| 652 | } |
| 653 | |
| 654 | if (nr_parts > 0) { |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 655 | for (i = 0; i < nr_parts; i++) { |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 656 | DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = " |
| 657 | "{.name = %s, .offset = 0x%.8x, " |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 658 | ".size = 0x%.8x (%uKiB) }\n", |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 659 | i, parts[i].name, |
| 660 | parts[i].offset, |
| 661 | parts[i].size, |
| 662 | parts[i].size / 1024); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 663 | } |
| 664 | flash->partitioned = 1; |
| 665 | return add_mtd_partitions(&flash->mtd, parts, nr_parts); |
| 666 | } |
| 667 | } else if (data->nr_parts) |
| 668 | dev_warn(&spi->dev, "ignoring %d default partitions on %s\n", |
| 669 | data->nr_parts, data->name); |
| 670 | |
| 671 | return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0; |
| 672 | } |
| 673 | |
| 674 | |
| 675 | static int __devexit m25p_remove(struct spi_device *spi) |
| 676 | { |
| 677 | struct m25p *flash = dev_get_drvdata(&spi->dev); |
| 678 | int status; |
| 679 | |
| 680 | /* Clean up MTD stuff. */ |
| 681 | if (mtd_has_partitions() && flash->partitioned) |
| 682 | status = del_mtd_partitions(&flash->mtd); |
| 683 | else |
| 684 | status = del_mtd_device(&flash->mtd); |
| 685 | if (status == 0) |
| 686 | kfree(flash); |
| 687 | return 0; |
| 688 | } |
| 689 | |
| 690 | |
| 691 | static struct spi_driver m25p80_driver = { |
| 692 | .driver = { |
| 693 | .name = "m25p80", |
| 694 | .bus = &spi_bus_type, |
| 695 | .owner = THIS_MODULE, |
| 696 | }, |
| 697 | .probe = m25p_probe, |
| 698 | .remove = __devexit_p(m25p_remove), |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 699 | |
| 700 | /* REVISIT: many of these chips have deep power-down modes, which |
| 701 | * should clearly be entered on suspend() to minimize power use. |
| 702 | * And also when they're otherwise idle... |
| 703 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 704 | }; |
| 705 | |
| 706 | |
| 707 | static int m25p80_init(void) |
| 708 | { |
| 709 | return spi_register_driver(&m25p80_driver); |
| 710 | } |
| 711 | |
| 712 | |
| 713 | static void m25p80_exit(void) |
| 714 | { |
| 715 | spi_unregister_driver(&m25p80_driver); |
| 716 | } |
| 717 | |
| 718 | |
| 719 | module_init(m25p80_init); |
| 720 | module_exit(m25p80_exit); |
| 721 | |
| 722 | MODULE_LICENSE("GPL"); |
| 723 | MODULE_AUTHOR("Mike Lavender"); |
| 724 | MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips"); |