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gerrit-public.fairphone.software / kernel / msm-4.9 / 79a6fb1acec93ef829a59d88429aafddf42793d3 / . / sound / soc / codecs / isabelle.c
blob: 53b455b8c07a76dfabd63e46d2ca934a418061bb [file] [log] [blame]
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1/*
2 * isabelle.c - Low power high fidelity audio codec driver
3 *
4 * Copyright (c) 2012 Texas Instruments, Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 *
11 * Initially based on sound/soc/codecs/twl6040.c
12 *
13 */
14#include <linux/module.h>
15#include <linux/moduleparam.h>
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/regmap.h>
21#include <linux/i2c.h>
22#include <linux/slab.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/tlv.h>
29#include <sound/jack.h>
30#include <sound/initval.h>
31#include <asm/div64.h>
32#include "isabelle.h"
33
34
35/* Register default values for ISABELLE driver. */
36static struct reg_default isabelle_reg_defs[] = {
37 { 0, 0x00 },
38 { 1, 0x00 },
39 { 2, 0x00 },
40 { 3, 0x00 },
41 { 4, 0x00 },
42 { 5, 0x00 },
43 { 6, 0x00 },
44 { 7, 0x00 },
45 { 8, 0x00 },
46 { 9, 0x00 },
47 { 10, 0x00 },
48 { 11, 0x00 },
49 { 12, 0x00 },
50 { 13, 0x00 },
51 { 14, 0x00 },
52 { 15, 0x00 },
53 { 16, 0x00 },
54 { 17, 0x00 },
55 { 18, 0x00 },
56 { 19, 0x00 },
57 { 20, 0x00 },
58 { 21, 0x02 },
59 { 22, 0x02 },
60 { 23, 0x02 },
61 { 24, 0x02 },
62 { 25, 0x0F },
63 { 26, 0x8F },
64 { 27, 0x0F },
65 { 28, 0x8F },
66 { 29, 0x00 },
67 { 30, 0x00 },
68 { 31, 0x00 },
69 { 32, 0x00 },
70 { 33, 0x00 },
71 { 34, 0x00 },
72 { 35, 0x00 },
73 { 36, 0x00 },
74 { 37, 0x00 },
75 { 38, 0x00 },
76 { 39, 0x00 },
77 { 40, 0x00 },
78 { 41, 0x00 },
79 { 42, 0x00 },
80 { 43, 0x00 },
81 { 44, 0x00 },
82 { 45, 0x00 },
83 { 46, 0x00 },
84 { 47, 0x00 },
85 { 48, 0x00 },
86 { 49, 0x00 },
87 { 50, 0x00 },
88 { 51, 0x00 },
89 { 52, 0x00 },
90 { 53, 0x00 },
91 { 54, 0x00 },
92 { 55, 0x00 },
93 { 56, 0x00 },
94 { 57, 0x00 },
95 { 58, 0x00 },
96 { 59, 0x00 },
97 { 60, 0x00 },
98 { 61, 0x00 },
99 { 62, 0x00 },
100 { 63, 0x00 },
101 { 64, 0x00 },
102 { 65, 0x00 },
103 { 66, 0x00 },
104 { 67, 0x00 },
105 { 68, 0x00 },
106 { 69, 0x90 },
107 { 70, 0x90 },
108 { 71, 0x90 },
109 { 72, 0x00 },
110 { 73, 0x00 },
111 { 74, 0x00 },
112 { 75, 0x00 },
113 { 76, 0x00 },
114 { 77, 0x00 },
115 { 78, 0x00 },
116 { 79, 0x00 },
117 { 80, 0x00 },
118 { 81, 0x00 },
119 { 82, 0x00 },
120 { 83, 0x00 },
121 { 84, 0x00 },
122 { 85, 0x07 },
123 { 86, 0x00 },
124 { 87, 0x00 },
125 { 88, 0x00 },
126 { 89, 0x07 },
127 { 90, 0x80 },
128 { 91, 0x07 },
129 { 92, 0x07 },
130 { 93, 0x00 },
131 { 94, 0x00 },
132 { 95, 0x00 },
133 { 96, 0x00 },
134 { 97, 0x00 },
135 { 98, 0x00 },
136 { 99, 0x00 },
137};
138
139static const char *isabelle_rx1_texts[] = {"VRX1", "ARX1"};
140static const char *isabelle_rx2_texts[] = {"VRX2", "ARX2"};
141
142static const struct soc_enum isabelle_rx1_enum[] = {
143 SOC_ENUM_SINGLE(ISABELLE_VOICE_HPF_CFG_REG, 3, 1, isabelle_rx1_texts),
144 SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 5, 1, isabelle_rx1_texts),
145};
146
147static const struct soc_enum isabelle_rx2_enum[] = {
148 SOC_ENUM_SINGLE(ISABELLE_VOICE_HPF_CFG_REG, 2, 1, isabelle_rx2_texts),
149 SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 4, 1, isabelle_rx2_texts),
150};
151
152/* Headset DAC playback switches */
153static const struct snd_kcontrol_new rx1_mux_controls =
154 SOC_DAPM_ENUM("Route", isabelle_rx1_enum);
155
156static const struct snd_kcontrol_new rx2_mux_controls =
157 SOC_DAPM_ENUM("Route", isabelle_rx2_enum);
158
159/* TX input selection */
160static const char *isabelle_atx_texts[] = {"AMIC1", "DMIC"};
161static const char *isabelle_vtx_texts[] = {"AMIC2", "DMIC"};
162
163static const struct soc_enum isabelle_atx_enum[] = {
164 SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 7, 1, isabelle_atx_texts),
165 SOC_ENUM_SINGLE(ISABELLE_DMIC_CFG_REG, 0, 1, isabelle_atx_texts),
166};
167
168static const struct soc_enum isabelle_vtx_enum[] = {
169 SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 6, 1, isabelle_vtx_texts),
170 SOC_ENUM_SINGLE(ISABELLE_DMIC_CFG_REG, 0, 1, isabelle_vtx_texts),
171};
172
173static const struct snd_kcontrol_new atx_mux_controls =
174 SOC_DAPM_ENUM("Route", isabelle_atx_enum);
175
176static const struct snd_kcontrol_new vtx_mux_controls =
177 SOC_DAPM_ENUM("Route", isabelle_vtx_enum);
178
179/* Left analog microphone selection */
180static const char *isabelle_amic1_texts[] = {
181 "Main Mic", "Headset Mic", "Aux/FM Left"};
182
183/* Left analog microphone selection */
184static const char *isabelle_amic2_texts[] = {"Sub Mic", "Aux/FM Right"};
185
186static const struct soc_enum isabelle_amic1_enum[] = {
187 SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 5,
188 ARRAY_SIZE(isabelle_amic1_texts),
189 isabelle_amic1_texts),
190};
191
192static const struct soc_enum isabelle_amic2_enum[] = {
193 SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 4,
194 ARRAY_SIZE(isabelle_amic2_texts),
195 isabelle_amic2_texts),
196};
197
198static const struct snd_kcontrol_new amic1_control =
199 SOC_DAPM_ENUM("Route", isabelle_amic1_enum);
200
201static const struct snd_kcontrol_new amic2_control =
202 SOC_DAPM_ENUM("Route", isabelle_amic2_enum);
203
204static const char *isabelle_st_audio_texts[] = {"ATX1", "ATX2"};
205
206static const char *isabelle_st_voice_texts[] = {"VTX1", "VTX2"};
207
208static const struct soc_enum isabelle_st_audio_enum[] = {
209 SOC_ENUM_SINGLE(ISABELLE_ATX_STPGA1_CFG_REG, 7, 1,
210 isabelle_st_audio_texts),
211 SOC_ENUM_SINGLE(ISABELLE_ATX_STPGA2_CFG_REG, 7, 1,
212 isabelle_st_audio_texts),
213};
214
215static const struct soc_enum isabelle_st_voice_enum[] = {
216 SOC_ENUM_SINGLE(ISABELLE_VTX_STPGA1_CFG_REG, 7, 1,
217 isabelle_st_voice_texts),
218 SOC_ENUM_SINGLE(ISABELLE_VTX2_STPGA2_CFG_REG, 7, 1,
219 isabelle_st_voice_texts),
220};
221
222static const struct snd_kcontrol_new st_audio_control =
223 SOC_DAPM_ENUM("Route", isabelle_st_audio_enum);
224
225static const struct snd_kcontrol_new st_voice_control =
226 SOC_DAPM_ENUM("Route", isabelle_st_voice_enum);
227
228/* Mixer controls */
229static const struct snd_kcontrol_new isabelle_hs_left_mixer_controls[] = {
230SOC_DAPM_SINGLE("DAC1L Playback Switch", ISABELLE_HSDRV_CFG1_REG, 7, 1, 0),
231SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 6, 1, 0),
232};
233
234static const struct snd_kcontrol_new isabelle_hs_right_mixer_controls[] = {
235SOC_DAPM_SINGLE("DAC1R Playback Switch", ISABELLE_HSDRV_CFG1_REG, 5, 1, 0),
236SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 4, 1, 0),
237};
238
239static const struct snd_kcontrol_new isabelle_hf_left_mixer_controls[] = {
240SOC_DAPM_SINGLE("DAC2L Playback Switch", ISABELLE_HFLPGA_CFG_REG, 7, 1, 0),
241SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HFLPGA_CFG_REG, 6, 1, 0),
242};
243
244static const struct snd_kcontrol_new isabelle_hf_right_mixer_controls[] = {
245SOC_DAPM_SINGLE("DAC2R Playback Switch", ISABELLE_HFRPGA_CFG_REG, 7, 1, 0),
246SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HFRPGA_CFG_REG, 6, 1, 0),
247};
248
249static const struct snd_kcontrol_new isabelle_ep_mixer_controls[] = {
250SOC_DAPM_SINGLE("DAC2L Playback Switch", ISABELLE_EARDRV_CFG1_REG, 7, 1, 0),
251SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_EARDRV_CFG1_REG, 6, 1, 0),
252};
253
254static const struct snd_kcontrol_new isabelle_aux_left_mixer_controls[] = {
255SOC_DAPM_SINGLE("DAC3L Playback Switch", ISABELLE_LINEAMP_CFG_REG, 7, 1, 0),
256SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_LINEAMP_CFG_REG, 6, 1, 0),
257};
258
259static const struct snd_kcontrol_new isabelle_aux_right_mixer_controls[] = {
260SOC_DAPM_SINGLE("DAC3R Playback Switch", ISABELLE_LINEAMP_CFG_REG, 5, 1, 0),
261SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_LINEAMP_CFG_REG, 4, 1, 0),
262};
263
264static const struct snd_kcontrol_new isabelle_dpga1_left_mixer_controls[] = {
265SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 7, 1, 0),
266SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 6, 1, 0),
267SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 5, 1, 0),
268};
269
270static const struct snd_kcontrol_new isabelle_dpga1_right_mixer_controls[] = {
271SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 3, 1, 0),
272SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 2, 1, 0),
273SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 1, 1, 0),
274};
275
276static const struct snd_kcontrol_new isabelle_dpga2_left_mixer_controls[] = {
277SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 7, 1, 0),
278SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 6, 1, 0),
279SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 5, 1, 0),
280SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 4, 1, 0),
281SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 3, 1, 0),
282SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 2, 1, 0),
283};
284
285static const struct snd_kcontrol_new isabelle_dpga2_right_mixer_controls[] = {
286SOC_DAPM_SINGLE("USNC Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 7, 1, 0),
287SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 3, 1, 0),
288SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 2, 1, 0),
289SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 1, 1, 0),
290};
291
292static const struct snd_kcontrol_new isabelle_dpga3_left_mixer_controls[] = {
293SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 7, 1, 0),
294SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 6, 1, 0),
295SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 5, 1, 0),
296};
297
298static const struct snd_kcontrol_new isabelle_dpga3_right_mixer_controls[] = {
299SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 3, 1, 0),
300SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 2, 1, 0),
301SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 1, 1, 0),
302};
303
304static const struct snd_kcontrol_new isabelle_rx1_mixer_controls[] = {
305SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 7, 1, 0),
306SOC_DAPM_SINGLE("DL1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 6, 1, 0),
307};
308
309static const struct snd_kcontrol_new isabelle_rx2_mixer_controls[] = {
310SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 5, 1, 0),
311SOC_DAPM_SINGLE("DL2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 4, 1, 0),
312};
313
314static const struct snd_kcontrol_new isabelle_rx3_mixer_controls[] = {
315SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 3, 1, 0),
316SOC_DAPM_SINGLE("DL3 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 2, 1, 0),
317};
318
319static const struct snd_kcontrol_new isabelle_rx4_mixer_controls[] = {
320SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 1, 1, 0),
321SOC_DAPM_SINGLE("DL4 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 0, 1, 0),
322};
323
324static const struct snd_kcontrol_new isabelle_rx5_mixer_controls[] = {
325SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 7, 1, 0),
326SOC_DAPM_SINGLE("DL5 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 6, 1, 0),
327};
328
329static const struct snd_kcontrol_new isabelle_rx6_mixer_controls[] = {
330SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 5, 1, 0),
331SOC_DAPM_SINGLE("DL6 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 4, 1, 0),
332};
333
334static const struct snd_kcontrol_new ep_path_enable_control =
335 SOC_DAPM_SINGLE("Switch", ISABELLE_EARDRV_CFG2_REG, 0, 1, 0);
336
337/* TLV Declarations */
338static const DECLARE_TLV_DB_SCALE(mic_amp_tlv, 0, 100, 0);
339static const DECLARE_TLV_DB_SCALE(afm_amp_tlv, -3300, 300, 0);
340static const DECLARE_TLV_DB_SCALE(dac_tlv, -1200, 200, 0);
341static const DECLARE_TLV_DB_SCALE(hf_tlv, -5000, 200, 0);
342
343/* from -63 to 0 dB in 1 dB steps */
344static const DECLARE_TLV_DB_SCALE(dpga_tlv, -6300, 100, 1);
345
346/* from -63 to 9 dB in 1 dB steps */
347static const DECLARE_TLV_DB_SCALE(rx_tlv, -6300, 100, 1);
348
349static const DECLARE_TLV_DB_SCALE(st_tlv, -2700, 300, 1);
350static const DECLARE_TLV_DB_SCALE(tx_tlv, -600, 100, 0);
351
352static const struct snd_kcontrol_new isabelle_snd_controls[] = {
353 SOC_DOUBLE_TLV("Headset Playback Volume", ISABELLE_HSDRV_GAIN_REG,
354 4, 0, 0xF, 0, dac_tlv),
355 SOC_DOUBLE_R_TLV("Handsfree Playback Volume",
356 ISABELLE_HFLPGA_CFG_REG, ISABELLE_HFRPGA_CFG_REG,
357 0, 0x1F, 0, hf_tlv),
358 SOC_DOUBLE_TLV("Aux Playback Volume", ISABELLE_LINEAMP_GAIN_REG,
359 4, 0, 0xF, 0, dac_tlv),
360 SOC_SINGLE_TLV("Earpiece Playback Volume", ISABELLE_EARDRV_CFG1_REG,
361 0, 0xF, 0, dac_tlv),
362
363 SOC_DOUBLE_TLV("Aux FM Volume", ISABELLE_APGA_GAIN_REG, 4, 0, 0xF, 0,
364 afm_amp_tlv),
365 SOC_SINGLE_TLV("Mic1 Capture Volume", ISABELLE_MIC1_GAIN_REG, 3, 0x1F,
366 0, mic_amp_tlv),
367 SOC_SINGLE_TLV("Mic2 Capture Volume", ISABELLE_MIC2_GAIN_REG, 3, 0x1F,
368 0, mic_amp_tlv),
369
370 SOC_DOUBLE_R_TLV("DPGA1 Volume", ISABELLE_DPGA1L_GAIN_REG,
371 ISABELLE_DPGA1R_GAIN_REG, 0, 0x3F, 0, dpga_tlv),
372 SOC_DOUBLE_R_TLV("DPGA2 Volume", ISABELLE_DPGA2L_GAIN_REG,
373 ISABELLE_DPGA2R_GAIN_REG, 0, 0x3F, 0, dpga_tlv),
374 SOC_DOUBLE_R_TLV("DPGA3 Volume", ISABELLE_DPGA3L_GAIN_REG,
375 ISABELLE_DPGA3R_GAIN_REG, 0, 0x3F, 0, dpga_tlv),
376
377 SOC_SINGLE_TLV("Sidetone Audio TX1 Volume",
378 ISABELLE_ATX_STPGA1_CFG_REG, 0, 0xF, 0, st_tlv),
379 SOC_SINGLE_TLV("Sidetone Audio TX2 Volume",
380 ISABELLE_ATX_STPGA2_CFG_REG, 0, 0xF, 0, st_tlv),
381 SOC_SINGLE_TLV("Sidetone Voice TX1 Volume",
382 ISABELLE_VTX_STPGA1_CFG_REG, 0, 0xF, 0, st_tlv),
383 SOC_SINGLE_TLV("Sidetone Voice TX2 Volume",
384 ISABELLE_VTX2_STPGA2_CFG_REG, 0, 0xF, 0, st_tlv),
385
386 SOC_SINGLE_TLV("Audio TX1 Volume", ISABELLE_ATX1_DPGA_REG, 4, 0xF, 0,
387 tx_tlv),
388 SOC_SINGLE_TLV("Audio TX2 Volume", ISABELLE_ATX2_DPGA_REG, 4, 0xF, 0,
389 tx_tlv),
390 SOC_SINGLE_TLV("Voice TX1 Volume", ISABELLE_VTX1_DPGA_REG, 4, 0xF, 0,
391 tx_tlv),
392 SOC_SINGLE_TLV("Voice TX2 Volume", ISABELLE_VTX2_DPGA_REG, 4, 0xF, 0,
393 tx_tlv),
394
395 SOC_SINGLE_TLV("RX1 DPGA Volume", ISABELLE_RX1_DPGA_REG, 0, 0x3F, 0,
396 rx_tlv),
397 SOC_SINGLE_TLV("RX2 DPGA Volume", ISABELLE_RX2_DPGA_REG, 0, 0x3F, 0,
398 rx_tlv),
399 SOC_SINGLE_TLV("RX3 DPGA Volume", ISABELLE_RX3_DPGA_REG, 0, 0x3F, 0,
400 rx_tlv),
401 SOC_SINGLE_TLV("RX4 DPGA Volume", ISABELLE_RX4_DPGA_REG, 0, 0x3F, 0,
402 rx_tlv),
403 SOC_SINGLE_TLV("RX5 DPGA Volume", ISABELLE_RX5_DPGA_REG, 0, 0x3F, 0,
404 rx_tlv),
405 SOC_SINGLE_TLV("RX6 DPGA Volume", ISABELLE_RX6_DPGA_REG, 0, 0x3F, 0,
406 rx_tlv),
407
408 SOC_SINGLE("Headset Noise Gate", ISABELLE_HS_NG_CFG1_REG, 7, 1, 0),
409 SOC_SINGLE("Handsfree Noise Gate", ISABELLE_HF_NG_CFG1_REG, 7, 1, 0),
410
411 SOC_SINGLE("ATX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
412 7, 1, 0),
413 SOC_SINGLE("ATX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
414 6, 1, 0),
415 SOC_SINGLE("ARX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
416 5, 1, 0),
417 SOC_SINGLE("ARX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
418 4, 1, 0),
419 SOC_SINGLE("ARX3 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
420 3, 1, 0),
421 SOC_SINGLE("ARX4 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
422 2, 1, 0),
423 SOC_SINGLE("ARX5 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
424 1, 1, 0),
425 SOC_SINGLE("ARX6 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
426 0, 1, 0),
427 SOC_SINGLE("VRX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
428 3, 1, 0),
429 SOC_SINGLE("VRX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
430 2, 1, 0),
431
432 SOC_SINGLE("ATX1 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
433 7, 1, 0),
434 SOC_SINGLE("ATX2 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
435 6, 1, 0),
436 SOC_SINGLE("VTX1 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
437 5, 1, 0),
438 SOC_SINGLE("VTX2 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
439 4, 1, 0),
440 SOC_SINGLE("RX1 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
441 5, 1, 0),
442 SOC_SINGLE("RX2 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
443 4, 1, 0),
444 SOC_SINGLE("RX3 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
445 3, 1, 0),
446 SOC_SINGLE("RX4 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
447 2, 1, 0),
448 SOC_SINGLE("RX5 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
449 1, 1, 0),
450 SOC_SINGLE("RX6 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
451 0, 1, 0),
452
453 SOC_SINGLE("ULATX12 Capture Switch", ISABELLE_ULATX12_INTF_CFG_REG,
454 7, 1, 0),
455
456 SOC_SINGLE("DL12 Playback Switch", ISABELLE_DL12_INTF_CFG_REG,
457 7, 1, 0),
458 SOC_SINGLE("DL34 Playback Switch", ISABELLE_DL34_INTF_CFG_REG,
459 7, 1, 0),
460 SOC_SINGLE("DL56 Playback Switch", ISABELLE_DL56_INTF_CFG_REG,
461 7, 1, 0),
462
463 /* DMIC Switch */
464 SOC_SINGLE("DMIC Switch", ISABELLE_DMIC_CFG_REG, 0, 1, 0),
465};
466
467static const struct snd_soc_dapm_widget isabelle_dapm_widgets[] = {
468 /* Inputs */
469 SND_SOC_DAPM_INPUT("MAINMIC"),
470 SND_SOC_DAPM_INPUT("HSMIC"),
471 SND_SOC_DAPM_INPUT("SUBMIC"),
472 SND_SOC_DAPM_INPUT("LINEIN1"),
473 SND_SOC_DAPM_INPUT("LINEIN2"),
474 SND_SOC_DAPM_INPUT("DMICDAT"),
475
476 /* Outputs */
477 SND_SOC_DAPM_OUTPUT("HSOL"),
478 SND_SOC_DAPM_OUTPUT("HSOR"),
479 SND_SOC_DAPM_OUTPUT("HFL"),
480 SND_SOC_DAPM_OUTPUT("HFR"),
481 SND_SOC_DAPM_OUTPUT("EP"),
482 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
483 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
484
485 SND_SOC_DAPM_PGA("DL1", SND_SOC_NOPM, 0, 0, NULL, 0),
486 SND_SOC_DAPM_PGA("DL2", SND_SOC_NOPM, 0, 0, NULL, 0),
487 SND_SOC_DAPM_PGA("DL3", SND_SOC_NOPM, 0, 0, NULL, 0),
488 SND_SOC_DAPM_PGA("DL4", SND_SOC_NOPM, 0, 0, NULL, 0),
489 SND_SOC_DAPM_PGA("DL5", SND_SOC_NOPM, 0, 0, NULL, 0),
490 SND_SOC_DAPM_PGA("DL6", SND_SOC_NOPM, 0, 0, NULL, 0),
491
492 /* Analog input muxes for the capture amplifiers */
493 SND_SOC_DAPM_MUX("Analog Left Capture Route",
494 SND_SOC_NOPM, 0, 0, &amic1_control),
495 SND_SOC_DAPM_MUX("Analog Right Capture Route",
496 SND_SOC_NOPM, 0, 0, &amic2_control),
497
498 SND_SOC_DAPM_MUX("Sidetone Audio Playback", SND_SOC_NOPM, 0, 0,
499 &st_audio_control),
500 SND_SOC_DAPM_MUX("Sidetone Voice Playback", SND_SOC_NOPM, 0, 0,
501 &st_voice_control),
502
503 /* AIF */
504 SND_SOC_DAPM_AIF_IN("INTF1_SDI", NULL, 0, ISABELLE_INTF_EN_REG, 7, 0),
505 SND_SOC_DAPM_AIF_IN("INTF2_SDI", NULL, 0, ISABELLE_INTF_EN_REG, 6, 0),
506
507 SND_SOC_DAPM_AIF_OUT("INTF1_SDO", NULL, 0, ISABELLE_INTF_EN_REG, 5, 0),
508 SND_SOC_DAPM_AIF_OUT("INTF2_SDO", NULL, 0, ISABELLE_INTF_EN_REG, 4, 0),
509
510 SND_SOC_DAPM_OUT_DRV("ULATX1", SND_SOC_NOPM, 0, 0, NULL, 0),
511 SND_SOC_DAPM_OUT_DRV("ULATX2", SND_SOC_NOPM, 0, 0, NULL, 0),
512 SND_SOC_DAPM_OUT_DRV("ULVTX1", SND_SOC_NOPM, 0, 0, NULL, 0),
513 SND_SOC_DAPM_OUT_DRV("ULVTX2", SND_SOC_NOPM, 0, 0, NULL, 0),
514
515 /* Analog Capture PGAs */
516 SND_SOC_DAPM_PGA("MicAmp1", ISABELLE_AMIC_CFG_REG, 5, 0, NULL, 0),
517 SND_SOC_DAPM_PGA("MicAmp2", ISABELLE_AMIC_CFG_REG, 4, 0, NULL, 0),
518
519 /* Auxiliary FM PGAs */
520 SND_SOC_DAPM_PGA("APGA1", ISABELLE_APGA_CFG_REG, 7, 0, NULL, 0),
521 SND_SOC_DAPM_PGA("APGA2", ISABELLE_APGA_CFG_REG, 6, 0, NULL, 0),
522
523 /* ADCs */
524 SND_SOC_DAPM_ADC("ADC1", "Left Front Capture",
525 ISABELLE_AMIC_CFG_REG, 7, 0),
526 SND_SOC_DAPM_ADC("ADC2", "Right Front Capture",
527 ISABELLE_AMIC_CFG_REG, 6, 0),
528
529 /* Microphone Bias */
530 SND_SOC_DAPM_SUPPLY("Headset Mic Bias", ISABELLE_ABIAS_CFG_REG,
531 3, 0, NULL, 0),
532 SND_SOC_DAPM_SUPPLY("Main Mic Bias", ISABELLE_ABIAS_CFG_REG,
533 2, 0, NULL, 0),
534 SND_SOC_DAPM_SUPPLY("Digital Mic1 Bias",
535 ISABELLE_DBIAS_CFG_REG, 3, 0, NULL, 0),
536 SND_SOC_DAPM_SUPPLY("Digital Mic2 Bias",
537 ISABELLE_DBIAS_CFG_REG, 2, 0, NULL, 0),
538
539 /* Mixers */
540 SND_SOC_DAPM_MIXER("Headset Left Mixer", SND_SOC_NOPM, 0, 0,
541 isabelle_hs_left_mixer_controls,
542 ARRAY_SIZE(isabelle_hs_left_mixer_controls)),
543 SND_SOC_DAPM_MIXER("Headset Right Mixer", SND_SOC_NOPM, 0, 0,
544 isabelle_hs_right_mixer_controls,
545 ARRAY_SIZE(isabelle_hs_right_mixer_controls)),
546 SND_SOC_DAPM_MIXER("Handsfree Left Mixer", SND_SOC_NOPM, 0, 0,
547 isabelle_hf_left_mixer_controls,
548 ARRAY_SIZE(isabelle_hf_left_mixer_controls)),
549 SND_SOC_DAPM_MIXER("Handsfree Right Mixer", SND_SOC_NOPM, 0, 0,
550 isabelle_hf_right_mixer_controls,
551 ARRAY_SIZE(isabelle_hf_right_mixer_controls)),
552 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
553 isabelle_aux_left_mixer_controls,
554 ARRAY_SIZE(isabelle_aux_left_mixer_controls)),
555 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
556 isabelle_aux_right_mixer_controls,
557 ARRAY_SIZE(isabelle_aux_right_mixer_controls)),
558 SND_SOC_DAPM_MIXER("Earphone Mixer", SND_SOC_NOPM, 0, 0,
559 isabelle_ep_mixer_controls,
560 ARRAY_SIZE(isabelle_ep_mixer_controls)),
561
562 SND_SOC_DAPM_MIXER("DPGA1L Mixer", SND_SOC_NOPM, 0, 0,
563 isabelle_dpga1_left_mixer_controls,
564 ARRAY_SIZE(isabelle_dpga1_left_mixer_controls)),
565 SND_SOC_DAPM_MIXER("DPGA1R Mixer", SND_SOC_NOPM, 0, 0,
566 isabelle_dpga1_right_mixer_controls,
567 ARRAY_SIZE(isabelle_dpga1_right_mixer_controls)),
568 SND_SOC_DAPM_MIXER("DPGA2L Mixer", SND_SOC_NOPM, 0, 0,
569 isabelle_dpga2_left_mixer_controls,
570 ARRAY_SIZE(isabelle_dpga2_left_mixer_controls)),
571 SND_SOC_DAPM_MIXER("DPGA2R Mixer", SND_SOC_NOPM, 0, 0,
572 isabelle_dpga2_right_mixer_controls,
573 ARRAY_SIZE(isabelle_dpga2_right_mixer_controls)),
574 SND_SOC_DAPM_MIXER("DPGA3L Mixer", SND_SOC_NOPM, 0, 0,
575 isabelle_dpga3_left_mixer_controls,
576 ARRAY_SIZE(isabelle_dpga3_left_mixer_controls)),
577 SND_SOC_DAPM_MIXER("DPGA3R Mixer", SND_SOC_NOPM, 0, 0,
578 isabelle_dpga3_right_mixer_controls,
579 ARRAY_SIZE(isabelle_dpga3_right_mixer_controls)),
580
581 SND_SOC_DAPM_MIXER("RX1 Mixer", SND_SOC_NOPM, 0, 0,
582 isabelle_rx1_mixer_controls,
583 ARRAY_SIZE(isabelle_rx1_mixer_controls)),
584 SND_SOC_DAPM_MIXER("RX2 Mixer", SND_SOC_NOPM, 0, 0,
585 isabelle_rx2_mixer_controls,
586 ARRAY_SIZE(isabelle_rx2_mixer_controls)),
587 SND_SOC_DAPM_MIXER("RX3 Mixer", SND_SOC_NOPM, 0, 0,
588 isabelle_rx3_mixer_controls,
589 ARRAY_SIZE(isabelle_rx3_mixer_controls)),
590 SND_SOC_DAPM_MIXER("RX4 Mixer", SND_SOC_NOPM, 0, 0,
591 isabelle_rx4_mixer_controls,
592 ARRAY_SIZE(isabelle_rx4_mixer_controls)),
593 SND_SOC_DAPM_MIXER("RX5 Mixer", SND_SOC_NOPM, 0, 0,
594 isabelle_rx5_mixer_controls,
595 ARRAY_SIZE(isabelle_rx5_mixer_controls)),
596 SND_SOC_DAPM_MIXER("RX6 Mixer", SND_SOC_NOPM, 0, 0,
597 isabelle_rx6_mixer_controls,
598 ARRAY_SIZE(isabelle_rx6_mixer_controls)),
599
600 /* DACs */
601 SND_SOC_DAPM_DAC("DAC1L", "Headset Playback", ISABELLE_DAC_CFG_REG,
602 5, 0),
603 SND_SOC_DAPM_DAC("DAC1R", "Headset Playback", ISABELLE_DAC_CFG_REG,
604 4, 0),
605 SND_SOC_DAPM_DAC("DAC2L", "Handsfree Playback", ISABELLE_DAC_CFG_REG,
606 3, 0),
607 SND_SOC_DAPM_DAC("DAC2R", "Handsfree Playback", ISABELLE_DAC_CFG_REG,
608 2, 0),
609 SND_SOC_DAPM_DAC("DAC3L", "Lineout Playback", ISABELLE_DAC_CFG_REG,
610 1, 0),
611 SND_SOC_DAPM_DAC("DAC3R", "Lineout Playback", ISABELLE_DAC_CFG_REG,
612 0, 0),
613
614 /* Analog Playback PGAs */
615 SND_SOC_DAPM_PGA("Sidetone Audio PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
616 SND_SOC_DAPM_PGA("Sidetone Voice PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
617 SND_SOC_DAPM_PGA("HF Left PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
618 SND_SOC_DAPM_PGA("HF Right PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
619 SND_SOC_DAPM_PGA("DPGA1L", SND_SOC_NOPM, 0, 0, NULL, 0),
620 SND_SOC_DAPM_PGA("DPGA1R", SND_SOC_NOPM, 0, 0, NULL, 0),
621 SND_SOC_DAPM_PGA("DPGA2L", SND_SOC_NOPM, 0, 0, NULL, 0),
622 SND_SOC_DAPM_PGA("DPGA2R", SND_SOC_NOPM, 0, 0, NULL, 0),
623 SND_SOC_DAPM_PGA("DPGA3L", SND_SOC_NOPM, 0, 0, NULL, 0),
624 SND_SOC_DAPM_PGA("DPGA3R", SND_SOC_NOPM, 0, 0, NULL, 0),
625
626 /* Analog Playback Mux */
627 SND_SOC_DAPM_MUX("RX1 Playback", ISABELLE_ALU_RX_EN_REG, 5, 0,
628 &rx1_mux_controls),
629 SND_SOC_DAPM_MUX("RX2 Playback", ISABELLE_ALU_RX_EN_REG, 4, 0,
630 &rx2_mux_controls),
631
632 /* TX Select */
633 SND_SOC_DAPM_MUX("ATX Select", ISABELLE_TX_INPUT_CFG_REG,
634 7, 0, &atx_mux_controls),
635 SND_SOC_DAPM_MUX("VTX Select", ISABELLE_TX_INPUT_CFG_REG,
636 6, 0, &vtx_mux_controls),
637
638 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
639 &ep_path_enable_control),
640
641 /* Output Drivers */
642 SND_SOC_DAPM_OUT_DRV("HS Left Driver", ISABELLE_HSDRV_CFG2_REG,
643 1, 0, NULL, 0),
644 SND_SOC_DAPM_OUT_DRV("HS Right Driver", ISABELLE_HSDRV_CFG2_REG,
645 0, 0, NULL, 0),
646 SND_SOC_DAPM_OUT_DRV("LINEOUT1 Left Driver", ISABELLE_LINEAMP_CFG_REG,
647 1, 0, NULL, 0),
648 SND_SOC_DAPM_OUT_DRV("LINEOUT2 Right Driver", ISABELLE_LINEAMP_CFG_REG,
649 0, 0, NULL, 0),
650 SND_SOC_DAPM_OUT_DRV("Earphone Driver", ISABELLE_EARDRV_CFG2_REG,
651 1, 0, NULL, 0),
652
653 SND_SOC_DAPM_OUT_DRV("HF Left Driver", ISABELLE_HFDRV_CFG_REG,
654 1, 0, NULL, 0),
655 SND_SOC_DAPM_OUT_DRV("HF Right Driver", ISABELLE_HFDRV_CFG_REG,
656 0, 0, NULL, 0),
657};
658
659static const struct snd_soc_dapm_route isabelle_intercon[] = {
660 /* Interface mapping */
661 { "DL1", "DL12 Playback Switch", "INTF1_SDI" },
662 { "DL2", "DL12 Playback Switch", "INTF1_SDI" },
663 { "DL3", "DL34 Playback Switch", "INTF1_SDI" },
664 { "DL4", "DL34 Playback Switch", "INTF1_SDI" },
665 { "DL5", "DL56 Playback Switch", "INTF1_SDI" },
666 { "DL6", "DL56 Playback Switch", "INTF1_SDI" },
667
668 { "DL1", "DL12 Playback Switch", "INTF2_SDI" },
669 { "DL2", "DL12 Playback Switch", "INTF2_SDI" },
670 { "DL3", "DL34 Playback Switch", "INTF2_SDI" },
671 { "DL4", "DL34 Playback Switch", "INTF2_SDI" },
672 { "DL5", "DL56 Playback Switch", "INTF2_SDI" },
673 { "DL6", "DL56 Playback Switch", "INTF2_SDI" },
674
675 /* Input side mapping */
676 { "Sidetone Audio PGA", NULL, "Sidetone Audio Playback" },
677 { "Sidetone Voice PGA", NULL, "Sidetone Voice Playback" },
678
679 { "RX1 Mixer", "ST1 Playback Switch", "Sidetone Audio PGA" },
680
681 { "RX1 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" },
682 { "RX1 Mixer", "DL1 Playback Switch", "DL1" },
683
684 { "RX2 Mixer", "ST2 Playback Switch", "Sidetone Audio PGA" },
685
686 { "RX2 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" },
687 { "RX2 Mixer", "DL2 Playback Switch", "DL2" },
688
689 { "RX3 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" },
690 { "RX3 Mixer", "DL3 Playback Switch", "DL3" },
691
692 { "RX4 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" },
693 { "RX4 Mixer", "DL4 Playback Switch", "DL4" },
694
695 { "RX5 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" },
696 { "RX5 Mixer", "DL5 Playback Switch", "DL5" },
697
698 { "RX6 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" },
699 { "RX6 Mixer", "DL6 Playback Switch", "DL6" },
700
701 /* Capture path */
702 { "Analog Left Capture Route", "Headset Mic", "HSMIC" },
703 { "Analog Left Capture Route", "Main Mic", "MAINMIC" },
704 { "Analog Left Capture Route", "Aux/FM Left", "LINEIN1" },
705
706 { "Analog Right Capture Route", "Sub Mic", "SUBMIC" },
707 { "Analog Right Capture Route", "Aux/FM Right", "LINEIN2" },
708
709 { "MicAmp1", NULL, "Analog Left Capture Route" },
710 { "MicAmp2", NULL, "Analog Right Capture Route" },
711
712 { "ADC1", NULL, "MicAmp1" },
713 { "ADC2", NULL, "MicAmp2" },
714
715 { "ATX Select", "AMIC1", "ADC1" },
716 { "ATX Select", "DMIC", "DMICDAT" },
717 { "ATX Select", "AMIC2", "ADC2" },
718
719 { "VTX Select", "AMIC1", "ADC1" },
720 { "VTX Select", "DMIC", "DMICDAT" },
721 { "VTX Select", "AMIC2", "ADC2" },
722
723 { "ULATX1", "ATX1 Filter Enable Switch", "ATX Select" },
724 { "ULATX1", "ATX1 Filter Bypass Switch", "ATX Select" },
725 { "ULATX2", "ATX2 Filter Enable Switch", "ATX Select" },
726 { "ULATX2", "ATX2 Filter Bypass Switch", "ATX Select" },
727
728 { "ULVTX1", "VTX1 Filter Enable Switch", "VTX Select" },
729 { "ULVTX1", "VTX1 Filter Bypass Switch", "VTX Select" },
730 { "ULVTX2", "VTX2 Filter Enable Switch", "VTX Select" },
731 { "ULVTX2", "VTX2 Filter Bypass Switch", "VTX Select" },
732
733 { "INTF1_SDO", "ULATX12 Capture Switch", "ULATX1" },
734 { "INTF1_SDO", "ULATX12 Capture Switch", "ULATX2" },
735 { "INTF2_SDO", "ULATX12 Capture Switch", "ULATX1" },
736 { "INTF2_SDO", "ULATX12 Capture Switch", "ULATX2" },
737
738 { "INTF1_SDO", NULL, "ULVTX1" },
739 { "INTF1_SDO", NULL, "ULVTX2" },
740 { "INTF2_SDO", NULL, "ULVTX1" },
741 { "INTF2_SDO", NULL, "ULVTX2" },
742
743 /* AFM Path */
744 { "APGA1", NULL, "LINEIN1" },
745 { "APGA2", NULL, "LINEIN2" },
746
747 { "RX1 Playback", "VRX1 Filter Bypass Switch", "RX1 Mixer" },
748 { "RX1 Playback", "ARX1 Filter Bypass Switch", "RX1 Mixer" },
749 { "RX1 Playback", "RX1 Filter Enable Switch", "RX1 Mixer" },
750
751 { "RX2 Playback", "VRX2 Filter Bypass Switch", "RX2 Mixer" },
752 { "RX2 Playback", "ARX2 Filter Bypass Switch", "RX2 Mixer" },
753 { "RX2 Playback", "RX2 Filter Enable Switch", "RX2 Mixer" },
754
755 { "RX3 Playback", "ARX3 Filter Bypass Switch", "RX3 Mixer" },
756 { "RX3 Playback", "RX3 Filter Enable Switch", "RX3 Mixer" },
757
758 { "RX4 Playback", "ARX4 Filter Bypass Switch", "RX4 Mixer" },
759 { "RX4 Playback", "RX4 Filter Enable Switch", "RX4 Mixer" },
760
761 { "RX5 Playback", "ARX5 Filter Bypass Switch", "RX5 Mixer" },
762 { "RX5 Playback", "RX5 Filter Enable Switch", "RX5 Mixer" },
763
764 { "RX6 Playback", "ARX6 Filter Bypass Switch", "RX6 Mixer" },
765 { "RX6 Playback", "RX6 Filter Enable Switch", "RX6 Mixer" },
766
767 { "DPGA1L Mixer", "RX1 Playback Switch", "RX1 Playback" },
768 { "DPGA1L Mixer", "RX3 Playback Switch", "RX3 Playback" },
769 { "DPGA1L Mixer", "RX5 Playback Switch", "RX5 Playback" },
770
771 { "DPGA1R Mixer", "RX2 Playback Switch", "RX2 Playback" },
772 { "DPGA1R Mixer", "RX4 Playback Switch", "RX4 Playback" },
773 { "DPGA1R Mixer", "RX6 Playback Switch", "RX6 Playback" },
774
775 { "DPGA1L", NULL, "DPGA1L Mixer" },
776 { "DPGA1R", NULL, "DPGA1R Mixer" },
777
778 { "DAC1L", NULL, "DPGA1L" },
779 { "DAC1R", NULL, "DPGA1R" },
780
781 { "DPGA2L Mixer", "RX1 Playback Switch", "RX1 Playback" },
782 { "DPGA2L Mixer", "RX2 Playback Switch", "RX2 Playback" },
783 { "DPGA2L Mixer", "RX3 Playback Switch", "RX3 Playback" },
784 { "DPGA2L Mixer", "RX4 Playback Switch", "RX4 Playback" },
785 { "DPGA2L Mixer", "RX5 Playback Switch", "RX5 Playback" },
786 { "DPGA2L Mixer", "RX6 Playback Switch", "RX6 Playback" },
787
788 { "DPGA2R Mixer", "RX2 Playback Switch", "RX2 Playback" },
789 { "DPGA2R Mixer", "RX4 Playback Switch", "RX4 Playback" },
790 { "DPGA2R Mixer", "RX6 Playback Switch", "RX6 Playback" },
791
792 { "DPGA2L", NULL, "DPGA2L Mixer" },
793 { "DPGA2R", NULL, "DPGA2R Mixer" },
794
795 { "DAC2L", NULL, "DPGA2L" },
796 { "DAC2R", NULL, "DPGA2R" },
797
798 { "DPGA3L Mixer", "RX1 Playback Switch", "RX1 Playback" },
799 { "DPGA3L Mixer", "RX3 Playback Switch", "RX3 Playback" },
800 { "DPGA3L Mixer", "RX5 Playback Switch", "RX5 Playback" },
801
802 { "DPGA3R Mixer", "RX2 Playback Switch", "RX2 Playback" },
803 { "DPGA3R Mixer", "RX4 Playback Switch", "RX4 Playback" },
804 { "DPGA3R Mixer", "RX6 Playback Switch", "RX6 Playback" },
805
806 { "DPGA3L", NULL, "DPGA3L Mixer" },
807 { "DPGA3R", NULL, "DPGA3R Mixer" },
808
809 { "DAC3L", NULL, "DPGA3L" },
810 { "DAC3R", NULL, "DPGA3R" },
811
812 { "Headset Left Mixer", "DAC1L Playback Switch", "DAC1L" },
813 { "Headset Left Mixer", "APGA1 Playback Switch", "APGA1" },
814
815 { "Headset Right Mixer", "DAC1R Playback Switch", "DAC1R" },
816 { "Headset Right Mixer", "APGA2 Playback Switch", "APGA2" },
817
818 { "HS Left Driver", NULL, "Headset Left Mixer" },
819 { "HS Right Driver", NULL, "Headset Right Mixer" },
820
821 { "HSOL", NULL, "HS Left Driver" },
822 { "HSOR", NULL, "HS Right Driver" },
823
824 /* Earphone playback path */
825 { "Earphone Mixer", "DAC2L Playback Switch", "DAC2L" },
826 { "Earphone Mixer", "APGA1 Playback Switch", "APGA1" },
827
828 { "Earphone Playback", "Switch", "Earphone Mixer" },
829 { "Earphone Driver", NULL, "Earphone Playback" },
830 { "EP", NULL, "Earphone Driver" },
831
832 { "Handsfree Left Mixer", "DAC2L Playback Switch", "DAC2L" },
833 { "Handsfree Left Mixer", "APGA1 Playback Switch", "APGA1" },
834
835 { "Handsfree Right Mixer", "DAC2R Playback Switch", "DAC2R" },
836 { "Handsfree Right Mixer", "APGA2 Playback Switch", "APGA2" },
837
838 { "HF Left PGA", NULL, "Handsfree Left Mixer" },
839 { "HF Right PGA", NULL, "Handsfree Right Mixer" },
840
841 { "HF Left Driver", NULL, "HF Left PGA" },
842 { "HF Right Driver", NULL, "HF Right PGA" },
843
844 { "HFL", NULL, "HF Left Driver" },
845 { "HFR", NULL, "HF Right Driver" },
846
847 { "LINEOUT1 Mixer", "DAC3L Playback Switch", "DAC3L" },
848 { "LINEOUT1 Mixer", "APGA1 Playback Switch", "APGA1" },
849
850 { "LINEOUT2 Mixer", "DAC3R Playback Switch", "DAC3R" },
851 { "LINEOUT2 Mixer", "APGA2 Playback Switch", "APGA2" },
852
853 { "LINEOUT1 Driver", NULL, "LINEOUT1 Mixer" },
854 { "LINEOUT2 Driver", NULL, "LINEOUT2 Mixer" },
855
856 { "LINEOUT1", NULL, "LINEOUT1 Driver" },
857 { "LINEOUT2", NULL, "LINEOUT2 Driver" },
858};
859
860static int isabelle_hs_mute(struct snd_soc_dai *dai, int mute)
861{
862 snd_soc_update_bits(dai->codec, ISABELLE_DAC1_SOFTRAMP_REG,
863 BIT(4), (mute ? BIT(4) : 0));
864
865 return 0;
866}
867
868static int isabelle_hf_mute(struct snd_soc_dai *dai, int mute)
869{
870 snd_soc_update_bits(dai->codec, ISABELLE_DAC2_SOFTRAMP_REG,
871 BIT(4), (mute ? BIT(4) : 0));
872
873 return 0;
874}
875
876static int isabelle_line_mute(struct snd_soc_dai *dai, int mute)
877{
878 snd_soc_update_bits(dai->codec, ISABELLE_DAC3_SOFTRAMP_REG,
879 BIT(4), (mute ? BIT(4) : 0));
880
881 return 0;
882}
883
884static int isabelle_set_bias_level(struct snd_soc_codec *codec,
885 enum snd_soc_bias_level level)
886{
887 switch (level) {
888 case SND_SOC_BIAS_ON:
889 break;
890 case SND_SOC_BIAS_PREPARE:
891 break;
892
893 case SND_SOC_BIAS_STANDBY:
894 snd_soc_update_bits(codec, ISABELLE_PWR_EN_REG,
895 ISABELLE_CHIP_EN, BIT(0));
896 break;
897
898 case SND_SOC_BIAS_OFF:
899 snd_soc_update_bits(codec, ISABELLE_PWR_EN_REG,
900 ISABELLE_CHIP_EN, 0);
901 break;
902 }
903
904 codec->dapm.bias_level = level;
905
906 return 0;
907}
908
909static int isabelle_hw_params(struct snd_pcm_substream *substream,
910 struct snd_pcm_hw_params *params,
911 struct snd_soc_dai *dai)
912{
913 struct snd_soc_pcm_runtime *rtd = substream->private_data;
914 struct snd_soc_codec *codec = rtd->codec;
915 u16 aif = 0;
916 unsigned int fs_val = 0;
917
918 switch (params_rate(params)) {
919 case 8000:
920 fs_val = ISABELLE_FS_RATE_8;
921 break;
922 case 11025:
923 fs_val = ISABELLE_FS_RATE_11;
924 break;
925 case 12000:
926 fs_val = ISABELLE_FS_RATE_12;
927 break;
928 case 16000:
929 fs_val = ISABELLE_FS_RATE_16;
930 break;
931 case 22050:
932 fs_val = ISABELLE_FS_RATE_22;
933 break;
934 case 24000:
935 fs_val = ISABELLE_FS_RATE_24;
936 break;
937 case 32000:
938 fs_val = ISABELLE_FS_RATE_32;
939 break;
940 case 44100:
941 fs_val = ISABELLE_FS_RATE_44;
942 break;
943 case 48000:
944 fs_val = ISABELLE_FS_RATE_48;
945 break;
946 default:
947 return -EINVAL;
948 }
949
950 snd_soc_update_bits(codec, ISABELLE_FS_RATE_CFG_REG,
951 ISABELLE_FS_RATE_MASK, fs_val);
952
953 /* bit size */
954 switch (params_format(params)) {
955 case SNDRV_PCM_FORMAT_S20_3LE:
956 aif |= ISABELLE_AIF_LENGTH_20;
957 break;
958 case SNDRV_PCM_FORMAT_S32_LE:
959 aif |= ISABELLE_AIF_LENGTH_32;
960 break;
961 default:
962 return -EINVAL;
963 }
964
965 snd_soc_update_bits(codec, ISABELLE_INTF_CFG_REG,
966 ISABELLE_AIF_LENGTH_MASK, aif);
967
968 return 0;
969}
970
971static int isabelle_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
972{
973 struct snd_soc_codec *codec = codec_dai->codec;
974 unsigned int aif_val = 0;
975
976 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
977 case SND_SOC_DAIFMT_CBS_CFS:
978 aif_val &= ~ISABELLE_AIF_MS;
979 break;
980 case SND_SOC_DAIFMT_CBM_CFM:
981 aif_val |= ISABELLE_AIF_MS;
982 break;
983 default:
984 return -EINVAL;
985 }
986
987 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
988 case SND_SOC_DAIFMT_I2S:
989 aif_val |= ISABELLE_I2S_MODE;
990 break;
991 case SND_SOC_DAIFMT_LEFT_J:
992 aif_val |= ISABELLE_LEFT_J_MODE;
993 break;
994 case SND_SOC_DAIFMT_PDM:
995 aif_val |= ISABELLE_PDM_MODE;
996 break;
997 default:
998 return -EINVAL;
999 }
1000
1001 snd_soc_update_bits(codec, ISABELLE_INTF_CFG_REG,
1002 (ISABELLE_AIF_MS | ISABELLE_AIF_FMT_MASK), aif_val);
1003
1004 return 0;
1005}
1006
1007/* Rates supported by Isabelle driver */
1008#define ISABELLE_RATES SNDRV_PCM_RATE_8000_48000
1009
1010/* Formates supported by Isabelle driver. */
1011#define ISABELLE_FORMATS (SNDRV_PCM_FMTBIT_S20_3LE |\
1012 SNDRV_PCM_FMTBIT_S32_LE)
1013
1014static struct snd_soc_dai_ops isabelle_hs_dai_ops = {
1015 .hw_params = isabelle_hw_params,
1016 .set_fmt = isabelle_set_dai_fmt,
1017 .digital_mute = isabelle_hs_mute,
1018};
1019
1020static struct snd_soc_dai_ops isabelle_hf_dai_ops = {
1021 .hw_params = isabelle_hw_params,
1022 .set_fmt = isabelle_set_dai_fmt,
1023 .digital_mute = isabelle_hf_mute,
1024};
1025
1026static struct snd_soc_dai_ops isabelle_line_dai_ops = {
1027 .hw_params = isabelle_hw_params,
1028 .set_fmt = isabelle_set_dai_fmt,
1029 .digital_mute = isabelle_line_mute,
1030};
1031
1032static struct snd_soc_dai_ops isabelle_ul_dai_ops = {
1033 .hw_params = isabelle_hw_params,
1034 .set_fmt = isabelle_set_dai_fmt,
1035};
1036
1037/* ISABELLE dai structure */
Mark Brownbb1591b32012-06-22 11:33:38 +0100[diff] [blame]1038static struct snd_soc_dai_driver isabelle_dai[] = {
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1039 {
1040 .name = "isabelle-dl1",
1041 .playback = {
1042 .stream_name = "Headset Playback",
1043 .channels_min = 1,
1044 .channels_max = 2,
1045 .rates = ISABELLE_RATES,
1046 .formats = ISABELLE_FORMATS,
1047 },
1048 .ops = &isabelle_hs_dai_ops,
1049 },
1050 {
1051 .name = "isabelle-dl2",
1052 .playback = {
1053 .stream_name = "Handsfree Playback",
1054 .channels_min = 1,
1055 .channels_max = 2,
1056 .rates = ISABELLE_RATES,
1057 .formats = ISABELLE_FORMATS,
1058 },
1059 .ops = &isabelle_hf_dai_ops,
1060 },
1061 {
1062 .name = "isabelle-lineout",
1063 .playback = {
1064 .stream_name = "Lineout Playback",
1065 .channels_min = 1,
1066 .channels_max = 2,
1067 .rates = ISABELLE_RATES,
1068 .formats = ISABELLE_FORMATS,
1069 },
1070 .ops = &isabelle_line_dai_ops,
1071 },
1072 {
1073 .name = "isabelle-ul",
1074 .capture = {
1075 .stream_name = "Capture",
1076 .channels_min = 1,
1077 .channels_max = 2,
1078 .rates = ISABELLE_RATES,
1079 .formats = ISABELLE_FORMATS,
1080 },
1081 .ops = &isabelle_ul_dai_ops,
1082 },
1083};
1084
1085static int isabelle_probe(struct snd_soc_codec *codec)
1086{
1087 int ret = 0;
1088
1089 codec->control_data = dev_get_regmap(codec->dev, NULL);
1090
1091 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
1092 if (ret < 0) {
1093 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1094 return ret;
1095 }
1096
1097 return 0;
1098}
1099
1100static struct snd_soc_codec_driver soc_codec_dev_isabelle = {
1101 .probe = isabelle_probe,
1102 .set_bias_level = isabelle_set_bias_level,
1103 .controls = isabelle_snd_controls,
1104 .num_controls = ARRAY_SIZE(isabelle_snd_controls),
1105 .dapm_widgets = isabelle_dapm_widgets,
1106 .num_dapm_widgets = ARRAY_SIZE(isabelle_dapm_widgets),
1107 .dapm_routes = isabelle_intercon,
1108 .num_dapm_routes = ARRAY_SIZE(isabelle_intercon),
1109 .idle_bias_off = true,
1110};
1111
1112static const struct regmap_config isabelle_regmap_config = {
1113 .reg_bits = 8,
1114 .val_bits = 8,
1115
1116 .max_register = ISABELLE_MAX_REGISTER,
1117 .reg_defaults = isabelle_reg_defs,
1118 .num_reg_defaults = ARRAY_SIZE(isabelle_reg_defs),
1119 .cache_type = REGCACHE_RBTREE,
1120};
1121
Bill Pembertonc88f3de2012-12-07 09:26:18 -0500[diff] [blame]1122static int isabelle_i2c_probe(struct i2c_client *i2c,
1123 const struct i2c_device_id *id)
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1124{
1125 struct regmap *isabelle_regmap;
1126 int ret = 0;
1127
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1128 isabelle_regmap = devm_regmap_init_i2c(i2c, &isabelle_regmap_config);
1129 if (IS_ERR(isabelle_regmap)) {
1130 ret = PTR_ERR(isabelle_regmap);
1131 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1132 ret);
1133 return ret;
1134 }
Dan Carpenter40820102012-06-07 15:38:37 +0300[diff] [blame]1135 i2c_set_clientdata(i2c, isabelle_regmap);
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1136
1137 ret = snd_soc_register_codec(&i2c->dev,
1138 &soc_codec_dev_isabelle, isabelle_dai,
1139 ARRAY_SIZE(isabelle_dai));
1140 if (ret < 0) {
1141 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1142 return ret;
1143 }
1144
1145 return ret;
1146}
1147
Bill Pembertonc88f3de2012-12-07 09:26:18 -0500[diff] [blame]1148static int isabelle_i2c_remove(struct i2c_client *client)
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1149{
1150 snd_soc_unregister_codec(&client->dev);
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1151 return 0;
1152}
1153
1154static const struct i2c_device_id isabelle_i2c_id[] = {
1155 { "isabelle", 0 },
1156 { }
1157};
1158MODULE_DEVICE_TABLE(i2c, isabelle_i2c_id);
1159
1160static struct i2c_driver isabelle_i2c_driver = {
1161 .driver = {
1162 .name = "isabelle",
1163 .owner = THIS_MODULE,
1164 },
1165 .probe = isabelle_i2c_probe,
Bill Pembertonc88f3de2012-12-07 09:26:18 -0500[diff] [blame]1166 .remove = isabelle_i2c_remove,
M R Swami Reddy2f989f72012-06-01 22:21:54 +0530[diff] [blame]1167 .id_table = isabelle_i2c_id,
1168};
1169
1170module_i2c_driver(isabelle_i2c_driver);
1171
1172MODULE_DESCRIPTION("ASoC ISABELLE driver");
1173MODULE_AUTHOR("Vishwas A Deshpande <vishwas.a.deshpande@ti.com>");
1174MODULE_AUTHOR("M R Swami Reddy <MR.Swami.Reddy@ti.com>");
1175MODULE_LICENSE("GPL v2");