Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 79b40753a318adb3254c6d534b834c10f99cba05 / . / arch / arm / boot / dts / kirkwood.dtsi
blob: 4e5b8154a5be5d95535cd5eb9d66f894670c0946 [file] [log] [blame]
Jason Cooper3d468b62012-02-27 16:07:13 +0000[diff] [blame]1/include/ "skeleton.dtsi"
2
3/ {
Andrew Lunn77843502012-07-18 19:22:54 +0200[diff] [blame]4 compatible = "marvell,kirkwood";
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]5 interrupt-parent = <&intc>;
6
7 intc: interrupt-controller {
8 compatible = "marvell,orion-intc", "marvell,intc";
9 interrupt-controller;
10 #interrupt-cells = <1>;
11 reg = <0xf1020204 0x04>,
12 <0xf1020214 0x04>;
13 };
Jason Cooper3d468b62012-02-27 16:07:13 +0000[diff] [blame]14
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]15 ocp@f1000000 {
16 compatible = "simple-bus";
Andrew Lunnf37fbd32012-09-03 20:29:34 +0200[diff] [blame]17 ranges = <0x00000000 0xf1000000 0x4000000
18 0xf5000000 0xf5000000 0x0000400>;
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]19 #address-cells = <1>;
20 #size-cells = <1>;
21
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]22 gpio0: gpio@10100 {
23 compatible = "marvell,orion-gpio";
24 #gpio-cells = <2>;
25 gpio-controller;
26 reg = <0x10100 0x40>;
27 ngpio = <32>;
28 interrupts = <35>, <36>, <37>, <38>;
29 };
30
31 gpio1: gpio@10140 {
32 compatible = "marvell,orion-gpio";
33 #gpio-cells = <2>;
34 gpio-controller;
35 reg = <0x10140 0x40>;
36 ngpio = <18>;
37 interrupts = <39>, <40>, <41>;
38 };
39
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]40 serial@12000 {
41 compatible = "ns16550a";
42 reg = <0x12000 0x100>;
43 reg-shift = <2>;
44 interrupts = <33>;
45 /* set clock-frequency in board dts */
46 status = "disabled";
47 };
48
49 serial@12100 {
50 compatible = "ns16550a";
51 reg = <0x12100 0x100>;
52 reg-shift = <2>;
53 interrupts = <34>;
54 /* set clock-frequency in board dts */
55 status = "disabled";
56 };
Jason Coopere871b872012-03-06 23:55:04 +0000[diff] [blame]57
58 rtc@10300 {
Andrew Lunn77843502012-07-18 19:22:54 +0200[diff] [blame]59 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
Jason Coopere871b872012-03-06 23:55:04 +0000[diff] [blame]60 reg = <0x10300 0x20>;
61 interrupts = <53>;
62 };
Jamie Lentin858156b2012-04-18 11:06:42 +0100[diff] [blame]63
Michael Walle76372122012-06-06 20:30:57 +0200[diff] [blame]64 spi@10600 {
65 compatible = "marvell,orion-spi";
66 #address-cells = <1>;
67 #size-cells = <0>;
68 cell-index = <0>;
69 interrupts = <23>;
70 reg = <0x10600 0x28>;
71 status = "disabled";
72 };
73
Andrew Lunn1e7bad02012-06-10 15:20:06 +0200[diff] [blame]74 wdt@20300 {
75 compatible = "marvell,orion-wdt";
76 reg = <0x20300 0x28>;
77 status = "okay";
78 };
79
Andrew Lunn97b414e2012-06-10 16:45:37 +0200[diff] [blame]80 sata@80000 {
81 compatible = "marvell,orion-sata";
82 reg = <0x80000 0x5000>;
83 interrupts = <21>;
84 status = "disabled";
85 };
86
Jamie Lentin858156b2012-04-18 11:06:42 +0100[diff] [blame]87 nand@3000000 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 cle = <0>;
91 ale = <1>;
92 bank-width = <1>;
Andrew Lunn77843502012-07-18 19:22:54 +0200[diff] [blame]93 compatible = "marvell,orion-nand";
Jamie Lentin858156b2012-04-18 11:06:42 +0100[diff] [blame]94 reg = <0x3000000 0x400>;
95 chip-delay = <25>;
96 /* set partition map and/or chip-delay in board dts */
97 status = "disabled";
98 };
Andrew Lunne91cac02012-07-20 13:51:55 +0200[diff] [blame]99
100 i2c@11000 {
101 compatible = "marvell,mv64xxx-i2c";
102 reg = <0x11000 0x20>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 interrupts = <29>;
106 clock-frequency = <100000>;
107 status = "disabled";
108 };
Andrew Lunnf37fbd32012-09-03 20:29:34 +0200[diff] [blame]109
110 crypto@30000 {
111 compatible = "marvell,orion-crypto";
112 reg = <0x30000 0x10000>,
113 <0xf5000000 0x800>;
114 reg-names = "regs", "sram";
115 interrupts = <22>;
116 status = "okay";
117 };
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]118 };
119};