Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | Register Usage for Linux/PA-RISC |
| 2 | |
| 3 | [ an asterisk is used for planned usage which is currently unimplemented ] |
| 4 | |
| 5 | General Registers as specified by ABI |
| 6 | |
| 7 | Control Registers |
| 8 | |
| 9 | CR 0 (Recovery Counter) used for ptrace |
| 10 | CR 1-CR 7(undefined) unused |
| 11 | CR 8 (Protection ID) per-process value* |
| 12 | CR 9, 12, 13 (PIDS) unused |
| 13 | CR10 (CCR) lazy FPU saving* |
| 14 | CR11 as specified by ABI (SAR) |
| 15 | CR14 (interruption vector) initialized to fault_vector |
| 16 | CR15 (EIEM) initialized to all ones* |
| 17 | CR16 (Interval Timer) read for cycle count/write starts Interval Tmr |
| 18 | CR17-CR22 interruption parameters |
| 19 | CR19 Interrupt Instruction Register |
| 20 | CR20 Interrupt Space Register |
| 21 | CR21 Interrupt Offset Register |
| 22 | CR22 Interrupt PSW |
| 23 | CR23 (EIRR) read for pending interrupts/write clears bits |
| 24 | CR24 (TR 0) Kernel Space Page Directory Pointer |
| 25 | CR25 (TR 1) User Space Page Directory Pointer |
| 26 | CR26 (TR 2) not used |
| 27 | CR27 (TR 3) Thread descriptor pointer |
| 28 | CR28 (TR 4) not used |
| 29 | CR29 (TR 5) not used |
| 30 | CR30 (TR 6) current / 0 |
| 31 | CR31 (TR 7) Temporary register, used in various places |
| 32 | |
| 33 | Space Registers (kernel mode) |
| 34 | |
| 35 | SR0 temporary space register |
| 36 | SR4-SR7 set to 0 |
| 37 | SR1 temporary space register |
| 38 | SR2 kernel should not clobber this |
| 39 | SR3 used for userspace accesses (current process) |
| 40 | |
| 41 | Space Registers (user mode) |
| 42 | |
| 43 | SR0 temporary space register |
| 44 | SR1 temporary space register |
| 45 | SR2 holds space of linux gateway page |
| 46 | SR3 holds user address space value while in kernel |
| 47 | SR4-SR7 Defines short address space for user/kernel |
| 48 | |
| 49 | |
| 50 | Processor Status Word |
| 51 | |
| 52 | W (64-bit addresses) 0 |
| 53 | E (Little-endian) 0 |
| 54 | S (Secure Interval Timer) 0 |
| 55 | T (Taken Branch Trap) 0 |
| 56 | H (Higher-privilege trap) 0 |
| 57 | L (Lower-privilege trap) 0 |
| 58 | N (Nullify next instruction) used by C code |
| 59 | X (Data memory break disable) 0 |
| 60 | B (Taken Branch) used by C code |
| 61 | C (code address translation) 1, 0 while executing real-mode code |
| 62 | V (divide step correction) used by C code |
| 63 | M (HPMC mask) 0, 1 while executing HPMC handler* |
| 64 | C/B (carry/borrow bits) used by C code |
| 65 | O (ordered references) 1* |
| 66 | F (performance monitor) 0 |
| 67 | R (Recovery Counter trap) 0 |
| 68 | Q (collect interruption state) 1 (0 in code directly preceding an rfi) |
| 69 | P (Protection Identifiers) 1* |
| 70 | D (Data address translation) 1, 0 while executing real-mode code |
| 71 | I (external interrupt mask) used by cli()/sti() macros |
| 72 | |
| 73 | "Invisible" Registers |
| 74 | |
| 75 | PSW default W value 0 |
| 76 | PSW default E value 0 |
| 77 | Shadow Registers used by interruption handler code |
| 78 | TOC enable bit 1 |
| 79 | |
| 80 | ========================================================================= |
Helge Deller | a83f58b | 2013-06-29 13:24:16 +0200 | [diff] [blame] | 81 | |
| 82 | The PA-RISC architecture defines 7 registers as "shadow registers". |
| 83 | Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce |
| 84 | the state save and restore time by eliminating the need for general register |
| 85 | (GR) saves and restores in interruption handlers. |
| 86 | Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25. |
| 87 | |
| 88 | ========================================================================= |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | Register usage notes, originally from John Marvin, with some additional |
| 90 | notes from Randolph Chung. |
| 91 | |
| 92 | For the general registers: |
| 93 | |
| 94 | r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of |
| 95 | course, you need to save them if you care about them, before calling |
| 96 | another procedure. Some of the above registers do have special meanings |
| 97 | that you should be aware of: |
| 98 | |
| 99 | r1: The addil instruction is hardwired to place its result in r1, |
| 100 | so if you use that instruction be aware of that. |
| 101 | |
| 102 | r2: This is the return pointer. In general you don't want to |
| 103 | use this, since you need the pointer to get back to your |
| 104 | caller. However, it is grouped with this set of registers |
| 105 | since the caller can't rely on the value being the same |
| 106 | when you return, i.e. you can copy r2 to another register |
| 107 | and return through that register after trashing r2, and |
| 108 | that should not cause a problem for the calling routine. |
| 109 | |
| 110 | r19-r22: these are generally regarded as temporary registers. |
| 111 | Note that in 64 bit they are arg7-arg4. |
| 112 | |
| 113 | r23-r26: these are arg3-arg0, i.e. you can use them if you |
| 114 | don't care about the values that were passed in anymore. |
| 115 | |
| 116 | r28,r29: are ret0 and ret1. They are what you pass return values |
| 117 | in. r28 is the primary return. When returning small structures |
| 118 | r29 may also be used to pass data back to the caller. |
| 119 | |
| 120 | r30: stack pointer |
| 121 | |
| 122 | r31: the ble instruction puts the return pointer in here. |
| 123 | |
| 124 | |
| 125 | r3-r18,r27,r30 need to be saved and restored. r3-r18 are just |
| 126 | general purpose registers. r27 is the data pointer, and is |
| 127 | used to make references to global variables easier. r30 is |
| 128 | the stack pointer. |
| 129 | |