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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-sparc64/cache.h
3 */
4#ifndef __ARCH_SPARC64_CACHE_H
5#define __ARCH_SPARC64_CACHE_H
6
7/* bytes per L1 cache line */
8#define L1_CACHE_SHIFT 5
9#define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line. */
10
11#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
12#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */
13
14#define SMP_CACHE_BYTES_SHIFT 6
15#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) /* L2 cache line size. */
16
17#endif