Tanmay Inamdar | d5b9ee7 | 2011-11-28 21:01:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree for Klondike (APM8018X) board. |
| 3 | * |
| 4 | * Copyright (c) 2010, Applied Micro Circuits Corporation |
| 5 | * Author: Tanmay Inamdar <tinamdar@apm.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | /dts-v1/; |
| 25 | |
| 26 | / { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <1>; |
| 29 | model = "apm,klondike"; |
| 30 | compatible = "apm,klondike"; |
| 31 | dcr-parent = <&{/cpus/cpu@0}>; |
| 32 | |
| 33 | aliases { |
| 34 | ethernet0 = &EMAC0; |
| 35 | ethernet1 = &EMAC1; |
| 36 | }; |
| 37 | |
| 38 | cpus { |
| 39 | #address-cells = <1>; |
| 40 | #size-cells = <0>; |
| 41 | |
| 42 | cpu@0 { |
| 43 | device_type = "cpu"; |
| 44 | model = "PowerPC,apm8018x"; |
| 45 | reg = <0x00000000>; |
| 46 | clock-frequency = <300000000>; /* Filled in by U-Boot */ |
| 47 | timebase-frequency = <300000000>; /* Filled in by U-Boot */ |
| 48 | i-cache-line-size = <32>; |
| 49 | d-cache-line-size = <32>; |
| 50 | i-cache-size = <16384>; /* 16 kB */ |
| 51 | d-cache-size = <16384>; /* 16 kB */ |
| 52 | dcr-controller; |
| 53 | dcr-access-method = "native"; |
| 54 | }; |
| 55 | }; |
| 56 | |
| 57 | memory { |
| 58 | device_type = "memory"; |
| 59 | reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */ |
| 60 | }; |
| 61 | |
| 62 | UIC0: interrupt-controller { |
| 63 | compatible = "ibm,uic"; |
| 64 | interrupt-controller; |
| 65 | cell-index = <0>; |
| 66 | dcr-reg = <0x0c0 0x010>; |
| 67 | #address-cells = <0>; |
| 68 | #size-cells = <0>; |
| 69 | #interrupt-cells = <2>; |
| 70 | }; |
| 71 | |
| 72 | UIC1: interrupt-controller1 { |
| 73 | compatible = "ibm,uic"; |
| 74 | interrupt-controller; |
| 75 | cell-index = <1>; |
| 76 | dcr-reg = <0x0d0 0x010>; |
| 77 | #address-cells = <0>; |
| 78 | #size-cells = <0>; |
| 79 | #interrupt-cells = <2>; |
| 80 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 81 | interrupt-parent = <&UIC0>; |
| 82 | }; |
| 83 | |
| 84 | UIC2: interrupt-controller2 { |
| 85 | compatible = "ibm,uic"; |
| 86 | interrupt-controller; |
| 87 | cell-index = <2>; |
| 88 | dcr-reg = <0x0e0 0x010>; |
| 89 | #address-cells = <0>; |
| 90 | #size-cells = <0>; |
| 91 | #interrupt-cells = <2>; |
| 92 | interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */ |
| 93 | interrupt-parent = <&UIC0>; |
| 94 | }; |
| 95 | |
| 96 | UIC3: interrupt-controller3 { |
| 97 | compatible = "ibm,uic"; |
| 98 | interrupt-controller; |
| 99 | cell-index = <3>; |
| 100 | dcr-reg = <0x0f0 0x010>; |
| 101 | #address-cells = <0>; |
| 102 | #size-cells = <0>; |
| 103 | #interrupt-cells = <2>; |
| 104 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
| 105 | interrupt-parent = <&UIC0>; |
| 106 | }; |
| 107 | |
| 108 | plb { |
| 109 | compatible = "ibm,plb4"; |
| 110 | #address-cells = <1>; |
| 111 | #size-cells = <1>; |
| 112 | ranges; |
| 113 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 114 | |
| 115 | SDRAM0: memory-controller { |
| 116 | compatible = "ibm,sdram-apm8018x"; |
| 117 | dcr-reg = <0x010 0x002>; |
| 118 | }; |
| 119 | |
| 120 | MAL0: mcmal { |
| 121 | compatible = "ibm,mcmal2"; |
| 122 | dcr-reg = <0x180 0x062>; |
| 123 | num-tx-chans = <2>; |
| 124 | num-rx-chans = <16>; |
| 125 | #address-cells = <0>; |
| 126 | #size-cells = <0>; |
| 127 | interrupt-parent = <&UIC1>; |
| 128 | interrupts = </*TXEOB*/ 0x6 0x4 |
| 129 | /*RXEOB*/ 0x7 0x4 |
| 130 | /*SERR*/ 0x1 0x4 |
| 131 | /*TXDE*/ 0x2 0x4 |
| 132 | /*RXDE*/ 0x3 0x4>; |
| 133 | }; |
| 134 | |
| 135 | POB0: opb { |
| 136 | compatible = "ibm,opb"; |
| 137 | #address-cells = <1>; |
| 138 | #size-cells = <1>; |
| 139 | ranges = <0x20000000 0x20000000 0x30000000 |
| 140 | 0x50000000 0x50000000 0x10000000 |
| 141 | 0x60000000 0x60000000 0x10000000 |
| 142 | 0xFE000000 0xFE000000 0x00010000>; |
| 143 | dcr-reg = <0x100 0x020>; |
| 144 | clock-frequency = <300000000>; /* Filled in by U-Boot */ |
| 145 | |
| 146 | RGMII0: emac-rgmii@400a2000 { |
| 147 | compatible = "ibm,rgmii"; |
| 148 | reg = <0x400a2000 0x00000010>; |
| 149 | has-mdio; |
| 150 | }; |
| 151 | |
| 152 | TAH0: emac-tah@400a3000 { |
| 153 | compatible = "ibm,tah"; |
| 154 | reg = <0x400a3000 0x100>; |
| 155 | }; |
| 156 | |
| 157 | TAH1: emac-tah@400a4000 { |
| 158 | compatible = "ibm,tah"; |
| 159 | reg = <0x400a4000 0x100>; |
| 160 | }; |
| 161 | |
| 162 | EMAC0: ethernet@400a0000 { |
| 163 | compatible = "ibm,emac4", "ibm-emac4sync"; |
| 164 | interrupt-parent = <&EMAC0>; |
| 165 | interrupts = <0x0>; |
| 166 | #interrupt-cells = <1>; |
| 167 | #address-cells = <0>; |
| 168 | #size-cells = <0>; |
| 169 | interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>; |
| 170 | reg = <0x400a0000 0x00000100>; |
| 171 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 172 | mal-device = <&MAL0>; |
| 173 | mal-tx-channel = <0x0>; |
| 174 | mal-rx-channel = <0x0>; |
| 175 | cell-index = <0>; |
| 176 | max-frame-size = <9000>; |
| 177 | rx-fifo-size = <4096>; |
| 178 | tx-fifo-size = <2048>; |
| 179 | phy-mode = "rgmii"; |
| 180 | phy-address = <0x2>; |
| 181 | turbo = "no"; |
| 182 | phy-map = <0x00000000>; |
| 183 | rgmii-device = <&RGMII0>; |
| 184 | rgmii-channel = <0>; |
| 185 | tah-device = <&TAH0>; |
| 186 | tah-channel = <0>; |
| 187 | has-inverted-stacr-oc; |
| 188 | has-new-stacr-staopc; |
| 189 | }; |
| 190 | |
| 191 | EMAC1: ethernet@400a1000 { |
| 192 | compatible = "ibm,emac4", "ibm-emac4sync"; |
| 193 | status = "disabled"; |
| 194 | interrupt-parent = <&EMAC1>; |
| 195 | interrupts = <0x0>; |
| 196 | #interrupt-cells = <1>; |
| 197 | #address-cells = <0>; |
| 198 | #size-cells = <0>; |
| 199 | interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>; |
| 200 | reg = <0x400a1000 0x00000100>; |
| 201 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 202 | mal-device = <&MAL0>; |
| 203 | mal-tx-channel = <1>; |
| 204 | mal-rx-channel = <8>; |
| 205 | cell-index = <1>; |
| 206 | max-frame-size = <9000>; |
| 207 | rx-fifo-size = <4096>; |
| 208 | tx-fifo-size = <2048>; |
| 209 | phy-mode = "rgmii"; |
| 210 | phy-address = <0x3>; |
| 211 | turbo = "no"; |
| 212 | phy-map = <0x00000000>; |
| 213 | rgmii-device = <&RGMII0>; |
| 214 | rgmii-channel = <1>; |
| 215 | tah-device = <&TAH1>; |
| 216 | tah-channel = <0>; |
| 217 | has-inverted-stacr-oc; |
| 218 | has-new-stacr-staopc; |
| 219 | mdio-device = <&EMAC0>; |
| 220 | }; |
| 221 | }; |
| 222 | }; |
| 223 | |
| 224 | chosen { |
| 225 | linux,stdout-path = "/plb/opb/serial@50001000"; |
| 226 | }; |
| 227 | }; |