Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Russell King | 0ddbccd | 2008-09-25 15:59:19 +0100 | [diff] [blame] | 2 | * linux/arch/arm/mm/dma-mapping.c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2000-2004 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * DMA uncached mapping support. |
| 11 | */ |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/mm.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/dma-mapping.h> |
| 20 | |
Lennert Buytenhek | 23759dc | 2006-04-02 00:07:39 +0100 | [diff] [blame] | 21 | #include <asm/memory.h> |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 22 | #include <asm/highmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #include <asm/cacheflush.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <asm/tlbflush.h> |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 25 | #include <asm/sizes.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 27 | /* Sanity check size */ |
| 28 | #if (CONSISTENT_DMA_SIZE % SZ_2M) |
| 29 | #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB" |
| 30 | #endif |
| 31 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #define CONSISTENT_END (0xffe00000) |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 33 | #define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE) |
| 34 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 36 | #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) |
| 37 | #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) |
| 38 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 39 | static u64 get_coherent_dma_mask(struct device *dev) |
| 40 | { |
| 41 | u64 mask = ISA_DMA_THRESHOLD; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 43 | if (dev) { |
| 44 | mask = dev->coherent_dma_mask; |
| 45 | |
| 46 | /* |
| 47 | * Sanity check the DMA mask - it must be non-zero, and |
| 48 | * must be able to be satisfied by a DMA allocation. |
| 49 | */ |
| 50 | if (mask == 0) { |
| 51 | dev_warn(dev, "coherent DMA mask is unset\n"); |
| 52 | return 0; |
| 53 | } |
| 54 | |
| 55 | if ((~mask) & ISA_DMA_THRESHOLD) { |
| 56 | dev_warn(dev, "coherent DMA mask %#llx is smaller " |
| 57 | "than system GFP_DMA mask %#llx\n", |
| 58 | mask, (unsigned long long)ISA_DMA_THRESHOLD); |
| 59 | return 0; |
| 60 | } |
| 61 | } |
| 62 | |
| 63 | return mask; |
| 64 | } |
| 65 | |
Russell King | 7a9a32a | 2009-11-19 15:31:07 +0000 | [diff] [blame^] | 66 | /* |
| 67 | * Allocate a DMA buffer for 'dev' of size 'size' using the |
| 68 | * specified gfp mask. Note that 'size' must be page aligned. |
| 69 | */ |
| 70 | static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) |
| 71 | { |
| 72 | unsigned long order = get_order(size); |
| 73 | struct page *page, *p, *e; |
| 74 | void *ptr; |
| 75 | u64 mask = get_coherent_dma_mask(dev); |
| 76 | |
| 77 | #ifdef CONFIG_DMA_API_DEBUG |
| 78 | u64 limit = (mask + 1) & ~mask; |
| 79 | if (limit && size >= limit) { |
| 80 | dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n", |
| 81 | size, mask); |
| 82 | return NULL; |
| 83 | } |
| 84 | #endif |
| 85 | |
| 86 | if (!mask) |
| 87 | return NULL; |
| 88 | |
| 89 | if (mask < 0xffffffffULL) |
| 90 | gfp |= GFP_DMA; |
| 91 | |
| 92 | page = alloc_pages(gfp, order); |
| 93 | if (!page) |
| 94 | return NULL; |
| 95 | |
| 96 | /* |
| 97 | * Now split the huge page and free the excess pages |
| 98 | */ |
| 99 | split_page(page, order); |
| 100 | for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++) |
| 101 | __free_page(p); |
| 102 | |
| 103 | /* |
| 104 | * Ensure that the allocated pages are zeroed, and that any data |
| 105 | * lurking in the kernel direct-mapped region is invalidated. |
| 106 | */ |
| 107 | ptr = page_address(page); |
| 108 | memset(ptr, 0, size); |
| 109 | dmac_flush_range(ptr, ptr + size); |
| 110 | outer_flush_range(__pa(ptr), __pa(ptr) + size); |
| 111 | |
| 112 | return page; |
| 113 | } |
| 114 | |
| 115 | /* |
| 116 | * Free a DMA buffer. 'size' must be page aligned. |
| 117 | */ |
| 118 | static void __dma_free_buffer(struct page *page, size_t size) |
| 119 | { |
| 120 | struct page *e = page + (size >> PAGE_SHIFT); |
| 121 | |
| 122 | while (page < e) { |
| 123 | __free_page(page); |
| 124 | page++; |
| 125 | } |
| 126 | } |
| 127 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 128 | #ifdef CONFIG_MMU |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | /* |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 130 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | */ |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 132 | static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 134 | #include "vmregion.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 136 | static struct arm_vmregion_head consistent_head = { |
| 137 | .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), |
| 139 | .vm_start = CONSISTENT_BASE, |
| 140 | .vm_end = CONSISTENT_END, |
| 141 | }; |
| 142 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | #ifdef CONFIG_HUGETLB_PAGE |
| 144 | #error ARM Coherent DMA allocator does not (yet) support huge TLB |
| 145 | #endif |
| 146 | |
| 147 | static void * |
Al Viro | f9e3214 | 2005-10-21 03:20:58 -0400 | [diff] [blame] | 148 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | pgprot_t prot) |
| 150 | { |
| 151 | struct page *page; |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 152 | struct arm_vmregion *c; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 154 | if (!consistent_pte[0]) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | printk(KERN_ERR "%s: not initialised\n", __func__); |
| 156 | dump_stack(); |
| 157 | return NULL; |
| 158 | } |
| 159 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | size = PAGE_ALIGN(size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | |
Russell King | 7a9a32a | 2009-11-19 15:31:07 +0000 | [diff] [blame^] | 162 | page = __dma_alloc_buffer(dev, size, gfp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | if (!page) |
| 164 | goto no_page; |
| 165 | |
| 166 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | * Allocate a virtual address in the consistent mapping region. |
| 168 | */ |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 169 | c = arm_vmregion_alloc(&consistent_head, size, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); |
| 171 | if (c) { |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 172 | pte_t *pte; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 173 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); |
| 174 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 176 | pte = consistent_pte[idx] + off; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | c->vm_pages = page; |
| 178 | |
| 179 | /* |
| 180 | * Set the "dma handle" |
| 181 | */ |
| 182 | *handle = page_to_dma(dev, page); |
| 183 | |
| 184 | do { |
| 185 | BUG_ON(!pte_none(*pte)); |
| 186 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | /* |
| 188 | * x86 does not mark the pages reserved... |
| 189 | */ |
| 190 | SetPageReserved(page); |
Russell King | ad1ae2f | 2006-12-13 14:34:43 +0000 | [diff] [blame] | 191 | set_pte_ext(pte, mk_pte(page, prot), 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | page++; |
| 193 | pte++; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 194 | off++; |
| 195 | if (off >= PTRS_PER_PTE) { |
| 196 | off = 0; |
| 197 | pte = consistent_pte[++idx]; |
| 198 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | } while (size -= PAGE_SIZE); |
| 200 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | return (void *)c->vm_start; |
| 202 | } |
| 203 | |
| 204 | if (page) |
Russell King | 7a9a32a | 2009-11-19 15:31:07 +0000 | [diff] [blame^] | 205 | __dma_free_buffer(page, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | no_page: |
| 207 | *handle = ~0; |
| 208 | return NULL; |
| 209 | } |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 210 | #else /* !CONFIG_MMU */ |
| 211 | static void * |
| 212 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, |
| 213 | pgprot_t prot) |
| 214 | { |
| 215 | void *virt; |
| 216 | u64 mask = get_coherent_dma_mask(dev); |
| 217 | |
| 218 | if (!mask) |
| 219 | goto error; |
| 220 | |
Russell King | c06e004 | 2009-10-25 22:36:10 +0000 | [diff] [blame] | 221 | if (mask < 0xffffffffULL) |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 222 | gfp |= GFP_DMA; |
| 223 | virt = kmalloc(size, gfp); |
| 224 | if (!virt) |
| 225 | goto error; |
| 226 | |
| 227 | *handle = virt_to_dma(dev, virt); |
| 228 | return virt; |
| 229 | |
| 230 | error: |
| 231 | *handle = ~0; |
| 232 | return NULL; |
| 233 | } |
| 234 | #endif /* CONFIG_MMU */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | |
| 236 | /* |
| 237 | * Allocate DMA-coherent memory space and return both the kernel remapped |
| 238 | * virtual and bus address for that space. |
| 239 | */ |
| 240 | void * |
Al Viro | f9e3214 | 2005-10-21 03:20:58 -0400 | [diff] [blame] | 241 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | { |
Dmitry Baryshkov | 1fe5326 | 2008-07-18 13:30:14 +0400 | [diff] [blame] | 243 | void *memory; |
| 244 | |
| 245 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) |
| 246 | return memory; |
| 247 | |
Lennert Buytenhek | 23759dc | 2006-04-02 00:07:39 +0100 | [diff] [blame] | 248 | if (arch_is_coherent()) { |
| 249 | void *virt; |
| 250 | |
| 251 | virt = kmalloc(size, gfp); |
| 252 | if (!virt) |
| 253 | return NULL; |
| 254 | *handle = virt_to_dma(dev, virt); |
| 255 | |
| 256 | return virt; |
| 257 | } |
| 258 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | return __dma_alloc(dev, size, handle, gfp, |
| 260 | pgprot_noncached(pgprot_kernel)); |
| 261 | } |
| 262 | EXPORT_SYMBOL(dma_alloc_coherent); |
| 263 | |
| 264 | /* |
| 265 | * Allocate a writecombining region, in much the same way as |
| 266 | * dma_alloc_coherent above. |
| 267 | */ |
| 268 | void * |
Al Viro | f9e3214 | 2005-10-21 03:20:58 -0400 | [diff] [blame] | 269 | dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | { |
| 271 | return __dma_alloc(dev, size, handle, gfp, |
| 272 | pgprot_writecombine(pgprot_kernel)); |
| 273 | } |
| 274 | EXPORT_SYMBOL(dma_alloc_writecombine); |
| 275 | |
| 276 | static int dma_mmap(struct device *dev, struct vm_area_struct *vma, |
| 277 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 278 | { |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 279 | int ret = -ENXIO; |
| 280 | #ifdef CONFIG_MMU |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 281 | unsigned long user_size, kern_size; |
| 282 | struct arm_vmregion *c; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | |
| 284 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; |
| 285 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 286 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | if (c) { |
| 288 | unsigned long off = vma->vm_pgoff; |
| 289 | |
| 290 | kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT; |
| 291 | |
| 292 | if (off < kern_size && |
| 293 | user_size <= (kern_size - off)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | ret = remap_pfn_range(vma, vma->vm_start, |
| 295 | page_to_pfn(c->vm_pages) + off, |
| 296 | user_size << PAGE_SHIFT, |
| 297 | vma->vm_page_prot); |
| 298 | } |
| 299 | } |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 300 | #endif /* CONFIG_MMU */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | |
| 302 | return ret; |
| 303 | } |
| 304 | |
| 305 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, |
| 306 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 307 | { |
| 308 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
| 309 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
| 310 | } |
| 311 | EXPORT_SYMBOL(dma_mmap_coherent); |
| 312 | |
| 313 | int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, |
| 314 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 315 | { |
| 316 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); |
| 317 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
| 318 | } |
| 319 | EXPORT_SYMBOL(dma_mmap_writecombine); |
| 320 | |
| 321 | /* |
| 322 | * free a page as defined by the above mapping. |
Russell King | 5edf71a | 2005-11-25 15:52:51 +0000 | [diff] [blame] | 323 | * Must not be called with IRQs disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | */ |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 325 | #ifdef CONFIG_MMU |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) |
| 327 | { |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 328 | struct arm_vmregion *c; |
| 329 | unsigned long addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | pte_t *ptep; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 331 | int idx; |
| 332 | u32 off; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | |
Russell King | 5edf71a | 2005-11-25 15:52:51 +0000 | [diff] [blame] | 334 | WARN_ON(irqs_disabled()); |
| 335 | |
Dmitry Baryshkov | 1fe5326 | 2008-07-18 13:30:14 +0400 | [diff] [blame] | 336 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
| 337 | return; |
| 338 | |
Lennert Buytenhek | 23759dc | 2006-04-02 00:07:39 +0100 | [diff] [blame] | 339 | if (arch_is_coherent()) { |
| 340 | kfree(cpu_addr); |
| 341 | return; |
| 342 | } |
| 343 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | size = PAGE_ALIGN(size); |
| 345 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 346 | c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | if (!c) |
| 348 | goto no_area; |
| 349 | |
| 350 | if ((c->vm_end - c->vm_start) != size) { |
| 351 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", |
| 352 | __func__, c->vm_end - c->vm_start, size); |
| 353 | dump_stack(); |
| 354 | size = c->vm_end - c->vm_start; |
| 355 | } |
| 356 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 357 | idx = CONSISTENT_PTE_INDEX(c->vm_start); |
| 358 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); |
| 359 | ptep = consistent_pte[idx] + off; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | addr = c->vm_start; |
| 361 | do { |
| 362 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); |
| 363 | unsigned long pfn; |
| 364 | |
| 365 | ptep++; |
| 366 | addr += PAGE_SIZE; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 367 | off++; |
| 368 | if (off >= PTRS_PER_PTE) { |
| 369 | off = 0; |
| 370 | ptep = consistent_pte[++idx]; |
| 371 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | |
| 373 | if (!pte_none(pte) && pte_present(pte)) { |
| 374 | pfn = pte_pfn(pte); |
| 375 | |
| 376 | if (pfn_valid(pfn)) { |
| 377 | struct page *page = pfn_to_page(pfn); |
| 378 | |
| 379 | /* |
| 380 | * x86 does not mark the pages reserved... |
| 381 | */ |
| 382 | ClearPageReserved(page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | continue; |
| 384 | } |
| 385 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | printk(KERN_CRIT "%s: bad page in kernel page table\n", |
| 387 | __func__); |
| 388 | } while (size -= PAGE_SIZE); |
| 389 | |
| 390 | flush_tlb_kernel_range(c->vm_start, c->vm_end); |
| 391 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 392 | arm_vmregion_free(&consistent_head, c); |
Russell King | 7a9a32a | 2009-11-19 15:31:07 +0000 | [diff] [blame^] | 393 | |
| 394 | __dma_free_buffer(dma_to_page(dev, handle), size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | return; |
| 396 | |
| 397 | no_area: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", |
| 399 | __func__, cpu_addr); |
| 400 | dump_stack(); |
| 401 | } |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 402 | #else /* !CONFIG_MMU */ |
| 403 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) |
| 404 | { |
| 405 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
| 406 | return; |
| 407 | kfree(cpu_addr); |
| 408 | } |
| 409 | #endif /* CONFIG_MMU */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | EXPORT_SYMBOL(dma_free_coherent); |
| 411 | |
| 412 | /* |
| 413 | * Initialise the consistent memory allocation. |
| 414 | */ |
| 415 | static int __init consistent_init(void) |
| 416 | { |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 417 | int ret = 0; |
| 418 | #ifdef CONFIG_MMU |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 419 | pgd_t *pgd; |
| 420 | pmd_t *pmd; |
| 421 | pte_t *pte; |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 422 | int i = 0; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 423 | u32 base = CONSISTENT_BASE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 424 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | do { |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 426 | pgd = pgd_offset(&init_mm, base); |
| 427 | pmd = pmd_alloc(&init_mm, pgd, base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | if (!pmd) { |
| 429 | printk(KERN_ERR "%s: no pmd tables\n", __func__); |
| 430 | ret = -ENOMEM; |
| 431 | break; |
| 432 | } |
| 433 | WARN_ON(!pmd_none(*pmd)); |
| 434 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 435 | pte = pte_alloc_kernel(pmd, base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | if (!pte) { |
| 437 | printk(KERN_ERR "%s: no pte tables\n", __func__); |
| 438 | ret = -ENOMEM; |
| 439 | break; |
| 440 | } |
| 441 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 442 | consistent_pte[i++] = pte; |
| 443 | base += (1 << PGDIR_SHIFT); |
| 444 | } while (base < CONSISTENT_END); |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 445 | #endif /* !CONFIG_MMU */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | return ret; |
| 448 | } |
| 449 | |
| 450 | core_initcall(consistent_init); |
| 451 | |
| 452 | /* |
| 453 | * Make an area consistent for devices. |
Dan Williams | 105ef9a | 2006-11-21 22:57:23 +0100 | [diff] [blame] | 454 | * Note: Drivers should NOT use this function directly, as it will break |
| 455 | * platforms with CONFIG_DMABOUNCE. |
| 456 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | */ |
Russell King | 84aa462 | 2007-10-09 14:17:01 +0100 | [diff] [blame] | 458 | void dma_cache_maint(const void *start, size_t size, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 459 | { |
Russell King | 1522ac3 | 2009-03-12 17:03:48 +0000 | [diff] [blame] | 460 | void (*inner_op)(const void *, const void *); |
| 461 | void (*outer_op)(unsigned long, unsigned long); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | |
Russell King | 1522ac3 | 2009-03-12 17:03:48 +0000 | [diff] [blame] | 463 | BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(start + size - 1)); |
Catalin Marinas | 953233d | 2007-02-05 14:48:08 +0100 | [diff] [blame] | 464 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | switch (direction) { |
| 466 | case DMA_FROM_DEVICE: /* invalidate only */ |
Russell King | 1522ac3 | 2009-03-12 17:03:48 +0000 | [diff] [blame] | 467 | inner_op = dmac_inv_range; |
| 468 | outer_op = outer_inv_range; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | break; |
| 470 | case DMA_TO_DEVICE: /* writeback only */ |
Russell King | 1522ac3 | 2009-03-12 17:03:48 +0000 | [diff] [blame] | 471 | inner_op = dmac_clean_range; |
| 472 | outer_op = outer_clean_range; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | break; |
| 474 | case DMA_BIDIRECTIONAL: /* writeback and invalidate */ |
Russell King | 1522ac3 | 2009-03-12 17:03:48 +0000 | [diff] [blame] | 475 | inner_op = dmac_flush_range; |
| 476 | outer_op = outer_flush_range; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | break; |
| 478 | default: |
| 479 | BUG(); |
| 480 | } |
Russell King | 1522ac3 | 2009-03-12 17:03:48 +0000 | [diff] [blame] | 481 | |
| 482 | inner_op(start, start + size); |
| 483 | outer_op(__pa(start), __pa(start) + size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | } |
Russell King | 84aa462 | 2007-10-09 14:17:01 +0100 | [diff] [blame] | 485 | EXPORT_SYMBOL(dma_cache_maint); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 486 | |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 487 | static void dma_cache_maint_contiguous(struct page *page, unsigned long offset, |
| 488 | size_t size, int direction) |
| 489 | { |
| 490 | void *vaddr; |
| 491 | unsigned long paddr; |
| 492 | void (*inner_op)(const void *, const void *); |
| 493 | void (*outer_op)(unsigned long, unsigned long); |
| 494 | |
| 495 | switch (direction) { |
| 496 | case DMA_FROM_DEVICE: /* invalidate only */ |
| 497 | inner_op = dmac_inv_range; |
| 498 | outer_op = outer_inv_range; |
| 499 | break; |
| 500 | case DMA_TO_DEVICE: /* writeback only */ |
| 501 | inner_op = dmac_clean_range; |
| 502 | outer_op = outer_clean_range; |
| 503 | break; |
| 504 | case DMA_BIDIRECTIONAL: /* writeback and invalidate */ |
| 505 | inner_op = dmac_flush_range; |
| 506 | outer_op = outer_flush_range; |
| 507 | break; |
| 508 | default: |
| 509 | BUG(); |
| 510 | } |
| 511 | |
| 512 | if (!PageHighMem(page)) { |
| 513 | vaddr = page_address(page) + offset; |
| 514 | inner_op(vaddr, vaddr + size); |
| 515 | } else { |
| 516 | vaddr = kmap_high_get(page); |
| 517 | if (vaddr) { |
| 518 | vaddr += offset; |
| 519 | inner_op(vaddr, vaddr + size); |
| 520 | kunmap_high(page); |
| 521 | } |
| 522 | } |
| 523 | |
| 524 | paddr = page_to_phys(page) + offset; |
| 525 | outer_op(paddr, paddr + size); |
| 526 | } |
| 527 | |
| 528 | void dma_cache_maint_page(struct page *page, unsigned long offset, |
| 529 | size_t size, int dir) |
| 530 | { |
| 531 | /* |
| 532 | * A single sg entry may refer to multiple physically contiguous |
| 533 | * pages. But we still need to process highmem pages individually. |
| 534 | * If highmem is not configured then the bulk of this loop gets |
| 535 | * optimized out. |
| 536 | */ |
| 537 | size_t left = size; |
| 538 | do { |
| 539 | size_t len = left; |
| 540 | if (PageHighMem(page) && len + offset > PAGE_SIZE) { |
| 541 | if (offset >= PAGE_SIZE) { |
| 542 | page += offset / PAGE_SIZE; |
| 543 | offset %= PAGE_SIZE; |
| 544 | } |
| 545 | len = PAGE_SIZE - offset; |
| 546 | } |
| 547 | dma_cache_maint_contiguous(page, offset, len, dir); |
| 548 | offset = 0; |
| 549 | page++; |
| 550 | left -= len; |
| 551 | } while (left); |
| 552 | } |
| 553 | EXPORT_SYMBOL(dma_cache_maint_page); |
| 554 | |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 555 | /** |
| 556 | * dma_map_sg - map a set of SG buffers for streaming mode DMA |
| 557 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 558 | * @sg: list of buffers |
| 559 | * @nents: number of buffers to map |
| 560 | * @dir: DMA transfer direction |
| 561 | * |
| 562 | * Map a set of buffers described by scatterlist in streaming mode for DMA. |
| 563 | * This is the scatter-gather version of the dma_map_single interface. |
| 564 | * Here the scatter gather list elements are each tagged with the |
| 565 | * appropriate dma address and length. They are obtained via |
| 566 | * sg_dma_{address,length}. |
| 567 | * |
| 568 | * Device ownership issues as mentioned for dma_map_single are the same |
| 569 | * here. |
| 570 | */ |
| 571 | int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
| 572 | enum dma_data_direction dir) |
| 573 | { |
| 574 | struct scatterlist *s; |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 575 | int i, j; |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 576 | |
| 577 | for_each_sg(sg, s, nents, i) { |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 578 | s->dma_address = dma_map_page(dev, sg_page(s), s->offset, |
| 579 | s->length, dir); |
| 580 | if (dma_mapping_error(dev, s->dma_address)) |
| 581 | goto bad_mapping; |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 582 | } |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 583 | return nents; |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 584 | |
| 585 | bad_mapping: |
| 586 | for_each_sg(sg, s, i, j) |
| 587 | dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); |
| 588 | return 0; |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 589 | } |
| 590 | EXPORT_SYMBOL(dma_map_sg); |
| 591 | |
| 592 | /** |
| 593 | * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg |
| 594 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 595 | * @sg: list of buffers |
| 596 | * @nents: number of buffers to unmap (returned from dma_map_sg) |
| 597 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
| 598 | * |
| 599 | * Unmap a set of streaming mode DMA translations. Again, CPU access |
| 600 | * rules concerning calls here are the same as for dma_unmap_single(). |
| 601 | */ |
| 602 | void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, |
| 603 | enum dma_data_direction dir) |
| 604 | { |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 605 | struct scatterlist *s; |
| 606 | int i; |
| 607 | |
| 608 | for_each_sg(sg, s, nents, i) |
| 609 | dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 610 | } |
| 611 | EXPORT_SYMBOL(dma_unmap_sg); |
| 612 | |
| 613 | /** |
| 614 | * dma_sync_sg_for_cpu |
| 615 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 616 | * @sg: list of buffers |
| 617 | * @nents: number of buffers to map (returned from dma_map_sg) |
| 618 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
| 619 | */ |
| 620 | void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
| 621 | int nents, enum dma_data_direction dir) |
| 622 | { |
| 623 | struct scatterlist *s; |
| 624 | int i; |
| 625 | |
| 626 | for_each_sg(sg, s, nents, i) { |
Russell King | 309dbba | 2008-09-29 19:50:59 +0100 | [diff] [blame] | 627 | dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0, |
| 628 | sg_dma_len(s), dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 629 | } |
| 630 | } |
| 631 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); |
| 632 | |
| 633 | /** |
| 634 | * dma_sync_sg_for_device |
| 635 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 636 | * @sg: list of buffers |
| 637 | * @nents: number of buffers to map (returned from dma_map_sg) |
| 638 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
| 639 | */ |
| 640 | void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
| 641 | int nents, enum dma_data_direction dir) |
| 642 | { |
| 643 | struct scatterlist *s; |
| 644 | int i; |
| 645 | |
| 646 | for_each_sg(sg, s, nents, i) { |
Russell King | 2638b4d | 2008-09-25 21:38:41 +0100 | [diff] [blame] | 647 | if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0, |
| 648 | sg_dma_len(s), dir)) |
| 649 | continue; |
| 650 | |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 651 | if (!arch_is_coherent()) |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 652 | dma_cache_maint_page(sg_page(s), s->offset, |
| 653 | s->length, dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 654 | } |
| 655 | } |
| 656 | EXPORT_SYMBOL(dma_sync_sg_for_device); |