blob: 548cc1e4114bb81af0136cf77d517b4e751c6736 [file] [log] [blame]
Jeeja KP0b00a562015-06-11 14:11:48 +05301/*
2 * hdac-ext-controller.c - HD-audio extended controller functions.
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/delay.h>
21#include <linux/slab.h>
22#include <sound/hda_register.h>
23#include <sound/hdaudio_ext.h>
24
25/*
26 * maximum HDAC capablities we should parse to avoid endless looping:
27 * currently we have 4 extended caps, so this is future proof for now.
28 * extend when this limit is seen meeting in real HW
29 */
30#define HDAC_MAX_CAPS 10
31
32/**
33 * snd_hdac_ext_bus_parse_capabilities - parse capablity structure
34 * @ebus: the pointer to extended bus object
35 *
36 * Returns 0 if successful, or a negative error code.
37 */
38int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus)
39{
40 unsigned int cur_cap;
41 unsigned int offset;
42 struct hdac_bus *bus = &ebus->bus;
43 unsigned int counter = 0;
44
45 offset = snd_hdac_chip_readl(bus, LLCH);
46
Jeeja KP0b00a562015-06-11 14:11:48 +053047 /* Lets walk the linked capabilities list */
48 do {
49 cur_cap = _snd_hdac_chip_read(l, bus, offset);
50
Jeeja KP0b00a562015-06-11 14:11:48 +053051 dev_dbg(bus->dev, "Capability version: 0x%x\n",
52 ((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF));
53
54 dev_dbg(bus->dev, "HDA capability ID: 0x%x\n",
55 (cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF);
56
57 switch ((cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF) {
58 case AZX_ML_CAP_ID:
59 dev_dbg(bus->dev, "Found ML capability\n");
60 ebus->mlcap = bus->remap_addr + offset;
61 break;
62
63 case AZX_GTS_CAP_ID:
64 dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset);
65 ebus->gtscap = bus->remap_addr + offset;
66 break;
67
68 case AZX_PP_CAP_ID:
69 /* PP capability found, the Audio DSP is present */
70 dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset);
71 ebus->ppcap = bus->remap_addr + offset;
72 break;
73
74 case AZX_SPB_CAP_ID:
75 /* SPIB capability found, handler function */
76 dev_dbg(bus->dev, "Found SPB capability\n");
77 ebus->spbcap = bus->remap_addr + offset;
78 break;
79
Jeeja KPa9c48f72015-12-18 15:11:59 +053080 case AZX_DRSM_CAP_ID:
81 /* DMA resume capability found, handler function */
82 dev_dbg(bus->dev, "Found DRSM capability\n");
83 ebus->drsmcap = bus->remap_addr + offset;
84 break;
85
Jeeja KP0b00a562015-06-11 14:11:48 +053086 default:
87 dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap);
88 break;
89 }
90
91 counter++;
92
93 if (counter > HDAC_MAX_CAPS) {
94 dev_err(bus->dev, "We exceeded HDAC Ext capablities!!!\n");
95 break;
96 }
97
98 /* read the offset of next capabiity */
99 offset = cur_cap & AZX_CAP_HDR_NXT_PTR_MASK;
100
101 } while (offset);
102
103 return 0;
104}
105EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_parse_capabilities);
106
107/*
108 * processing pipe helpers - these helpers are useful for dealing with HDA
109 * new capability of processing pipelines
110 */
111
112/**
113 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
114 * @ebus: HD-audio extended core bus
115 * @enable: flag to turn on/off the capability
116 */
117void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable)
118{
119 struct hdac_bus *bus = &ebus->bus;
120
121 if (!ebus->ppcap) {
122 dev_err(bus->dev, "Address of PP capability is NULL");
123 return;
124 }
125
126 if (enable)
127 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
128 else
129 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
130}
131EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
132
133/**
134 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
135 * @ebus: HD-audio extended core bus
136 * @enable: flag to enable/disable interrupt
137 */
138void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable)
139{
140 struct hdac_bus *bus = &ebus->bus;
141
142 if (!ebus->ppcap) {
143 dev_err(bus->dev, "Address of PP capability is NULL\n");
144 return;
145 }
146
147 if (enable)
148 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
149 else
150 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
151}
152EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
153
154/*
155 * Multilink helpers - these helpers are useful for dealing with HDA
156 * new multilink capability
157 */
158
159/**
160 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
161 * @ebus: HD-audio extended core bus
162 *
163 * This will parse all links and read the mlink capabilities and add them
164 * in hlink_list of extended hdac bus
165 * Note: this will be freed on bus exit by driver
166 */
167int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
168{
169 int idx;
170 u32 link_count;
171 struct hdac_ext_link *hlink;
172 struct hdac_bus *bus = &ebus->bus;
173
174 link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1;
175
176 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
177
178 for (idx = 0; idx < link_count; idx++) {
179 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
180 if (!hlink)
181 return -ENOMEM;
182 hlink->index = idx;
183 hlink->bus = bus;
184 hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
185 (AZX_ML_INTERVAL * idx);
Jeeja KPa7e3dd82015-08-21 21:36:17 +0530186 hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
187 hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
Jeeja KP0b00a562015-06-11 14:11:48 +0530188
189 list_add_tail(&hlink->list, &ebus->hlink_list);
190 }
191
192 return 0;
193}
194EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
195
196/**
Vinod Koulbab44452015-06-17 11:20:17 +0530197 * snd_hdac_link_free_all- free hdac extended link objects
198 *
199 * @ebus: HD-audio ext core bus
200 */
201
202void snd_hdac_link_free_all(struct hdac_ext_bus *ebus)
203{
204 struct hdac_ext_link *l;
205
206 while (!list_empty(&ebus->hlink_list)) {
207 l = list_first_entry(&ebus->hlink_list, struct hdac_ext_link, list);
208 list_del(&l->list);
209 kfree(l);
210 }
211}
212EXPORT_SYMBOL_GPL(snd_hdac_link_free_all);
213
214/**
Jeeja KP0b00a562015-06-11 14:11:48 +0530215 * snd_hdac_ext_bus_get_link_index - get link based on codec name
216 * @ebus: HD-audio extended core bus
217 * @codec_name: codec name
218 */
219struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_ext_bus *ebus,
220 const char *codec_name)
221{
222 int i;
223 struct hdac_ext_link *hlink = NULL;
224 int bus_idx, addr;
225
226 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
227 return NULL;
228 if (ebus->idx != bus_idx)
229 return NULL;
230
231 list_for_each_entry(hlink, &ebus->hlink_list, list) {
232 for (i = 0; i < HDA_MAX_CODECS; i++) {
233 if (hlink->lsdiid & (0x1 << addr))
234 return hlink;
235 }
236 }
237
238 return NULL;
239}
240EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
241
242static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
243{
244 int timeout;
245 u32 val;
246 int mask = (1 << AZX_MLCTL_CPA);
247
248 udelay(3);
Jayachandran Bcf8fe582015-12-18 15:12:01 +0530249 timeout = 150;
Jeeja KP0b00a562015-06-11 14:11:48 +0530250
251 do {
Jeeja KPa7e3dd82015-08-21 21:36:17 +0530252 val = readl(link->ml_addr + AZX_REG_ML_LCTL);
Jeeja KP0b00a562015-06-11 14:11:48 +0530253 if (enable) {
254 if (((val & mask) >> AZX_MLCTL_CPA))
255 return 0;
256 } else {
257 if (!((val & mask) >> AZX_MLCTL_CPA))
258 return 0;
259 }
260 udelay(3);
261 } while (--timeout);
262
263 return -EIO;
264}
265
266/**
267 * snd_hdac_ext_bus_link_power_up -power up hda link
268 * @link: HD-audio extended link
269 */
270int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
271{
Jeeja KPa7e3dd82015-08-21 21:36:17 +0530272 snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
Jeeja KP0b00a562015-06-11 14:11:48 +0530273
274 return check_hdac_link_power_active(link, true);
275}
276EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
277
278/**
279 * snd_hdac_ext_bus_link_power_down -power down hda link
280 * @link: HD-audio extended link
281 */
282int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
283{
Jeeja KPa7e3dd82015-08-21 21:36:17 +0530284 snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
Jeeja KP0b00a562015-06-11 14:11:48 +0530285
286 return check_hdac_link_power_active(link, false);
287}
288EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
Jeeja KPc5b0c092015-08-21 21:36:18 +0530289
290/**
Vinod Koul6706a192015-12-18 15:12:02 +0530291 * snd_hdac_ext_bus_link_power_up_all -power up all hda link
292 * @ebus: HD-audio extended bus
293 */
294int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus)
295{
296 struct hdac_ext_link *hlink = NULL;
297 int ret;
298
299 list_for_each_entry(hlink, &ebus->hlink_list, list) {
300 snd_hdac_updatel(hlink->ml_addr,
301 AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
302 ret = check_hdac_link_power_active(hlink, true);
303 if (ret < 0)
304 return ret;
305 }
306
307 return 0;
308}
309EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
310
311/**
Jeeja KPc5b0c092015-08-21 21:36:18 +0530312 * snd_hdac_ext_bus_link_power_down_all -power down all hda link
313 * @ebus: HD-audio extended bus
314 */
315int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus)
316{
317 struct hdac_ext_link *hlink = NULL;
318 int ret;
319
320 list_for_each_entry(hlink, &ebus->hlink_list, list) {
321 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
322 ret = check_hdac_link_power_active(hlink, false);
323 if (ret < 0)
324 return ret;
325 }
326
327 return 0;
328}
329EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);