Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 1 | /* |
Lennert Buytenhek | 076d3e1 | 2009-03-20 09:50:39 +0000 | [diff] [blame] | 2 | * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support |
| 3 | * Copyright (c) 2008-2009 Marvell Semiconductor |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | */ |
| 10 | |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 11 | #include <linux/delay.h> |
| 12 | #include <linux/jiffies.h> |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 13 | #include <linux/list.h> |
Paul Gortmaker | 2bbba27 | 2012-01-24 10:41:40 +0000 | [diff] [blame] | 14 | #include <linux/module.h> |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 15 | #include <linux/netdevice.h> |
| 16 | #include <linux/phy.h> |
Ben Hutchings | c8f0b86 | 2011-11-27 17:06:08 +0000 | [diff] [blame] | 17 | #include <net/dsa.h> |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 18 | #include "mv88e6xxx.h" |
| 19 | |
Vivien Didelot | b9b3771 | 2015-10-30 19:39:48 -0400 | [diff] [blame] | 20 | static const struct mv88e6xxx_switch_id mv88e6131_table[] = { |
| 21 | { PORT_SWITCH_ID_6085, "Marvell 88E6085" }, |
| 22 | { PORT_SWITCH_ID_6095, "Marvell 88E6095/88E6095F" }, |
| 23 | { PORT_SWITCH_ID_6131, "Marvell 88E6131" }, |
| 24 | { PORT_SWITCH_ID_6131_B2, "Marvell 88E6131 (B2)" }, |
| 25 | { PORT_SWITCH_ID_6185, "Marvell 88E6185" }, |
| 26 | }; |
| 27 | |
Alexander Duyck | b4d2394 | 2014-09-15 13:00:27 -0400 | [diff] [blame] | 28 | static char *mv88e6131_probe(struct device *host_dev, int sw_addr) |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 29 | { |
Vivien Didelot | b9b3771 | 2015-10-30 19:39:48 -0400 | [diff] [blame] | 30 | return mv88e6xxx_lookup_name(host_dev, sw_addr, mv88e6131_table, |
| 31 | ARRAY_SIZE(mv88e6131_table)); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 32 | } |
| 33 | |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 34 | static int mv88e6131_setup_global(struct dsa_switch *ds) |
| 35 | { |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 36 | u32 upstream_port = dsa_upstream_port(ds); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 37 | int ret; |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 38 | u32 reg; |
Andrew Lunn | 54d792f | 2015-05-06 01:09:47 +0200 | [diff] [blame] | 39 | |
| 40 | ret = mv88e6xxx_setup_global(ds); |
| 41 | if (ret) |
| 42 | return ret; |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 43 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 44 | /* Enable the PHY polling unit, don't discard packets with |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 45 | * excessive collisions, use a weighted fair queueing scheme |
| 46 | * to arbitrate between packet queues, set the maximum frame |
| 47 | * size to 1632, and mask all interrupt sources. |
| 48 | */ |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 49 | REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, |
| 50 | GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_MAX_FRAME_1632); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 51 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 52 | /* Set the VLAN ethertype to 0x8100. */ |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 53 | REG_WRITE(REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 54 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 55 | /* Disable ARP mirroring, and configure the upstream port as |
Lennert Buytenhek | e84665c | 2009-03-20 09:52:09 +0000 | [diff] [blame] | 56 | * the port to which ingress and egress monitor frames are to |
| 57 | * be sent. |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 58 | */ |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 59 | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | |
| 60 | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | |
| 61 | GLOBAL_MONITOR_CONTROL_ARP_DISABLED; |
| 62 | REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 63 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 64 | /* Disable cascade port functionality unless this device |
Barry Grussling | 81399ec | 2011-06-24 19:53:51 +0000 | [diff] [blame] | 65 | * is used in a cascade configuration, and set the switch's |
Lennert Buytenhek | e84665c | 2009-03-20 09:52:09 +0000 | [diff] [blame] | 66 | * DSA device number. |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 67 | */ |
Barry Grussling | 81399ec | 2011-06-24 19:53:51 +0000 | [diff] [blame] | 68 | if (ds->dst->pd->nr_chips > 1) |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 69 | REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, |
| 70 | GLOBAL_CONTROL_2_MULTIPLE_CASCADE | |
| 71 | (ds->index & 0x1f)); |
Barry Grussling | 81399ec | 2011-06-24 19:53:51 +0000 | [diff] [blame] | 72 | else |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 73 | REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, |
| 74 | GLOBAL_CONTROL_2_NO_CASCADE | |
| 75 | (ds->index & 0x1f)); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 76 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 77 | /* Force the priority of IGMP/MLD snoop frames and ARP frames |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 78 | * to the highest setting. |
| 79 | */ |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 80 | REG_WRITE(REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE, |
| 81 | GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP | |
| 82 | 7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT | |
| 83 | GLOBAL2_PRIO_OVERRIDE_FORCE_ARP | |
| 84 | 7 << GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 85 | |
| 86 | return 0; |
| 87 | } |
| 88 | |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 89 | static int mv88e6131_setup(struct dsa_switch *ds) |
| 90 | { |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 91 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 92 | int ret; |
| 93 | |
Guenter Roeck | 0d65da4 | 2015-04-02 04:06:29 +0200 | [diff] [blame] | 94 | ret = mv88e6xxx_setup_common(ds); |
| 95 | if (ret < 0) |
| 96 | return ret; |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 97 | |
Guenter Roeck | 0d65da4 | 2015-04-02 04:06:29 +0200 | [diff] [blame] | 98 | mv88e6xxx_ppu_state_init(ds); |
Peter Korsgaard | ec80bfc | 2011-04-05 03:03:56 +0000 | [diff] [blame] | 99 | |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 100 | switch (ps->id) { |
Andrew Lunn | cca8b13 | 2015-04-02 04:06:39 +0200 | [diff] [blame] | 101 | case PORT_SWITCH_ID_6085: |
Andrew Lunn | 1441f4e | 2015-05-06 01:09:52 +0200 | [diff] [blame] | 102 | case PORT_SWITCH_ID_6185: |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 103 | ps->num_ports = 10; |
| 104 | break; |
Andrew Lunn | cca8b13 | 2015-04-02 04:06:39 +0200 | [diff] [blame] | 105 | case PORT_SWITCH_ID_6095: |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 106 | ps->num_ports = 11; |
| 107 | break; |
Andrew Lunn | cca8b13 | 2015-04-02 04:06:39 +0200 | [diff] [blame] | 108 | case PORT_SWITCH_ID_6131: |
| 109 | case PORT_SWITCH_ID_6131_B2: |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 110 | ps->num_ports = 8; |
| 111 | break; |
| 112 | default: |
| 113 | return -ENODEV; |
| 114 | } |
| 115 | |
Andrew Lunn | 143a830 | 2015-04-02 04:06:34 +0200 | [diff] [blame] | 116 | ret = mv88e6xxx_switch_reset(ds, false); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 117 | if (ret < 0) |
| 118 | return ret; |
| 119 | |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 120 | ret = mv88e6131_setup_global(ds); |
| 121 | if (ret < 0) |
| 122 | return ret; |
| 123 | |
Andrew Lunn | dbde9e6 | 2015-05-06 01:09:48 +0200 | [diff] [blame] | 124 | return mv88e6xxx_setup_ports(ds); |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 125 | } |
| 126 | |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 127 | static int mv88e6131_port_to_phy_addr(struct dsa_switch *ds, int port) |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 128 | { |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 129 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 130 | |
| 131 | if (port >= 0 && port < ps->num_ports) |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 132 | return port; |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 133 | |
| 134 | return -EINVAL; |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | static int |
| 138 | mv88e6131_phy_read(struct dsa_switch *ds, int port, int regnum) |
| 139 | { |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 140 | int addr = mv88e6131_port_to_phy_addr(ds, port); |
| 141 | |
| 142 | if (addr < 0) |
| 143 | return addr; |
| 144 | |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 145 | return mv88e6xxx_phy_read_ppu(ds, addr, regnum); |
| 146 | } |
| 147 | |
| 148 | static int |
| 149 | mv88e6131_phy_write(struct dsa_switch *ds, |
| 150 | int port, int regnum, u16 val) |
| 151 | { |
Guenter Roeck | d198893 | 2015-04-02 04:06:31 +0200 | [diff] [blame] | 152 | int addr = mv88e6131_port_to_phy_addr(ds, port); |
| 153 | |
| 154 | if (addr < 0) |
| 155 | return addr; |
| 156 | |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 157 | return mv88e6xxx_phy_write_ppu(ds, addr, regnum, val); |
| 158 | } |
| 159 | |
Ben Hutchings | 98e6730 | 2011-11-25 14:36:19 +0000 | [diff] [blame] | 160 | struct dsa_switch_driver mv88e6131_switch_driver = { |
Florian Fainelli | ac7a04c | 2014-09-11 21:18:09 -0700 | [diff] [blame] | 161 | .tag_protocol = DSA_TAG_PROTO_DSA, |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 162 | .priv_size = sizeof(struct mv88e6xxx_priv_state), |
| 163 | .probe = mv88e6131_probe, |
| 164 | .setup = mv88e6131_setup, |
| 165 | .set_addr = mv88e6xxx_set_addr_direct, |
| 166 | .phy_read = mv88e6131_phy_read, |
| 167 | .phy_write = mv88e6131_phy_write, |
Andrew Lunn | e413e7e | 2015-04-02 04:06:38 +0200 | [diff] [blame] | 168 | .get_strings = mv88e6xxx_get_strings, |
| 169 | .get_ethtool_stats = mv88e6xxx_get_ethtool_stats, |
| 170 | .get_sset_count = mv88e6xxx_get_sset_count, |
Andrew Lunn | dea8702 | 2015-08-31 15:56:47 +0200 | [diff] [blame] | 171 | .adjust_link = mv88e6xxx_adjust_link, |
Lennert Buytenhek | 2e5f032 | 2008-10-07 13:45:18 +0000 | [diff] [blame] | 172 | }; |
Ben Hutchings | 3d825ed | 2011-11-25 14:37:16 +0000 | [diff] [blame] | 173 | |
| 174 | MODULE_ALIAS("platform:mv88e6085"); |
| 175 | MODULE_ALIAS("platform:mv88e6095"); |
| 176 | MODULE_ALIAS("platform:mv88e6095f"); |
| 177 | MODULE_ALIAS("platform:mv88e6131"); |