Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 1 | /* |
Len Brown | 9e0cae9 | 2016-06-17 01:22:46 -0400 | [diff] [blame] | 2 | * tsc_msr.c - TSC frequency enumeration via MSR |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2013 Intel Corporation |
| 5 | * Author: Bin Gao <bin.gao@intel.com> |
| 6 | * |
| 7 | * This file is released under the GPLv2. |
| 8 | */ |
| 9 | |
| 10 | #include <linux/kernel.h> |
| 11 | #include <asm/processor.h> |
| 12 | #include <asm/setup.h> |
| 13 | #include <asm/apic.h> |
| 14 | #include <asm/param.h> |
Andy Shevchenko | 67d0b2f | 2018-06-29 22:31:10 +0300 | [diff] [blame] | 15 | #include <asm/tsc.h> |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 16 | |
Len Brown | 6fcb41c | 2016-06-17 01:22:48 -0400 | [diff] [blame] | 17 | #define MAX_NUM_FREQS 9 |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 18 | |
| 19 | /* |
Len Brown | 9e0cae9 | 2016-06-17 01:22:46 -0400 | [diff] [blame] | 20 | * If MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 21 | * read in MSR_PLATFORM_ID[12:8], otherwise in MSR_PERF_STAT[44:40]. |
| 22 | * Unfortunately some Intel Atom SoCs aren't quite compliant to this, |
| 23 | * so we need manually differentiate SoC families. This is what the |
| 24 | * field msr_plat does. |
| 25 | */ |
| 26 | struct freq_desc { |
| 27 | u8 x86_family; /* CPU family */ |
| 28 | u8 x86_model; /* model */ |
| 29 | u8 msr_plat; /* 1: use MSR_PLATFORM_INFO, 0: MSR_IA32_PERF_STATUS */ |
| 30 | u32 freqs[MAX_NUM_FREQS]; |
| 31 | }; |
| 32 | |
| 33 | static struct freq_desc freq_desc_tables[] = { |
| 34 | /* PNW */ |
Len Brown | 9e0cae9 | 2016-06-17 01:22:46 -0400 | [diff] [blame] | 35 | { 6, 0x27, 0, { 0, 0, 0, 0, 0, 99840, 0, 83200 } }, |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 36 | /* CLV+ */ |
Len Brown | 9e0cae9 | 2016-06-17 01:22:46 -0400 | [diff] [blame] | 37 | { 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } }, |
| 38 | /* TNG - Intel Atom processor Z3400 series */ |
Len Brown | 05680e7 | 2016-06-17 01:22:47 -0400 | [diff] [blame] | 39 | { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } }, |
Len Brown | 9e0cae9 | 2016-06-17 01:22:46 -0400 | [diff] [blame] | 40 | /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */ |
Len Brown | 05680e7 | 2016-06-17 01:22:47 -0400 | [diff] [blame] | 41 | { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } }, |
Len Brown | 9e0cae9 | 2016-06-17 01:22:46 -0400 | [diff] [blame] | 42 | /* ANN - Intel Atom processor Z3500 series */ |
Len Brown | 05680e7 | 2016-06-17 01:22:47 -0400 | [diff] [blame] | 43 | { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } }, |
Len Brown | 6fcb41c | 2016-06-17 01:22:48 -0400 | [diff] [blame] | 44 | /* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */ |
| 45 | { 6, 0x4c, 1, { 83300, 100000, 133300, 116700, |
| 46 | 80000, 93300, 90000, 88900, 87500 } }, |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 47 | }; |
| 48 | |
| 49 | static int match_cpu(u8 family, u8 model) |
| 50 | { |
| 51 | int i; |
| 52 | |
| 53 | for (i = 0; i < ARRAY_SIZE(freq_desc_tables); i++) { |
| 54 | if ((family == freq_desc_tables[i].x86_family) && |
| 55 | (model == freq_desc_tables[i].x86_model)) |
| 56 | return i; |
| 57 | } |
| 58 | |
| 59 | return -1; |
| 60 | } |
| 61 | |
| 62 | /* Map CPU reference clock freq ID(0-7) to CPU reference clock freq(KHz) */ |
| 63 | #define id_to_freq(cpu_index, freq_id) \ |
| 64 | (freq_desc_tables[cpu_index].freqs[freq_id]) |
| 65 | |
| 66 | /* |
Len Brown | 14bb4e3 | 2016-06-17 01:22:45 -0400 | [diff] [blame] | 67 | * MSR-based CPU/TSC frequency discovery for certain CPUs. |
Thomas Gleixner | 5f0e030 | 2014-02-19 13:52:29 +0200 | [diff] [blame] | 68 | * |
Len Brown | 14bb4e3 | 2016-06-17 01:22:45 -0400 | [diff] [blame] | 69 | * Set global "lapic_timer_frequency" to bus_clock_cycles/jiffy |
| 70 | * Return processor base frequency in KHz, or 0 on failure. |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 71 | */ |
Len Brown | 02c0cd2 | 2016-06-17 01:22:50 -0400 | [diff] [blame] | 72 | unsigned long cpu_khz_from_msr(void) |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 73 | { |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 74 | u32 lo, hi, ratio, freq_id, freq; |
Thomas Gleixner | 5f0e030 | 2014-02-19 13:52:29 +0200 | [diff] [blame] | 75 | unsigned long res; |
| 76 | int cpu_index; |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 77 | |
Len Brown | ba82683 | 2016-06-17 01:22:44 -0400 | [diff] [blame] | 78 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) |
| 79 | return 0; |
| 80 | |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 81 | cpu_index = match_cpu(boot_cpu_data.x86, boot_cpu_data.x86_model); |
| 82 | if (cpu_index < 0) |
Thomas Gleixner | 5f0e030 | 2014-02-19 13:52:29 +0200 | [diff] [blame] | 83 | return 0; |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 84 | |
| 85 | if (freq_desc_tables[cpu_index].msr_plat) { |
| 86 | rdmsr(MSR_PLATFORM_INFO, lo, hi); |
Chen Yu | 886123f | 2016-05-06 11:33:39 +0800 | [diff] [blame] | 87 | ratio = (lo >> 8) & 0xff; |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 88 | } else { |
| 89 | rdmsr(MSR_IA32_PERF_STATUS, lo, hi); |
| 90 | ratio = (hi >> 8) & 0x1f; |
| 91 | } |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 92 | |
| 93 | /* Get FSB FREQ ID */ |
| 94 | rdmsr(MSR_FSB_FREQ, lo, hi); |
| 95 | freq_id = lo & 0x7; |
| 96 | freq = id_to_freq(cpu_index, freq_id); |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 97 | |
| 98 | /* TSC frequency = maximum resolved freq * maximum resolved bus ratio */ |
Thomas Gleixner | 5f0e030 | 2014-02-19 13:52:29 +0200 | [diff] [blame] | 99 | res = freq * ratio; |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 100 | |
H. Peter Anvin | ca1e631 | 2014-01-16 13:00:21 -0800 | [diff] [blame] | 101 | #ifdef CONFIG_X86_LOCAL_APIC |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 102 | lapic_timer_frequency = (freq * 1000) / HZ; |
H. Peter Anvin | ca1e631 | 2014-01-16 13:00:21 -0800 | [diff] [blame] | 103 | #endif |
Thomas Gleixner | 5f0e030 | 2014-02-19 13:52:29 +0200 | [diff] [blame] | 104 | return res; |
Bin Gao | 7da7c15 | 2013-10-21 09:16:33 -0700 | [diff] [blame] | 105 | } |