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Erik Gilling5ad36c52010-03-15 23:04:46 -07001/*
Colin Cross938fa342011-05-01 14:10:10 -07002 * Copyright (C) 2011 Google, Inc.
Erik Gilling5ad36c52010-03-15 23:04:46 -07003 *
4 * Author:
Colin Cross938fa342011-05-01 14:10:10 -07005 * Colin Cross <ccross@android.com>
Erik Gilling5ad36c52010-03-15 23:04:46 -07006 *
Joseph Loe307cc82013-04-03 19:31:45 +08007 * Copyright (C) 2010,2013, NVIDIA Corporation
Gary King460907b2010-04-05 20:30:59 -07008 *
Erik Gilling5ad36c52010-03-15 23:04:46 -07009 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
Joseph Lo7e8b15d2013-07-19 17:25:24 +080020#include <linux/cpu_pm.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070021#include <linux/interrupt.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070022#include <linux/io.h>
Rob Herring520f7bd2012-12-27 13:10:24 -060023#include <linux/irqchip/arm-gic.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020024#include <linux/irq.h>
25#include <linux/kernel.h>
26#include <linux/of_address.h>
27#include <linux/of.h>
Joseph Loe307cc82013-04-03 19:31:45 +080028#include <linux/syscore_ops.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070029
Erik Gilling5ad36c52010-03-15 23:04:46 -070030#include "board.h"
Stephen Warren2be39c02012-10-04 14:24:09 -060031#include "iomap.h"
Erik Gilling5ad36c52010-03-15 23:04:46 -070032
Joseph Lod4b92fb2013-01-15 22:10:26 +000033#define SGI_MASK 0xFFFF
34
Joseph Loe307cc82013-04-03 19:31:45 +080035#ifdef CONFIG_PM_SLEEP
Joseph Lo7e8b15d2013-07-19 17:25:24 +080036static void __iomem *tegra_gic_cpu_base;
Joseph Loe307cc82013-04-03 19:31:45 +080037#endif
38
Joseph Lod4b92fb2013-01-15 22:10:26 +000039bool tegra_pending_sgi(void)
40{
41 u32 pending_set;
42 void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
43
44 pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
45
46 if (pending_set & SGI_MASK)
47 return true;
48
49 return false;
50}
51
Joseph Loe307cc82013-04-03 19:31:45 +080052#ifdef CONFIG_PM_SLEEP
Joseph Lo7e8b15d2013-07-19 17:25:24 +080053static int tegra_gic_notifier(struct notifier_block *self,
54 unsigned long cmd, void *v)
55{
56 switch (cmd) {
57 case CPU_PM_ENTER:
58 writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL);
59 break;
60 }
61
62 return NOTIFY_OK;
63}
64
65static struct notifier_block tegra_gic_notifier_block = {
66 .notifier_call = tegra_gic_notifier,
67};
68
69static const struct of_device_id tegra114_dt_gic_match[] __initconst = {
70 { .compatible = "arm,cortex-a15-gic" },
71 { }
72};
73
74static void tegra114_gic_cpu_pm_registration(void)
75{
76 struct device_node *dn;
77
78 dn = of_find_matching_node(NULL, tegra114_dt_gic_match);
79 if (!dn)
80 return;
81
82 tegra_gic_cpu_base = of_iomap(dn, 1);
83
84 cpu_pm_register_notifier(&tegra_gic_notifier_block);
85}
Joseph Loe307cc82013-04-03 19:31:45 +080086#else
Joseph Lo7e8b15d2013-07-19 17:25:24 +080087static void tegra114_gic_cpu_pm_registration(void) { }
Joseph Loe307cc82013-04-03 19:31:45 +080088#endif
89
Marc Zyngiere9479e02015-03-11 15:43:00 +000090static const struct of_device_id tegra_ictlr_match[] __initconst = {
91 { .compatible = "nvidia,tegra20-ictlr" },
92 { .compatible = "nvidia,tegra30-ictlr" },
93 { }
94};
95
Erik Gilling5ad36c52010-03-15 23:04:46 -070096void __init tegra_init_irq(void)
97{
Marc Zyngier1a703bf2015-03-11 15:43:03 +000098 if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
99 pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
Colin Crossd1d8c662011-05-01 15:26:51 -0700100
Joseph Lo7e8b15d2013-07-19 17:25:24 +0800101 tegra114_gic_cpu_pm_registration();
Erik Gilling5ad36c52010-03-15 23:04:46 -0700102}