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Paul Mackerras047ea782005-11-19 20:17:32 +11001#ifndef _ASM_POWERPC_PCI_BRIDGE_H
2#define _ASM_POWERPC_PCI_BRIDGE_H
Arnd Bergmann88ced032005-12-16 22:43:46 +01003#ifdef __KERNEL__
Stephen Rothwell7cd1de62007-12-06 18:02:28 +11004/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
Kumar Gala5531e412007-06-27 00:16:25 -050010#include <linux/pci.h>
Kumar Galaa4c9e322007-06-27 13:09:43 -050011#include <linux/list.h>
12#include <linux/ioport.h>
Rob Herringf4ffd5e2011-06-29 11:46:54 -050013#include <asm-generic/pci-bridge.h>
Kumar Galaa4c9e322007-06-27 13:09:43 -050014
Stephen Rothwell44ef3392007-12-10 14:33:21 +110015struct device_node;
16
Kumar Gala5531e412007-06-27 00:16:25 -050017/*
18 * Structure of a PCI controller (host bridge)
19 */
20struct pci_controller {
21 struct pci_bus *bus;
Kumar Galaa4c9e322007-06-27 13:09:43 -050022 char is_dynamic;
Stephen Rothwell72119912007-12-11 11:00:13 +110023#ifdef CONFIG_PPC64
24 int node;
25#endif
Stephen Rothwell44ef3392007-12-10 14:33:21 +110026 struct device_node *dn;
Kumar Galaa4c9e322007-06-27 13:09:43 -050027 struct list_head list_node;
Kumar Gala5531e412007-06-27 00:16:25 -050028 struct device *parent;
29
30 int first_busno;
31 int last_busno;
32 int self_busno;
Yinghai Lube8e60d2012-05-17 18:51:12 -070033 struct resource busn;
Kumar Gala5531e412007-06-27 00:16:25 -050034
35 void __iomem *io_base_virt;
Stephen Rothwell72119912007-12-11 11:00:13 +110036#ifdef CONFIG_PPC64
37 void *io_base_alloc;
38#endif
Kumar Gala5531e412007-06-27 00:16:25 -050039 resource_size_t io_base_phys;
Benjamin Herrenschmidt13dccb92007-12-11 14:48:18 +110040 resource_size_t pci_io_size;
Kumar Gala5531e412007-06-27 00:16:25 -050041
42 /* Some machines (PReP) have a non 1:1 mapping of
43 * the PCI memory space in the CPU bus space
44 */
45 resource_size_t pci_mem_offset;
46
Benjamin Herrenschmidte9f82cb2008-10-14 11:55:31 +110047 /* Some machines have a special region to forward the ISA
48 * "memory" cycles such as VGA memory regions. Left to 0
49 * if unsupported
50 */
51 resource_size_t isa_mem_phys;
52 resource_size_t isa_mem_size;
53
Kumar Gala5531e412007-06-27 00:16:25 -050054 struct pci_ops *ops;
Stephen Rothwell70fbb932007-12-21 15:23:48 +110055 unsigned int __iomem *cfg_addr;
56 void __iomem *cfg_data;
Kumar Gala5531e412007-06-27 00:16:25 -050057
58 /*
59 * Used for variants of PCI indirect handling and possible quirks:
60 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
61 * EXT_REG - provides access to PCI-e extended registers
Lucas De Marchi25985ed2011-03-30 22:57:33 -030062 * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
Kumar Gala5531e412007-06-27 00:16:25 -050063 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
64 * to determine which bus number to match on when generating type0
65 * config cycles
Kumar Gala62c66c82007-07-11 13:22:41 -050066 * NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
67 * hanging if we don't have link and try to do config cycles to
68 * anything but the PHB. Only allow talking to the PHB if this is
69 * set.
Kumar Gala2e56ff22007-07-19 16:07:35 -050070 * BIG_ENDIAN - cfg_addr is a big endian register
Josh Boyer5ce4b592008-06-17 19:01:38 -040071 * BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on
72 * the PLB4. Effectively disable MRM commands by setting this.
Kumar Gala5531e412007-06-27 00:16:25 -050073 */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +110074#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x00000001
75#define PPC_INDIRECT_TYPE_EXT_REG 0x00000002
76#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x00000004
77#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008
78#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
Josh Boyer5ce4b592008-06-17 19:01:38 -040079#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020
Kumar Gala5531e412007-06-27 00:16:25 -050080 u32 indirect_type;
Kumar Gala5531e412007-06-27 00:16:25 -050081 /* Currently, we limit ourselves to 1 IO range and 3 mem
82 * ranges since the common pci_bus structure can't handle more
83 */
84 struct resource io_resource;
85 struct resource mem_resources[3];
Kumar Gala5516b542007-06-27 01:17:57 -050086 int global_number; /* PCI domain number */
Becky Bruce89d93342009-04-20 11:26:48 -050087
88 resource_size_t dma_window_base_cur;
89 resource_size_t dma_window_size;
90
Stephen Rothwell72119912007-12-11 11:00:13 +110091#ifdef CONFIG_PPC64
92 unsigned long buid;
Stephen Rothwell72119912007-12-11 11:00:13 +110093
94 void *private_data;
95#endif /* CONFIG_PPC64 */
Kumar Gala5531e412007-06-27 00:16:25 -050096};
97
Kumar Gala5531e412007-06-27 00:16:25 -050098/* These are used for config access before all the PCI probing
99 has been done. */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100100extern int early_read_config_byte(struct pci_controller *hose, int bus,
101 int dev_fn, int where, u8 *val);
102extern int early_read_config_word(struct pci_controller *hose, int bus,
103 int dev_fn, int where, u16 *val);
104extern int early_read_config_dword(struct pci_controller *hose, int bus,
105 int dev_fn, int where, u32 *val);
106extern int early_write_config_byte(struct pci_controller *hose, int bus,
107 int dev_fn, int where, u8 val);
108extern int early_write_config_word(struct pci_controller *hose, int bus,
109 int dev_fn, int where, u16 val);
110extern int early_write_config_dword(struct pci_controller *hose, int bus,
111 int dev_fn, int where, u32 val);
Kumar Gala5531e412007-06-27 00:16:25 -0500112
Kumar Gala38805e52007-07-10 23:37:45 -0500113extern int early_find_capability(struct pci_controller *hose, int bus,
114 int dev_fn, int cap);
115
Kumar Gala5531e412007-06-27 00:16:25 -0500116extern void setup_indirect_pci(struct pci_controller* hose,
Valentine Barshakd94bad82007-10-08 22:51:24 +1000117 resource_size_t cfg_addr,
118 resource_size_t cfg_data, u32 flags);
Kumar Gala89c2dd62009-08-25 16:20:45 +0000119
Kumar Gala89c2dd62009-08-25 16:20:45 +0000120static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
121{
122 return bus->sysdata;
123}
124
Benjamin Herrenschmidt98d9f30c82011-04-11 11:37:07 +1000125#ifndef CONFIG_PPC64
126
127extern int pci_device_from_OF_node(struct device_node *node,
128 u8 *bus, u8 *devfn);
129extern void pci_create_OF_bus_map(void);
130
Kumar Gala89c2dd62009-08-25 16:20:45 +0000131static inline int isa_vaddr_is_ioport(void __iomem *address)
132{
133 /* No specific ISA handling on ppc32 at this stage, it
134 * all goes through PCI
135 */
136 return 0;
137}
138
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100139#else /* CONFIG_PPC64 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140
141/*
Paul Mackerras16353172005-09-06 13:17:54 +1000142 * PCI stuff, for nodes representing PCI devices, pointed to
143 * by device_node->data.
144 */
Paul Mackerras16353172005-09-06 13:17:54 +1000145struct iommu_table;
146
147struct pci_dn {
Linas Vepstas7684b402005-11-03 18:55:19 -0600148 int busno; /* pci bus number */
Linas Vepstas7684b402005-11-03 18:55:19 -0600149 int devfn; /* pci device and function number */
Benjamin Herrenschmidtb5166cc2005-11-15 16:05:33 +1100150
Linas Vepstasc2e221e2007-05-23 04:18:04 +1000151 struct pci_controller *phb; /* for pci devices */
152 struct iommu_table *iommu_table; /* for phb's or bridges */
Linas Vepstasc2e221e2007-05-23 04:18:04 +1000153 struct device_node *node; /* back-pointer to the device_node */
154
155 int pci_ext_config_space; /* for pci devices */
156
Stephen Rothwellb6ed42a2007-12-21 15:49:11 +1100157 struct pci_dev *pcidev; /* back-pointer to the pci device */
Benjamin Herrenschmidt184cd4a2011-11-15 17:29:08 +0000158#ifdef CONFIG_EEH
Gavin Shan2a0352f2012-03-20 21:30:27 +0000159 struct eeh_dev *edev; /* eeh device */
Linas Vepstasc2e221e2007-05-23 04:18:04 +1000160#endif
Benjamin Herrenschmidt184cd4a2011-11-15 17:29:08 +0000161#define IODA_INVALID_PE (-1)
162#ifdef CONFIG_PPC_POWERNV
163 int pe_number;
164#endif
Paul Mackerras16353172005-09-06 13:17:54 +1000165};
166
167/* Get the pointer to a device_node's pci_dn */
168#define PCI_DN(dn) ((struct pci_dn *) (dn)->data)
169
Kumar Gala2eb4afb2009-04-30 09:26:21 +0000170extern void * update_dn_pci_info(struct device_node *dn, void *data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171
Paul Mackerras40ef8cb2005-10-10 22:50:37 +1000172static inline int pci_device_from_OF_node(struct device_node *np,
173 u8 *bus, u8 *devfn)
174{
175 if (!PCI_DN(np))
176 return -ENODEV;
177 *bus = PCI_DN(np)->busno;
178 *devfn = PCI_DN(np)->devfn;
179 return 0;
180}
181
Gavin Shan2a0352f2012-03-20 21:30:27 +0000182#if defined(CONFIG_EEH)
183static inline struct eeh_dev *of_node_to_eeh_dev(struct device_node *dn)
184{
Gavin Shan1e38b712012-09-17 04:34:28 +0000185 /*
186 * For those OF nodes whose parent isn't PCI bridge, they
187 * don't have PCI_DN actually. So we have to skip them for
188 * any EEH operations.
189 */
190 if (!dn || !PCI_DN(dn))
191 return NULL;
192
Gavin Shan2a0352f2012-03-20 21:30:27 +0000193 return PCI_DN(dn)->edev;
194}
Gavin Shanf8f7d632012-09-07 22:44:22 +0000195#else
196#define of_node_to_eeh_dev(x) (NULL)
Gavin Shan2a0352f2012-03-20 21:30:27 +0000197#endif
198
Linas Vepstas2bf6a8f2005-11-03 18:52:16 -0600199/** Find the bus corresponding to the indicated device node */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100200extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn);
Linas Vepstas2bf6a8f2005-11-03 18:52:16 -0600201
Linas Vepstas2bf6a8f2005-11-03 18:52:16 -0600202/** Remove all of the PCI devices under this bus */
Gavin Shan20ee6a92012-09-11 19:16:17 +0000203extern void __pcibios_remove_pci_devices(struct pci_bus *bus, int purge_pe);
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100204extern void pcibios_remove_pci_devices(struct pci_bus *bus);
Linas Vepstas2bf6a8f2005-11-03 18:52:16 -0600205
206/** Discover new pci devices under this bus, and add them */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100207extern void pcibios_add_pci_devices(struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208
Benjamin Herrenschmidtb5166cc2005-11-15 16:05:33 +1100209
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000210extern void isa_bridge_find_early(struct pci_controller *hose);
211
Benjamin Herrenschmidt6dfbde22007-07-26 14:07:13 +1000212static inline int isa_vaddr_is_ioport(void __iomem *address)
213{
214 /* Check if address hits the reserved legacy IO range */
215 unsigned long ea = (unsigned long)address;
216 return ea >= ISA_IO_BASE && ea < ISA_IO_END;
217}
218
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000219extern int pcibios_unmap_io_space(struct pci_bus *bus);
220extern int pcibios_map_io_space(struct pci_bus *bus);
221
Anton Blanchard357518f2006-06-10 20:53:06 +1000222#ifdef CONFIG_NUMA
223#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE))
224#else
225#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = -1)
226#endif
227
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100228#endif /* CONFIG_PPC64 */
Kumar Gala5531e412007-06-27 00:16:25 -0500229
230/* Get the PCI host controller for an OF device */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100231extern struct pci_controller *pci_find_hose_for_OF_device(
232 struct device_node* node);
Kumar Gala5531e412007-06-27 00:16:25 -0500233
234/* Fill up host controller resources from the OF node */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100235extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
236 struct device_node *dev, int primary);
Kumar Gala5531e412007-06-27 00:16:25 -0500237
Benjamin Herrenschmidt5131d4d2007-11-16 18:42:18 +1100238/* Allocate & free a PCI host bridge structure */
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100239extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
Benjamin Herrenschmidt5131d4d2007-11-16 18:42:18 +1100240extern void pcibios_free_controller(struct pci_controller *phb);
241
Kumar Gala5531e412007-06-27 00:16:25 -0500242#ifdef CONFIG_PCI
Benjamin Herrenschmidt6dfbde22007-07-26 14:07:13 +1000243extern int pcibios_vaddr_is_ioport(void __iomem *address);
Kumar Gala5531e412007-06-27 00:16:25 -0500244#else
Benjamin Herrenschmidt6dfbde22007-07-26 14:07:13 +1000245static inline int pcibios_vaddr_is_ioport(void __iomem *address)
246{
247 return 0;
248}
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100249#endif /* CONFIG_PCI */
Kumar Gala5531e412007-06-27 00:16:25 -0500250
Stephen Rothwell7cd1de62007-12-06 18:02:28 +1100251#endif /* __KERNEL__ */
252#endif /* _ASM_POWERPC_PCI_BRIDGE_H */