Wolfram Sang | 16c4c52 | 2012-11-13 18:16:43 +0100 | [diff] [blame] | 1 | |
| 2 | * Marvell MV64XXX I2C controller |
| 3 | |
| 4 | Required properties : |
| 5 | |
| 6 | - reg : Offset and length of the register set for the device |
Maxime Ripard | c7dcb1f | 2014-03-04 17:28:38 +0100 | [diff] [blame] | 7 | - compatible : Should be either: |
Maxime Ripard | 5ed9d92 | 2014-03-31 14:54:57 +0200 | [diff] [blame] | 8 | - "allwinner,sun4i-a10-i2c" |
Maxime Ripard | c7dcb1f | 2014-03-04 17:28:38 +0100 | [diff] [blame] | 9 | - "allwinner,sun6i-a31-i2c" |
| 10 | - "marvell,mv64xxx-i2c" |
| 11 | - "marvell,mv78230-i2c" |
| 12 | - "marvell,mv78230-a0-i2c" |
| 13 | * Note: Only use "marvell,mv78230-a0-i2c" for a |
| 14 | very rare, initial version of the SoC which |
| 15 | had broken offload support. Linux |
| 16 | auto-detects this and sets it appropriately. |
Wolfram Sang | 16c4c52 | 2012-11-13 18:16:43 +0100 | [diff] [blame] | 17 | - interrupts : The interrupt number |
Gregory CLEMENT | 4c730a0 | 2013-06-21 15:32:06 +0200 | [diff] [blame] | 18 | |
| 19 | Optional properties : |
| 20 | |
| 21 | - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the |
| 22 | default frequency is 100kHz |
Maxime Ripard | c7dcb1f | 2014-03-04 17:28:38 +0100 | [diff] [blame] | 23 | |
| 24 | - resets : phandle to the parent reset controller. Mandatory |
| 25 | whenever you're using the "allwinner,sun6i-a31-i2c" |
| 26 | compatible. |
Wolfram Sang | 16c4c52 | 2012-11-13 18:16:43 +0100 | [diff] [blame] | 27 | |
| 28 | Examples: |
| 29 | |
| 30 | i2c@11000 { |
| 31 | compatible = "marvell,mv64xxx-i2c"; |
| 32 | reg = <0x11000 0x20>; |
| 33 | interrupts = <29>; |
| 34 | clock-frequency = <100000>; |
| 35 | }; |
Gregory CLEMENT | 930ab3d | 2013-08-22 16:19:05 +0200 | [diff] [blame] | 36 | |
| 37 | For the Armada XP: |
| 38 | |
| 39 | i2c@11000 { |
| 40 | compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; |
| 41 | reg = <0x11000 0x100>; |
| 42 | interrupts = <29>; |
| 43 | clock-frequency = <100000>; |
| 44 | }; |