Sachin Bhayare | e78ce6e | 2018-01-23 11:22:54 +0530 | [diff] [blame] | 1 | Qualcomm Technologies, Inc. mdss-dsi |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 2 | |
| 3 | mdss-dsi is the master DSI device which supports multiple DSI host controllers that |
| 4 | are compatible with MIPI display serial interface specification. |
| 5 | |
| 6 | Required properties: |
| 7 | - compatible: Must be "qcom,mdss-dsi" |
| 8 | - hw-config: Specifies the DSI host setup configuration |
| 9 | "hw-config" = "single_dsi" |
| 10 | "hw-config" = "dual_dsi" |
| 11 | "hw-config" = "split_dsi" |
| 12 | - ranges: The standard property which specifies the child address |
| 13 | space, parent address space and the length. |
| 14 | - vdda-supply: Phandle for vreg regulator device node. |
| 15 | |
| 16 | Bus Scaling Data: |
| 17 | - qcom,msm-bus,name: String property describing MDSS client. |
| 18 | - qcom, msm-bus,num-cases: This is the number of bus scaling use cases |
| 19 | defined in the vectors property. This must be |
| 20 | set to <2> for MDSS DSI driver where use-case 0 |
| 21 | is used to remove BW votes from the system. Use |
| 22 | case 1 is used to generate bandwidth requestes |
| 23 | when sending command packets. |
| 24 | - qcom,msm-bus,num-paths: This represents number of paths in each bus |
| 25 | scaling usecase. This value depends on number of |
| 26 | AXI master ports dedicated to MDSS for |
| 27 | particular chipset. |
| 28 | - qcom,msm-bus,vectors-KBps: A series of 4 cell properties, with a format |
| 29 | of (src, dst, ab, ib) which is defined at |
| 30 | Documentation/devicetree/bindings/arm/msm/msm_bus.txt. |
| 31 | DSI driver should always set average bandwidth |
| 32 | (ab) to 0 and always use instantaneous |
| 33 | bandwidth(ib) values. |
| 34 | |
| 35 | Optional properties: |
| 36 | - vcca-supply: Phandle for vcca regulator device node. |
| 37 | - qcom,<type>-supply-entries: A node that lists the elements of the supply used by the |
| 38 | a particular "type" of DSI modulee. The module "types" |
| 39 | can be "core", "ctrl", and "phy". Within the same type, |
| 40 | there can be more than one instance of this binding, |
| 41 | in which case the entry would be appended with the |
| 42 | supply entry index. |
| 43 | e.g. qcom,ctrl-supply-entry@0 |
| 44 | -- qcom,supply-name: name of the supply (vdd/vdda/vddio) |
| 45 | -- qcom,supply-min-voltage: minimum voltage level (uV) |
| 46 | -- qcom,supply-max-voltage: maximum voltage level (uV) |
| 47 | -- qcom,supply-enable-load: load drawn (uA) from enabled supply |
| 48 | -- qcom,supply-disable-load: load drawn (uA) from disabled supply |
| 49 | -- qcom,supply-ulp-load: load drawn (uA) from supply in ultra-low power mode |
| 50 | -- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on |
| 51 | -- qcom,supply-post-on-sleep: time to sleep (ms) after turning on |
| 52 | -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off |
| 53 | -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off |
| 54 | - pll-src-config Specified the source PLL for the DSI |
| 55 | link clocks: |
| 56 | "PLL0" - Clocks sourced out of DSI PLL0 |
| 57 | "PLL1" - Clocks sourced out of DSI PLL1 |
| 58 | This property is only valid for |
| 59 | certain DSI hardware configurations |
| 60 | mentioned in the "hw-config" binding above. |
| 61 | For example, in split_dsi config, the clocks can |
| 62 | only be sourced out of PLL0. For |
| 63 | dual_dsi, both PLL would be active. |
| 64 | For single DSI, it is possible to |
| 65 | select either PLL. If no value is specified, |
| 66 | the default value for single DSI is set as PLL0. |
| 67 | - qcom,mmss-ulp-clamp-ctrl-offset: Specifies the offset for dsi ulps clamp control register. |
| 68 | - qcom,mmss-phyreset-ctrl-offset: Specifies the offset for dsi phy reset control register. |
| 69 | - qcom,dsi-clk-ln-recovery: Boolean which enables the clk lane recovery |
| 70 | |
| 71 | mdss-dsi-ctrl is a dsi controller device which is treated as a subnode of the mdss-dsi device. |
| 72 | |
| 73 | Required properties: |
| 74 | - compatible: Must be "qcom,mdss-dsi-ctrl" |
| 75 | - cell-index: Specifies the controller used among the two controllers. |
| 76 | - reg: Base address and length of the different register |
| 77 | regions(s) required for DSI device functionality. |
| 78 | - reg-names: A list of strings that map in order to the list of regs. |
| 79 | "dsi_ctrl" - MDSS DSI controller register region |
| 80 | "dsi_phy" - MDSS DSI PHY register region |
| 81 | "dsi_phy_regulator" - MDSS DSI PHY REGULATOR region |
| 82 | "mmss_misc_phys" - Register region for MMSS DSI clamps |
| 83 | - vdd-supply: Phandle for vdd regulator device node. |
| 84 | - vddio-supply: Phandle for vdd-io regulator device node. |
| 85 | - qcom,mdss-fb-map-prim: pHandle that specifies the framebuffer to which the |
| 86 | primary interface is mapped. |
| 87 | - qcom,mdss-mdp: pHandle that specifies the mdss-mdp device. |
| 88 | - qcom,platform-regulator-settings: An array of length 7 or 5 that specifies the PHY |
| 89 | regulator settings. It use 5 bytes for 8996 pll. |
| 90 | - qcom,platform-strength-ctrl: An array of length 2 or 10 that specifies the PHY |
| 91 | strengthCtrl settings. It use 10 bytes for 8996 pll. |
| 92 | - qcom,platform-lane-config: An array of length 45 or 20 that specifies the PHY |
| 93 | lane configuration settings. It use 20 bytes for 8996 pll. |
| 94 | - qcom,platform-bist-ctrl: An array of length 6 that specifies the PHY |
| 95 | BIST ctrl settings. |
| 96 | - qcom,dsi-pref-prim-pan: phandle that specifies the primary panel to be used |
| 97 | with the controller. |
| 98 | |
| 99 | Optional properties: |
| 100 | - label: A string used to describe the controller used. |
| 101 | - qcom,mdss-fb-map: pHandle that specifies the framebuffer to which the |
| 102 | interface is mapped. |
| 103 | - qcom,mdss-fb-map-sec: pHandle that specifies the framebuffer to which the |
| 104 | secondary interface is mapped. |
| 105 | - qcom,platform-enable-gpio: Specifies the panel lcd/display enable gpio. |
| 106 | - qcom,platform-reset-gpio: Specifies the panel reset gpio. |
| 107 | - qcom,platform-te-gpio: Specifies the gpio used for TE. |
| 108 | - qcom,platform-bklight-en-gpio: Specifies the gpio used to enable display back-light |
| 109 | - qcom,platform-mode-gpio: Select video/command mode of panel through gpio when it supports |
| 110 | both modes. |
| 111 | - qcom,platform-intf-mux-gpio: Select dsi/external(hdmi) interface through gpio when it supports |
| 112 | either dsi or external interface. |
Yahui Wang | 12a6d37 | 2016-12-12 22:43:20 +0800 | [diff] [blame] | 113 | - qcom,platform-bklight-en-gpio-invert: Invert the gpio used to enable display back-light |
| 114 | - qcom,panel-mode-gpio: Specifies the GPIO to select video/command/single-port/dual-port |
| 115 | mode of panel through gpio when it supports these modes. |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 116 | - pinctrl-names: List of names to assign mdss pin states defined in pinctrl device node |
| 117 | Refer to pinctrl-bindings.txt |
| 118 | - pinctrl-<0..n>: Lists phandles each pointing to the pin configuration node within a pin |
| 119 | controller. These pin configurations are installed in the pinctrl |
| 120 | device node. Refer to pinctrl-bindings.txt |
| 121 | - qcom,regulator-ldo-mode: Boolean to enable ldo mode for the dsi phy regulator |
| 122 | - qcom,null-insertion-enabled: Boolean to enable NULL packet insertion |
| 123 | feature for DSI controller. |
| 124 | - qcom,dsi-irq-line: Boolean specifies if DSI has a different irq line than mdp. |
| 125 | - qcom,lane-map: Specifies the data lane swap configuration. |
| 126 | "lane_map_0123" = <0 1 2 3> (default value) |
| 127 | "lane_map_3012" = <3 0 1 2> |
| 128 | "lane_map_2301" = <2 3 0 1> |
| 129 | "lane_map_1230" = <1 2 3 0> |
| 130 | "lane_map_0321" = <0 3 2 1> |
| 131 | "lane_map_1032" = <1 0 3 2> |
| 132 | "lane_map_2103" = <2 1 0 3> |
| 133 | "lane_map_3210" = <3 2 1 0> |
| 134 | - qcom,pluggable Boolean to enable hotplug feature. |
| 135 | - qcom,timing-db-mode: Boolean specifies dsi timing mode registers are supported or not. |
| 136 | - qcom,display-id A string indicates the display ID for the controller. |
| 137 | The possible values are: |
| 138 | - "primary" |
| 139 | - "secondary" |
| 140 | - "tertiary" |
| 141 | - qcom,bridge-index: Instance id of the bridge chip connected to DSI. qcom,bridge-index is |
| 142 | required if a bridge chip panel is used. |
| 143 | |
| 144 | Example: |
| 145 | mdss_dsi: qcom,mdss_dsi@0 { |
| 146 | compatible = "qcom,mdss-dsi"; |
| 147 | hw-config = "single_dsi"; |
| 148 | pll-src-config = "PLL0"; |
| 149 | #address-cells = <1>; |
| 150 | #size-cells = <1>; |
| 151 | vdda-supply = <&pm8226_l4>; |
| 152 | vcca-supply = <&pm8226_l28>; |
| 153 | reg = <0x1a98000 0x1a98000 0x25c |
| 154 | 0x1a98500 0x1a98500 0x280 |
| 155 | 0x1a98780 0x1a98780 0x30 |
| 156 | 0x193e000 0x193e000 0x30>; |
| 157 | |
| 158 | qcom,dsi-clk-ln-recovery; |
| 159 | |
| 160 | qcom,core-supply-entries { |
| 161 | #address-cells = <1>; |
| 162 | #size-cells = <0>; |
| 163 | |
| 164 | qcom,core-supply-entry@0 { |
| 165 | reg = <0>; |
| 166 | qcom,supply-name = "gdsc"; |
| 167 | qcom,supply-min-voltage = <0>; |
| 168 | qcom,supply-max-voltage = <0>; |
| 169 | qcom,supply-enable-load = <0>; |
| 170 | qcom,supply-disable-load = <0>; |
| 171 | qcom,supply-ulp-load = <0>; |
| 172 | qcom,supply-pre-on-sleep = <0>; |
| 173 | qcom,supply-post-on-sleep = <0>; |
| 174 | qcom,supply-pre-off-sleep = <0>; |
| 175 | qcom,supply-post-off-sleep = <0>; |
| 176 | }; |
| 177 | }; |
| 178 | |
| 179 | qcom,phy-supply-entries { |
| 180 | #address-cells = <1>; |
| 181 | #size-cells = <0>; |
| 182 | |
| 183 | qcom,phy-supply-entry@0 { |
| 184 | reg = <0>; |
| 185 | qcom,supply-name = "vddio"; |
| 186 | qcom,supply-min-voltage = <1800000>; |
| 187 | qcom,supply-max-voltage = <1800000>; |
| 188 | qcom,supply-enable-load = <100000>; |
| 189 | qcom,supply-disable-load = <100>; |
| 190 | qcom,supply-ulp-load = <100>; |
| 191 | qcom,supply-pre-on-sleep = <0>; |
| 192 | qcom,supply-post-on-sleep = <20>; |
| 193 | qcom,supply-pre-off-sleep = <0>; |
| 194 | qcom,supply-post-off-sleep = <0>; |
| 195 | }; |
| 196 | }; |
| 197 | |
| 198 | qcom,ctrl-supply-entries { |
| 199 | #address-cells = <1>; |
| 200 | #size-cells = <0>; |
| 201 | |
| 202 | qcom,ctrl-supply-entry@0 { |
| 203 | reg = <0>; |
| 204 | qcom,supply-name = "vdda"; |
| 205 | qcom,supply-min-voltage = <1200000>; |
| 206 | qcom,supply-max-voltage = <1200000>; |
| 207 | qcom,supply-enable-load = <100000>; |
| 208 | qcom,supply-disable-load = <100>; |
| 209 | qcom,supply-ulp-load = <1000>; |
| 210 | qcom,supply-pre-on-sleep = <0>; |
| 211 | qcom,supply-post-on-sleep = <20>; |
| 212 | qcom,supply-pre-off-sleep = <0>; |
| 213 | qcom,supply-post-off-sleep = <0>; |
| 214 | }; |
| 215 | }; |
| 216 | |
| 217 | mdss_dsi0: mdss_dsi_ctrl0@fd922800 { |
| 218 | compatible = "qcom,mdss-dsi-ctrl"; |
| 219 | label = "MDSS DSI CTRL->0"; |
| 220 | cell-index = <0>; |
| 221 | reg = <0xfd922800 0x1f8>, |
| 222 | <0xfd922b00 0x2b0>, |
| 223 | <0xfd998780 0x30>, |
| 224 | <0xfd828000 0x108>; |
| 225 | reg-names = "dsi_ctrl", "dsi_phy", |
| 226 | "dsi_phy_regulator", "mmss_misc_phys"; |
| 227 | |
| 228 | vdd-supply = <&pm8226_l15>; |
| 229 | vddio-supply = <&pm8226_l8>; |
| 230 | qcom,mdss-fb-map-prim = <&mdss_fb0>; |
| 231 | qcom,mdss-mdp = <&mdss_mdp>; |
| 232 | |
| 233 | qcom,dsi-pref-prim-pan = <&dsi_tosh_720_vid>; |
| 234 | |
| 235 | qcom,platform-strength-ctrl = [ff 06]; |
| 236 | qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; |
| 237 | qcom,platform-regulator-settings = [07 09 03 00 20 00 01]; |
| 238 | qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 |
| 239 | 00 00 00 00 05 00 00 01 97 |
| 240 | 00 00 00 00 0a 00 00 01 97 |
| 241 | 00 00 00 00 0f 00 00 01 97 |
| 242 | 00 c0 00 00 00 00 00 01 bb]; |
| 243 | |
| 244 | qcom,mmss-ulp-clamp-ctrl-offset = <0x20>; |
| 245 | qcom,mmss-phyreset-ctrl-offset = <0x24>; |
| 246 | qcom,regulator-ldo-mode; |
| 247 | qcom,null-insertion-enabled; |
| 248 | qcom,timing-db-mode; |
| 249 | |
| 250 | pinctrl-names = "mdss_default", "mdss_sleep"; |
| 251 | pinctrl-0 = <&mdss_dsi_active>; |
| 252 | pinctrl-1 = <&mdss_dsi_suspend>; |
| 253 | qcom,platform-reset-gpio = <&msmgpio 25 1>; |
| 254 | qcom,platform-te-gpio = <&msmgpio 24 0>; |
| 255 | qcom,platform-enable-gpio = <&msmgpio 58 1>; |
| 256 | qcom,platform-bklight-en-gpio = <&msmgpio 86 0>; |
| 257 | qcom,platform-mode-gpio = <&msmgpio 7 0>; |
| 258 | qcom,platform-intf-mux-gpio = <&tlmm 115 0>; |
Yahui Wang | 12a6d37 | 2016-12-12 22:43:20 +0800 | [diff] [blame] | 259 | qcom,platform-bklight-en-gpio-invert; |
| 260 | qcom,panel-mode-gpio = <&msmgpio 107 0>; |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 261 | qcom,dsi-irq-line; |
| 262 | qcom,lane-map = "lane_map_3012"; |
| 263 | qcom,display-id = "primary"; |
| 264 | qcom,bridge-index = <00>; |
| 265 | }; |
| 266 | }; |