blob: b56b4577f6eff498af0784f553526efa46b62c52 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Hardware info common to DECstation 5000/1xx systems (otherwise
3 * known as 3min or kn02ba) and Personal DECstations 5000/xx ones
4 * (otherwise known as maxine or kn02ca).
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
11 * are by courtesy of Chris Fraser.
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000012 * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
Linus Torvalds1da177e2005-04-16 15:20:36 -070013 *
14 * These are addresses which have to be known early in the boot process.
15 * For other addresses refer to tc.h, ioasic_addrs.h and friends.
16 */
17#ifndef __ASM_MIPS_DEC_KN02XA_H
18#define __ASM_MIPS_DEC_KN02XA_H
19
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/dec/ioasic_addrs.h>
21
Maciej W. Rozyckia5fc9c02005-07-01 16:10:40 +000022#define KN02XA_SLOT_BASE 0x1c000000
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
24/*
25 * Memory control ASIC registers.
26 */
Maciej W. Rozyckia5fc9c02005-07-01 16:10:40 +000027#define KN02XA_MER 0x0c400000 /* memory error register */
28#define KN02XA_MSR 0x0c800000 /* memory size register */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30/*
31 * CPU control ASIC registers.
32 */
Maciej W. Rozyckia5fc9c02005-07-01 16:10:40 +000033#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */
34#define KN02XA_EAR 0x0e000004 /* error address register */
35#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */
36#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */
Linus Torvalds1da177e2005-04-16 15:20:36 -070037
38/*
39 * Memory Error Register bits, common definitions.
40 * The rest is defined in system-specific headers.
41 */
42#define KN02XA_MER_RES_28 (0xf<<28) /* unused */
43#define KN02XA_MER_RES_17 (0x3ff<<17) /* unused */
44#define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */
45#define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */
46#define KN02XA_MER_PARDIS (1<<14) /* parity error disable */
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000047#define KN02XA_MER_SIZE (1<<13) /* r/o mirror of MSR_SIZE */
48#define KN02XA_MER_RES_12 (1<<12) /* unused */
49#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask: */
50#define KN02XA_MER_BYTERR_3 (0x8<<8) /* byte lane #3 */
51#define KN02XA_MER_BYTERR_2 (0x4<<8) /* byte lane #2 */
52#define KN02XA_MER_BYTERR_1 (0x2<<8) /* byte lane #1 */
53#define KN02XA_MER_BYTERR_0 (0x1<<8) /* byte lane #0 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070054#define KN02XA_MER_RES_0 (0xff<<0) /* unused */
55
56/*
57 * Memory Size Register bits, common definitions.
58 * The rest is defined in system-specific headers.
59 */
60#define KN02XA_MSR_RES_27 (0x1f<<27) /* unused */
61#define KN02XA_MSR_RES_14 (0x7<<14) /* unused */
62#define KN02XA_MSR_SIZE (1<<13) /* 16M/4M stride */
63#define KN02XA_MSR_RES_0 (0x1fff<<0) /* unused */
64
65/*
66 * Error Address Register bits.
67 */
68#define KN02XA_EAR_RES_29 (0x7<<29) /* unused */
69#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */
70#define KN02XA_EAR_RES_0 (0x3<<0) /* unused */
71
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000072
73#ifndef __ASSEMBLY__
74
75#include <linux/interrupt.h>
76
77struct pt_regs;
78
79extern void dec_kn02xa_be_init(void);
80extern int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup);
Ralf Baechle6dab2f42006-10-09 00:00:31 +010081extern irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id);
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000082#endif
83
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#endif /* __ASM_MIPS_DEC_KN02XA_H */