Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 1 | /* Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 2 | * http://www.samsung.com/ |
| 3 | * |
| 4 | * Author: Jacek Anaszewski <j.anaszewski@samsung.com> |
| 5 | * |
| 6 | * Register interface file for JPEG driver on Exynos4x12. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | #include <linux/io.h> |
| 13 | #include <linux/delay.h> |
| 14 | |
| 15 | #include "jpeg-core.h" |
| 16 | #include "jpeg-hw-exynos4.h" |
| 17 | #include "jpeg-regs.h" |
| 18 | |
| 19 | void exynos4_jpeg_sw_reset(void __iomem *base) |
| 20 | { |
| 21 | unsigned int reg; |
| 22 | |
| 23 | reg = readl(base + EXYNOS4_JPEG_CNTL_REG); |
| 24 | writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); |
| 25 | |
Mauro Carvalho Chehab | 8087c35 | 2014-09-09 11:21:30 -0300 | [diff] [blame] | 26 | udelay(100); |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 27 | |
| 28 | writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); |
| 29 | } |
| 30 | |
| 31 | void exynos4_jpeg_set_enc_dec_mode(void __iomem *base, unsigned int mode) |
| 32 | { |
| 33 | unsigned int reg; |
| 34 | |
| 35 | reg = readl(base + EXYNOS4_JPEG_CNTL_REG); |
| 36 | /* set exynos4_jpeg mod register */ |
| 37 | if (mode == S5P_JPEG_DECODE) { |
| 38 | writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) | |
| 39 | EXYNOS4_DEC_MODE, |
| 40 | base + EXYNOS4_JPEG_CNTL_REG); |
| 41 | } else {/* encode */ |
| 42 | writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) | |
| 43 | EXYNOS4_ENC_MODE, |
| 44 | base + EXYNOS4_JPEG_CNTL_REG); |
| 45 | } |
| 46 | } |
| 47 | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 48 | void __exynos4_jpeg_set_img_fmt(void __iomem *base, unsigned int img_fmt, |
| 49 | unsigned int version) |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 50 | { |
| 51 | unsigned int reg; |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 52 | unsigned int exynos4_swap_chroma_cbcr; |
| 53 | unsigned int exynos4_swap_chroma_crcb; |
| 54 | |
| 55 | if (version == SJPEG_EXYNOS4) { |
| 56 | exynos4_swap_chroma_cbcr = EXYNOS4_SWAP_CHROMA_CBCR; |
| 57 | exynos4_swap_chroma_crcb = EXYNOS4_SWAP_CHROMA_CRCB; |
| 58 | } else { |
| 59 | exynos4_swap_chroma_cbcr = EXYNOS5433_SWAP_CHROMA_CBCR; |
| 60 | exynos4_swap_chroma_crcb = EXYNOS5433_SWAP_CHROMA_CRCB; |
| 61 | } |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 62 | |
| 63 | reg = readl(base + EXYNOS4_IMG_FMT_REG) & |
| 64 | EXYNOS4_ENC_IN_FMT_MASK; /* clear except enc format */ |
| 65 | |
| 66 | switch (img_fmt) { |
| 67 | case V4L2_PIX_FMT_GREY: |
| 68 | reg = reg | EXYNOS4_ENC_GRAY_IMG | EXYNOS4_GRAY_IMG_IP; |
| 69 | break; |
| 70 | case V4L2_PIX_FMT_RGB32: |
| 71 | reg = reg | EXYNOS4_ENC_RGB_IMG | |
| 72 | EXYNOS4_RGB_IP_RGB_32BIT_IMG; |
| 73 | break; |
| 74 | case V4L2_PIX_FMT_RGB565: |
| 75 | reg = reg | EXYNOS4_ENC_RGB_IMG | |
| 76 | EXYNOS4_RGB_IP_RGB_16BIT_IMG; |
| 77 | break; |
| 78 | case V4L2_PIX_FMT_NV24: |
| 79 | reg = reg | EXYNOS4_ENC_YUV_444_IMG | |
| 80 | EXYNOS4_YUV_444_IP_YUV_444_2P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 81 | exynos4_swap_chroma_cbcr; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 82 | break; |
| 83 | case V4L2_PIX_FMT_NV42: |
| 84 | reg = reg | EXYNOS4_ENC_YUV_444_IMG | |
| 85 | EXYNOS4_YUV_444_IP_YUV_444_2P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 86 | exynos4_swap_chroma_crcb; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 87 | break; |
| 88 | case V4L2_PIX_FMT_YUYV: |
| 89 | reg = reg | EXYNOS4_DEC_YUV_422_IMG | |
| 90 | EXYNOS4_YUV_422_IP_YUV_422_1P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 91 | exynos4_swap_chroma_cbcr; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 92 | break; |
| 93 | |
| 94 | case V4L2_PIX_FMT_YVYU: |
| 95 | reg = reg | EXYNOS4_DEC_YUV_422_IMG | |
| 96 | EXYNOS4_YUV_422_IP_YUV_422_1P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 97 | exynos4_swap_chroma_crcb; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 98 | break; |
| 99 | case V4L2_PIX_FMT_NV16: |
| 100 | reg = reg | EXYNOS4_DEC_YUV_422_IMG | |
| 101 | EXYNOS4_YUV_422_IP_YUV_422_2P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 102 | exynos4_swap_chroma_cbcr; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 103 | break; |
| 104 | case V4L2_PIX_FMT_NV61: |
| 105 | reg = reg | EXYNOS4_DEC_YUV_422_IMG | |
| 106 | EXYNOS4_YUV_422_IP_YUV_422_2P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 107 | exynos4_swap_chroma_crcb; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 108 | break; |
| 109 | case V4L2_PIX_FMT_NV12: |
| 110 | reg = reg | EXYNOS4_DEC_YUV_420_IMG | |
| 111 | EXYNOS4_YUV_420_IP_YUV_420_2P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 112 | exynos4_swap_chroma_cbcr; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 113 | break; |
| 114 | case V4L2_PIX_FMT_NV21: |
| 115 | reg = reg | EXYNOS4_DEC_YUV_420_IMG | |
| 116 | EXYNOS4_YUV_420_IP_YUV_420_2P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 117 | exynos4_swap_chroma_crcb; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 118 | break; |
| 119 | case V4L2_PIX_FMT_YUV420: |
| 120 | reg = reg | EXYNOS4_DEC_YUV_420_IMG | |
| 121 | EXYNOS4_YUV_420_IP_YUV_420_3P_IMG | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 122 | exynos4_swap_chroma_cbcr; |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 123 | break; |
| 124 | default: |
| 125 | break; |
| 126 | |
| 127 | } |
| 128 | |
| 129 | writel(reg, base + EXYNOS4_IMG_FMT_REG); |
| 130 | } |
| 131 | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 132 | void __exynos4_jpeg_set_enc_out_fmt(void __iomem *base, unsigned int out_fmt, |
| 133 | unsigned int version) |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 134 | { |
| 135 | unsigned int reg; |
| 136 | |
| 137 | reg = readl(base + EXYNOS4_IMG_FMT_REG) & |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 138 | ~(version == SJPEG_EXYNOS4 ? EXYNOS4_ENC_FMT_MASK : |
| 139 | EXYNOS5433_ENC_FMT_MASK); /* clear enc format */ |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 140 | |
| 141 | switch (out_fmt) { |
| 142 | case V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY: |
| 143 | reg = reg | EXYNOS4_ENC_FMT_GRAY; |
| 144 | break; |
| 145 | |
| 146 | case V4L2_JPEG_CHROMA_SUBSAMPLING_444: |
| 147 | reg = reg | EXYNOS4_ENC_FMT_YUV_444; |
| 148 | break; |
| 149 | |
| 150 | case V4L2_JPEG_CHROMA_SUBSAMPLING_422: |
| 151 | reg = reg | EXYNOS4_ENC_FMT_YUV_422; |
| 152 | break; |
| 153 | |
| 154 | case V4L2_JPEG_CHROMA_SUBSAMPLING_420: |
| 155 | reg = reg | EXYNOS4_ENC_FMT_YUV_420; |
| 156 | break; |
| 157 | |
| 158 | default: |
| 159 | break; |
| 160 | } |
| 161 | |
| 162 | writel(reg, base + EXYNOS4_IMG_FMT_REG); |
| 163 | } |
| 164 | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 165 | void exynos4_jpeg_set_interrupt(void __iomem *base, unsigned int version) |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 166 | { |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 167 | unsigned int reg; |
| 168 | |
| 169 | if (version == SJPEG_EXYNOS4) { |
| 170 | reg = readl(base + EXYNOS4_INT_EN_REG) & ~EXYNOS4_INT_EN_MASK; |
| 171 | writel(reg | EXYNOS4_INT_EN_ALL, base + EXYNOS4_INT_EN_REG); |
| 172 | } else { |
| 173 | reg = readl(base + EXYNOS4_INT_EN_REG) & |
| 174 | ~EXYNOS5433_INT_EN_MASK; |
| 175 | writel(reg | EXYNOS5433_INT_EN_ALL, base + EXYNOS4_INT_EN_REG); |
| 176 | } |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 177 | } |
| 178 | |
| 179 | unsigned int exynos4_jpeg_get_int_status(void __iomem *base) |
| 180 | { |
| 181 | unsigned int int_status; |
| 182 | |
| 183 | int_status = readl(base + EXYNOS4_INT_STATUS_REG); |
| 184 | |
| 185 | return int_status; |
| 186 | } |
| 187 | |
| 188 | unsigned int exynos4_jpeg_get_fifo_status(void __iomem *base) |
| 189 | { |
| 190 | unsigned int fifo_status; |
| 191 | |
| 192 | fifo_status = readl(base + EXYNOS4_FIFO_STATUS_REG); |
| 193 | |
| 194 | return fifo_status; |
| 195 | } |
| 196 | |
| 197 | void exynos4_jpeg_set_huf_table_enable(void __iomem *base, int value) |
| 198 | { |
| 199 | unsigned int reg; |
| 200 | |
| 201 | reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~EXYNOS4_HUF_TBL_EN; |
| 202 | |
| 203 | if (value == 1) |
| 204 | writel(reg | EXYNOS4_HUF_TBL_EN, |
| 205 | base + EXYNOS4_JPEG_CNTL_REG); |
| 206 | else |
Jacek Anaszewski | 5da74fc | 2014-09-01 10:05:52 -0300 | [diff] [blame] | 207 | writel(reg & ~EXYNOS4_HUF_TBL_EN, |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 208 | base + EXYNOS4_JPEG_CNTL_REG); |
| 209 | } |
| 210 | |
| 211 | void exynos4_jpeg_set_sys_int_enable(void __iomem *base, int value) |
| 212 | { |
| 213 | unsigned int reg; |
| 214 | |
| 215 | reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~(EXYNOS4_SYS_INT_EN); |
| 216 | |
| 217 | if (value == 1) |
Jacek Anaszewski | d727ff4 | 2014-09-01 10:05:51 -0300 | [diff] [blame] | 218 | writel(reg | EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG); |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 219 | else |
Jacek Anaszewski | d727ff4 | 2014-09-01 10:05:51 -0300 | [diff] [blame] | 220 | writel(reg & ~EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG); |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | void exynos4_jpeg_set_stream_buf_address(void __iomem *base, |
| 224 | unsigned int address) |
| 225 | { |
| 226 | writel(address, base + EXYNOS4_OUT_MEM_BASE_REG); |
| 227 | } |
| 228 | |
| 229 | void exynos4_jpeg_set_stream_size(void __iomem *base, |
| 230 | unsigned int x_value, unsigned int y_value) |
| 231 | { |
| 232 | writel(0x0, base + EXYNOS4_JPEG_IMG_SIZE_REG); /* clear */ |
| 233 | writel(EXYNOS4_X_SIZE(x_value) | EXYNOS4_Y_SIZE(y_value), |
| 234 | base + EXYNOS4_JPEG_IMG_SIZE_REG); |
| 235 | } |
| 236 | |
| 237 | void exynos4_jpeg_set_frame_buf_address(void __iomem *base, |
| 238 | struct s5p_jpeg_addr *exynos4_jpeg_addr) |
| 239 | { |
| 240 | writel(exynos4_jpeg_addr->y, base + EXYNOS4_IMG_BA_PLANE_1_REG); |
| 241 | writel(exynos4_jpeg_addr->cb, base + EXYNOS4_IMG_BA_PLANE_2_REG); |
| 242 | writel(exynos4_jpeg_addr->cr, base + EXYNOS4_IMG_BA_PLANE_3_REG); |
| 243 | } |
| 244 | |
| 245 | void exynos4_jpeg_set_encode_tbl_select(void __iomem *base, |
| 246 | enum exynos4_jpeg_img_quality_level level) |
| 247 | { |
| 248 | unsigned int reg; |
| 249 | |
| 250 | reg = EXYNOS4_Q_TBL_COMP1_0 | EXYNOS4_Q_TBL_COMP2_1 | |
| 251 | EXYNOS4_Q_TBL_COMP3_1 | |
| 252 | EXYNOS4_HUFF_TBL_COMP1_AC_0_DC_1 | |
| 253 | EXYNOS4_HUFF_TBL_COMP2_AC_0_DC_0 | |
| 254 | EXYNOS4_HUFF_TBL_COMP3_AC_1_DC_1; |
| 255 | |
| 256 | writel(reg, base + EXYNOS4_TBL_SEL_REG); |
| 257 | } |
| 258 | |
Andrzej Pietrasiewicz | 6c96dbb | 2015-09-18 11:20:58 -0300 | [diff] [blame] | 259 | void exynos4_jpeg_set_dec_components(void __iomem *base, int n) |
| 260 | { |
| 261 | unsigned int reg; |
| 262 | |
| 263 | reg = readl(base + EXYNOS4_TBL_SEL_REG); |
| 264 | |
| 265 | reg |= EXYNOS4_NF(n); |
| 266 | writel(reg, base + EXYNOS4_TBL_SEL_REG); |
| 267 | } |
| 268 | |
| 269 | void exynos4_jpeg_select_dec_q_tbl(void __iomem *base, char c, char x) |
| 270 | { |
| 271 | unsigned int reg; |
| 272 | |
| 273 | reg = readl(base + EXYNOS4_TBL_SEL_REG); |
| 274 | |
| 275 | reg |= EXYNOS4_Q_TBL_COMP(c, x); |
| 276 | writel(reg, base + EXYNOS4_TBL_SEL_REG); |
| 277 | } |
| 278 | |
| 279 | void exynos4_jpeg_select_dec_h_tbl(void __iomem *base, char c, char x) |
| 280 | { |
| 281 | unsigned int reg; |
| 282 | |
| 283 | reg = readl(base + EXYNOS4_TBL_SEL_REG); |
| 284 | |
| 285 | reg |= EXYNOS4_HUFF_TBL_COMP(c, x); |
| 286 | writel(reg, base + EXYNOS4_TBL_SEL_REG); |
| 287 | } |
| 288 | |
Jacek Anaszewski | 80529ae | 2013-12-18 11:04:44 -0300 | [diff] [blame] | 289 | void exynos4_jpeg_set_encode_hoff_cnt(void __iomem *base, unsigned int fmt) |
| 290 | { |
| 291 | if (fmt == V4L2_PIX_FMT_GREY) |
| 292 | writel(0xd2, base + EXYNOS4_HUFF_CNT_REG); |
| 293 | else |
| 294 | writel(0x1a2, base + EXYNOS4_HUFF_CNT_REG); |
| 295 | } |
| 296 | |
| 297 | unsigned int exynos4_jpeg_get_stream_size(void __iomem *base) |
| 298 | { |
| 299 | unsigned int size; |
| 300 | |
| 301 | size = readl(base + EXYNOS4_BITSTREAM_SIZE_REG); |
| 302 | return size; |
| 303 | } |
| 304 | |
| 305 | void exynos4_jpeg_set_dec_bitstream_size(void __iomem *base, unsigned int size) |
| 306 | { |
| 307 | writel(size, base + EXYNOS4_BITSTREAM_SIZE_REG); |
| 308 | } |
| 309 | |
| 310 | void exynos4_jpeg_get_frame_size(void __iomem *base, |
| 311 | unsigned int *width, unsigned int *height) |
| 312 | { |
| 313 | *width = (readl(base + EXYNOS4_DECODE_XY_SIZE_REG) & |
| 314 | EXYNOS4_DECODED_SIZE_MASK); |
| 315 | *height = (readl(base + EXYNOS4_DECODE_XY_SIZE_REG) >> 16) & |
| 316 | EXYNOS4_DECODED_SIZE_MASK; |
| 317 | } |
| 318 | |
| 319 | unsigned int exynos4_jpeg_get_frame_fmt(void __iomem *base) |
| 320 | { |
| 321 | return readl(base + EXYNOS4_DECODE_IMG_FMT_REG) & |
| 322 | EXYNOS4_JPEG_DECODED_IMG_FMT_MASK; |
| 323 | } |
| 324 | |
| 325 | void exynos4_jpeg_set_timer_count(void __iomem *base, unsigned int size) |
| 326 | { |
| 327 | writel(size, base + EXYNOS4_INT_TIMER_COUNT_REG); |
| 328 | } |