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Laurent Pinchartdf330512013-05-15 11:36:19 -03001/*
2 * Xilinx Video DMA
3 *
4 * Copyright (C) 2013-2015 Ideas on Board
5 * Copyright (C) 2013-2015 Xilinx, Inc.
6 *
7 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
8 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef __XILINX_VIP_DMA_H__
16#define __XILINX_VIP_DMA_H__
17
18#include <linux/dmaengine.h>
19#include <linux/mutex.h>
20#include <linux/spinlock.h>
21#include <linux/videodev2.h>
22
23#include <media/media-entity.h>
24#include <media/v4l2-dev.h>
Junghak Sungc1399902015-09-22 10:30:29 -030025#include <media/videobuf2-v4l2.h>
Laurent Pinchartdf330512013-05-15 11:36:19 -030026
27struct dma_chan;
28struct xvip_composite_device;
29struct xvip_video_format;
30
31/**
32 * struct xvip_pipeline - Xilinx Video IP pipeline structure
33 * @pipe: media pipeline
34 * @lock: protects the pipeline @stream_count
35 * @use_count: number of DMA engines using the pipeline
36 * @stream_count: number of DMA engines currently streaming
37 * @num_dmas: number of DMA engines in the pipeline
38 * @output: DMA engine at the output of the pipeline
39 */
40struct xvip_pipeline {
41 struct media_pipeline pipe;
42
43 struct mutex lock;
44 unsigned int use_count;
45 unsigned int stream_count;
46
47 unsigned int num_dmas;
48 struct xvip_dma *output;
49};
50
51static inline struct xvip_pipeline *to_xvip_pipeline(struct media_entity *e)
52{
53 return container_of(e->pipe, struct xvip_pipeline, pipe);
54}
55
56/**
57 * struct xvip_dma - Video DMA channel
58 * @list: list entry in a composite device dmas list
59 * @video: V4L2 video device associated with the DMA channel
60 * @pad: media pad for the video device entity
61 * @xdev: composite device the DMA channel belongs to
62 * @pipe: pipeline belonging to the DMA channel
63 * @port: composite device DT node port number for the DMA channel
64 * @lock: protects the @format, @fmtinfo and @queue fields
65 * @format: active V4L2 pixel format
66 * @fmtinfo: format information corresponding to the active @format
67 * @queue: vb2 buffers queue
Laurent Pinchartdf330512013-05-15 11:36:19 -030068 * @sequence: V4L2 buffers sequence number
69 * @queued_bufs: list of queued buffers
70 * @queued_lock: protects the buf_queued list
71 * @dma: DMA engine channel
72 * @align: transfer alignment required by the DMA channel (in bytes)
73 * @xt: dma interleaved template for dma configuration
74 * @sgl: data chunk structure for dma_interleaved_template
75 */
76struct xvip_dma {
77 struct list_head list;
78 struct video_device video;
79 struct media_pad pad;
80
81 struct xvip_composite_device *xdev;
82 struct xvip_pipeline pipe;
83 unsigned int port;
84
85 struct mutex lock;
86 struct v4l2_pix_format format;
87 const struct xvip_video_format *fmtinfo;
88
89 struct vb2_queue queue;
Laurent Pinchartdf330512013-05-15 11:36:19 -030090 unsigned int sequence;
91
92 struct list_head queued_bufs;
93 spinlock_t queued_lock;
94
95 struct dma_chan *dma;
96 unsigned int align;
97 struct dma_interleaved_template xt;
98 struct data_chunk sgl[1];
99};
100
101#define to_xvip_dma(vdev) container_of(vdev, struct xvip_dma, video)
102
103int xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma,
104 enum v4l2_buf_type type, unsigned int port);
105void xvip_dma_cleanup(struct xvip_dma *dma);
106
107#endif /* __XILINX_VIP_DMA_H__ */