Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 7dfbf876eefc88fd5c2e691efaddf7ec346a1bce / . / arch / arm64 / boot / dts / qcom / dsi-hx83112b-truly-1080p-video.dtsi
blob: 10f4b6d28ab8ff0d579f12210e86b649a4166783 [file] [log] [blame]
jialongjhan7dfbf872020-04-21 20:24:23 +0800[diff] [blame^]1/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&mdss_mdp {
14 dsi_hx83112b_truly_1080p_video: qcom,mdss_dsi_hx83112b_truly_1080p_video {
15 qcom,mdss-dsi-panel-name =
16 "hx83112b truly 1080p video mode dsi panel";
17 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
18 qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
19 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
20 qcom,mdss-dsi-panel-framerate = <60>;
21 qcom,mdss-dsi-virtual-channel-id = <0>;
22 qcom,mdss-dsi-stream = <0>;
23 qcom,mdss-dsi-panel-width = <1080>;
24 qcom,mdss-dsi-panel-height = <2160>;
25 qcom,mdss-dsi-h-front-porch = <40>;
26 qcom,mdss-dsi-h-back-porch = <12>;
27 qcom,mdss-dsi-h-pulse-width = <4>;
28 qcom,mdss-dsi-h-sync-skew = <0>;
29 qcom,mdss-dsi-v-back-porch = <2>;
30 qcom,mdss-dsi-v-front-porch = <32>;
31 qcom,mdss-dsi-v-pulse-width = <2>;
32 qcom,mdss-dsi-h-left-border = <0>;
33 qcom,mdss-dsi-h-right-border = <0>;
34 qcom,mdss-dsi-v-top-border = <0>;
35 qcom,mdss-dsi-v-bottom-border = <0>;
36 qcom,mdss-dsi-bpp = <24>;
37 qcom,mdss-dsi-underflow-color = <0xff>;
38 qcom,mdss-dsi-border-color = <0>;
39 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
40 qcom,mdss-dsi-te-pin-select = <1>;
41 qcom,mdss-dsi-te-dcs-command = <1>;
42 qcom,mdss-dsi-te-check-enable;
43 qcom,mdss-dsi-te-using-te-pin;
44 //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
45 qcom,mdss-dsi-h-sync-pulse = <0>;
46 qcom,mdss-dsi-traffic-mode = "burst_mode";
47 qcom,mdss-dsi-bllp-eof-power-mode;
48 qcom,mdss-dsi-bllp-power-mode;
49 qcom,mdss-dsi-lane-0-state;
50 qcom,mdss-dsi-lane-1-state;
51 qcom,mdss-dsi-lane-2-state;
52 qcom,mdss-dsi-lane-3-state;
53 //qcom,mdss-dsi-hfp-power-mode;
54 //qcom,mdss-dsi-hbp-power-mode;
55 qcom,mdss-dsi-hsa-power-mode;
56 qcom,mdss-pan-physical-width-dimension=<65>;
57 qcom,mdss-pan-physical-height-dimension=<128>;
58 qcom,mdss-dsi-panel-timings = [e6 38 26 00 68 6e 2a
59 3c 44 03 04 00];
60 qcom,mdss-dsi-t-clk-post = <0x0d>;
61 qcom,mdss-dsi-t-clk-pre = <0x2f>;
62 qcom,mdss-dsi-bl-min-level = <1>;
63 qcom,mdss-dsi-bl-max-level = <4095>;
64 qcom,mdss-dsi-dma-trigger = "trigger_sw";
65 qcom,mdss-dsi-mdp-trigger = "none";
66 //[Arima][8901][Jialong]LCM initial code from IC firmware Start
67 qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 B9 83 11 2B
68 39 01 00 00 00 00 02 BD 01
69 39 01 00 00 00 00 03 C2 08 70
70 39 01 00 00 00 00 02 BD 03
71 39 01 00 00 00 00 05 B2 04 38 08 70
72 39 01 00 00 00 00 02 BD 00
73 39 01 00 00 00 00 0B B1 F8 27 27 00 00 0B 0E 0B 0E 33
74 39 01 00 00 00 00 03 D2 2D 2D
75 39 01 00 00 00 00 0C B2 80 02 18 80 70 00 08 1C 08 11 05
76 39 01 00 00 00 00 02 E9 D1
77 39 01 00 00 00 00 03 B2 00 08
78 39 01 00 00 00 00 02 E9 00
79 39 01 00 00 00 00 02 BD 02
80 39 01 00 00 00 00 03 B2 B5 0A
81 39 01 00 00 00 00 02 BD 00
82 39 01 00 00 00 00 09 DD 00 00 08 1C 08 34 34 88
83 39 01 00 00 00 00 19 B4 65 6B 00 00 D0 D4 36 CF 06 CE 00 CE 00 00 00 07 00 2A 07 01 07 00 00 2A
84 39 01 00 00 00 00 02 BD 03
85 39 01 00 00 00 00 02 E9 C3
86 39 01 00 00 00 00 04 B4 01 67 2A
87 39 01 00 00 00 00 02 E9 00
88 39 01 00 00 00 00 02 BD 00
89 39 01 00 00 00 00 02 C1 01
90 39 01 00 00 00 00 02 BD 01
91 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
92 39 01 00 00 00 00 02 BD 02
93 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
94 39 01 00 00 00 00 02 BD 03
95 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
96 39 01 00 00 00 00 02 BD 00
97 39 01 00 00 00 00 02 C2 C8
98 39 01 00 00 00 00 02 CC 08
99 39 01 00 00 00 00 26 D3 81 00 00 00 00 01 00 04 00 01 13 40 04 09 09 0B 0B 32 10 08 00 08 32 10 08 00 08 32 10 08 00 08 00 00 0A 08 7B
100 39 01 00 00 00 00 02 E9 C5
101 39 01 00 00 00 00 02 C6 F7
102 39 01 00 00 00 00 02 E9 00
103 39 01 00 00 00 00 02 E9 D4
104 39 01 00 00 00 00 02 C6 6E
105 39 01 00 00 00 00 02 E9 00
106 39 01 00 00 00 00 02 E9 EF
107 39 01 00 00 00 00 02 D3 0C
108 39 01 00 00 00 00 02 E9 00
109 39 01 00 00 00 00 02 BD 01
110 39 01 00 00 00 00 02 E9 C8
111 39 01 00 00 00 00 02 D3 A1
112 39 01 00 00 00 00 02 E9 00
113 39 01 00 00 00 00 02 BD 00
114 39 01 00 00 00 00 39 D5 18 18 19 18 18 20 18 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18 FC FC 00 00 FC FC 00 00
115 39 01 00 00 00 00 31 D6 18 18 19 18 18 20 19 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18
116 39 01 00 00 00 00 19 D8 AA AA AA AF EA AA AA AA AA AF EA AA AA AA AB AF EF AA AA AA AA AF EA AA
117 39 01 00 00 00 00 02 BD 01
118 39 01 00 00 00 00 0D D8 AA AA AB AF EA AA AA AA AE AF EA AA
119 39 01 00 00 00 00 02 BD 02
120 39 01 00 00 00 00 0D D8 AA AA AA AF EA AA AA AA AA AF EA AA
121 39 01 00 00 00 00 02 BD 03
122 39 01 00 00 00 00 19 D8 BA AA AA AF EA AA AA AA AA AF EA AA BA AA AA AF EA AA AA AA AA AF EA AA
123 39 01 00 00 00 00 02 BD 00
124 39 01 00 00 00 00 02 E9 E4
125 39 01 00 00 00 00 03 E7 17 69
126 39 01 00 00 00 00 02 E9 00
127 39 01 00 00 00 00 1A E7 09 09 00 07 E8 00 26 00 07 00 00 E8 32 00 E9 0A 0A 00 00 00 01 01 00 12 04
128 39 01 00 00 00 00 02 BD 01
129 39 01 00 00 00 00 0A E7 02 00 01 20 01 18 08 A8 09
130 39 01 00 00 00 00 02 BD 02
131 39 01 00 00 00 00 04 E7 20 20 00
132 39 01 00 00 00 00 02 BD 03
133 39 01 00 00 00 00 07 E7 00 DC 11 70 00 20
134 39 01 00 00 00 00 02 E9 C9
135 39 01 00 00 00 00 07 E7 2A CE 02 70 01 04
136 39 01 00 00 00 00 02 E9 00
137 39 01 00 00 00 00 02 BD 00
138 39 01 00 00 00 00 02 D1 27
139 05 01 00 00 78 00 02 11 00
140 05 01 00 00 14 00 02 29 00
141 39 01 00 00 00 00 03 51 00 00
142 39 01 00 00 00 00 02 53 24];
143 //[Arima][8901][Jialong]LCM initial code from IC firmware End
144 qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00
145 05 01 00 00 78 00 02 10 00];
146 qcom,mdss-dsi-off-dstb-command = [
147 39 01 00 00 00 00 04 B9 83 11 2A
148 39 01 00 00 00 00 02 BD 00
149 39 01 00 00 50 00 02 B1 09];
150 qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
151 qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
152 qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
153 qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
154 qcom,mdss-dsi-tx-eot-append;
155 qcom,mdss-dsi-lp11-init;
156 qcom,mdss-dsi-post-init-delay = <1>;
157 };
158};