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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
3 * PATA port of the controller. The SATA ports are
4 * driven by AHCI in the usual configuration although
5 * this driver can handle other setups if we need it.
6 *
Alan Coxab771632008-10-27 15:09:10 +00007 * (c) 2006 Red Hat
Jeff Garzik669a5db2006-08-29 18:12:40 -04008 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/pci.h>
Jeff Garzik669a5db2006-08-29 18:12:40 -040013#include <linux/blkdev.h>
14#include <linux/delay.h>
15#include <linux/device.h>
16#include <scsi/scsi_host.h>
17#include <linux/libata.h>
18#include <linux/ata.h>
19
20#define DRV_NAME "pata_jmicron"
Jeff Garzik8bc3fc42007-05-21 20:26:38 -040021#define DRV_VERSION "0.1.5"
Jeff Garzik669a5db2006-08-29 18:12:40 -040022
23typedef enum {
24 PORT_PATA0 = 0,
25 PORT_PATA1 = 1,
26 PORT_SATA = 2,
27} port_type;
28
29/**
30 * jmicron_pre_reset - check for 40/80 pin
Tejun Heocc0680a2007-08-06 18:36:23 +090031 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +090032 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040033 *
34 * Perform the PATA port setup we need.
Tejun Heod4b2bab2007-02-02 16:50:52 +090035 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040036 * On the Jmicron 361/363 there is a single PATA port that can be mapped
37 * either as primary or secondary (or neither). We don't do any policy
38 * and setup here. We assume that has been done by init_one and the
39 * BIOS.
40 */
Tejun Heocc0680a2007-08-06 18:36:23 +090041static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040042{
Tejun Heocc0680a2007-08-06 18:36:23 +090043 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040044 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
45 u32 control;
46 u32 control5;
47 int port_mask = 1<< (4 * ap->port_no);
48 int port = ap->port_no;
49 port_type port_map[2];
50
51 /* Check if our port is enabled */
52 pci_read_config_dword(pdev, 0x40, &control);
53 if ((control & port_mask) == 0)
Alan Coxc9619222006-09-26 17:53:38 +010054 return -ENOENT;
Jeff Garzik669a5db2006-08-29 18:12:40 -040055
56 /* There are two basic mappings. One has the two SATA ports merged
57 as master/slave and the secondary as PATA, the other has only the
58 SATA port mapped */
59 if (control & (1 << 23)) {
60 port_map[0] = PORT_SATA;
61 port_map[1] = PORT_PATA0;
62 } else {
63 port_map[0] = PORT_SATA;
64 port_map[1] = PORT_SATA;
65 }
66
67 /* The 365/366 may have this bit set to map the second PATA port
68 as the internal primary channel */
69 pci_read_config_dword(pdev, 0x80, &control5);
70 if (control5 & (1<<24))
71 port_map[0] = PORT_PATA1;
72
73 /* The two ports may then be logically swapped by the firmware */
74 if (control & (1 << 22))
75 port = port ^ 1;
76
77 /*
78 * Now we know which physical port we are talking about we can
79 * actually do our cable checking etc. Thankfully we don't need
80 * to do the plumbing for other cases.
81 */
Tejun Heo0706efd2007-11-19 18:06:11 +090082 switch (port_map[port]) {
Jeff Garzik669a5db2006-08-29 18:12:40 -040083 case PORT_PATA0:
Tejun Heo0706efd2007-11-19 18:06:11 +090084 if ((control & (1 << 5)) == 0)
85 return -ENOENT;
Jeff Garzik669a5db2006-08-29 18:12:40 -040086 if (control & (1 << 3)) /* 40/80 pin primary */
87 ap->cbl = ATA_CBL_PATA40;
88 else
89 ap->cbl = ATA_CBL_PATA80;
90 break;
91 case PORT_PATA1:
92 /* Bit 21 is set if the port is enabled */
93 if ((control5 & (1 << 21)) == 0)
Tejun Heo0706efd2007-11-19 18:06:11 +090094 return -ENOENT;
Jeff Garzik669a5db2006-08-29 18:12:40 -040095 if (control5 & (1 << 19)) /* 40/80 pin secondary */
96 ap->cbl = ATA_CBL_PATA40;
97 else
98 ap->cbl = ATA_CBL_PATA80;
99 break;
100 case PORT_SATA:
101 ap->cbl = ATA_CBL_SATA;
102 break;
103 }
Tejun Heo9363c382008-04-07 22:47:16 +0900104 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400105}
106
Jeff Garzik669a5db2006-08-29 18:12:40 -0400107/* No PIO or DMA methods needed for this device */
108
109static struct scsi_host_template jmicron_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900110 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400111};
112
Tejun Heo029cfd62008-03-25 12:22:49 +0900113static struct ata_port_operations jmicron_ops = {
114 .inherits = &ata_bmdma_port_ops,
Tejun Heo887125e2008-03-25 12:22:49 +0900115 .prereset = jmicron_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400116};
117
118
119/**
120 * jmicron_init_one - Register Jmicron ATA PCI device with kernel services
121 * @pdev: PCI device to register
122 * @ent: Entry in jmicron_pci_tbl matching with @pdev
123 *
124 * Called from kernel PCI layer.
125 *
126 * LOCKING:
127 * Inherited from PCI layer (may sleep).
128 *
129 * RETURNS:
130 * Zero on success, or -ERRNO value.
131 */
132
133static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
134{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200135 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400136 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400137
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100138 .pio_mask = ATA_PIO4,
139 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400140 .udma_mask = ATA_UDMA5,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400141
142 .port_ops = &jmicron_ops,
143 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200144 const struct ata_port_info *ppi[] = { &info, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400145
Chuansheng Liue6b7e412014-09-01 08:38:03 +0800146 /*
147 * The JMicron chip 361/363 contains one SATA controller and one
148 * PATA controller,for powering on these both controllers, we must
149 * follow the sequence one by one, otherwise one of them can not be
150 * powered on successfully, so here we disable the async suspend
151 * method for these chips.
152 */
153 if (pdev->vendor == PCI_VENDOR_ID_JMICRON &&
154 (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 ||
155 pdev->device == PCI_DEVICE_ID_JMICRON_JMB361))
156 device_disable_async_suspend(&pdev->dev);
157
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200158 return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400159}
160
161static const struct pci_device_id jmicron_pci_tbl[] = {
Tejun Heoa01f48b2007-10-07 07:04:50 +0900162 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
163 PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400164 { } /* terminate list */
165};
166
167static struct pci_driver jmicron_pci_driver = {
168 .name = DRV_NAME,
169 .id_table = jmicron_pci_tbl,
170 .probe = jmicron_init_one,
171 .remove = ata_pci_remove_one,
Bartlomiej Zolnierkiewicz58eb8cd2014-05-07 17:17:44 +0200172#ifdef CONFIG_PM_SLEEP
Aland39ca892006-11-22 17:18:30 +0000173 .suspend = ata_pci_device_suspend,
Tejun Heo960627b2007-02-26 20:09:02 +0900174 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900175#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400176};
177
Axel Lin2fc75da2012-04-19 13:43:05 +0800178module_pci_driver(jmicron_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400179
180MODULE_AUTHOR("Alan Cox");
181MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
182MODULE_LICENSE("GPL");
183MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
184MODULE_VERSION(DRV_VERSION);
185