Huacai Chen | e292ccd | 2014-11-04 14:15:31 +0800 | [diff] [blame] | 1 | #ifndef _ASM_HPET_H |
| 2 | #define _ASM_HPET_H |
| 3 | |
| 4 | #ifdef CONFIG_RS780_HPET |
| 5 | |
| 6 | #define HPET_MMAP_SIZE 1024 |
| 7 | |
| 8 | #define HPET_ID 0x000 |
| 9 | #define HPET_PERIOD 0x004 |
| 10 | #define HPET_CFG 0x010 |
| 11 | #define HPET_STATUS 0x020 |
| 12 | #define HPET_COUNTER 0x0f0 |
| 13 | |
| 14 | #define HPET_Tn_CFG(n) (0x100 + 0x20 * n) |
| 15 | #define HPET_Tn_CMP(n) (0x108 + 0x20 * n) |
| 16 | #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n) |
| 17 | |
| 18 | #define HPET_T0_IRS 0x001 |
| 19 | #define HPET_T1_IRS 0x002 |
| 20 | #define HPET_T3_IRS 0x004 |
| 21 | |
| 22 | #define HPET_T0_CFG 0x100 |
| 23 | #define HPET_T0_CMP 0x108 |
| 24 | #define HPET_T0_ROUTE 0x110 |
| 25 | #define HPET_T1_CFG 0x120 |
| 26 | #define HPET_T1_CMP 0x128 |
| 27 | #define HPET_T1_ROUTE 0x130 |
| 28 | #define HPET_T2_CFG 0x140 |
| 29 | #define HPET_T2_CMP 0x148 |
| 30 | #define HPET_T2_ROUTE 0x150 |
| 31 | |
| 32 | #define HPET_ID_REV 0x000000ff |
| 33 | #define HPET_ID_NUMBER 0x00001f00 |
| 34 | #define HPET_ID_64BIT 0x00002000 |
| 35 | #define HPET_ID_LEGSUP 0x00008000 |
| 36 | #define HPET_ID_VENDOR 0xffff0000 |
| 37 | #define HPET_ID_NUMBER_SHIFT 8 |
| 38 | #define HPET_ID_VENDOR_SHIFT 16 |
| 39 | |
| 40 | #define HPET_CFG_ENABLE 0x001 |
| 41 | #define HPET_CFG_LEGACY 0x002 |
| 42 | #define HPET_LEGACY_8254 2 |
| 43 | #define HPET_LEGACY_RTC 8 |
| 44 | |
| 45 | #define HPET_TN_LEVEL 0x0002 |
| 46 | #define HPET_TN_ENABLE 0x0004 |
| 47 | #define HPET_TN_PERIODIC 0x0008 |
| 48 | #define HPET_TN_PERIODIC_CAP 0x0010 |
| 49 | #define HPET_TN_64BIT_CAP 0x0020 |
| 50 | #define HPET_TN_SETVAL 0x0040 |
| 51 | #define HPET_TN_32BIT 0x0100 |
| 52 | #define HPET_TN_ROUTE 0x3e00 |
| 53 | #define HPET_TN_FSB 0x4000 |
| 54 | #define HPET_TN_FSB_CAP 0x8000 |
| 55 | #define HPET_TN_ROUTE_SHIFT 9 |
| 56 | |
| 57 | /* Max HPET Period is 10^8 femto sec as in HPET spec */ |
| 58 | #define HPET_MAX_PERIOD 100000000UL |
| 59 | /* |
| 60 | * Min HPET period is 10^5 femto sec just for safety. If it is less than this, |
| 61 | * then 32 bit HPET counter wrapsaround in less than 0.5 sec. |
| 62 | */ |
| 63 | #define HPET_MIN_PERIOD 100000UL |
| 64 | |
| 65 | #define HPET_ADDR 0x20000 |
| 66 | #define HPET_MMIO_ADDR 0x90000e0000020000 |
| 67 | #define HPET_FREQ 14318780 |
| 68 | #define HPET_COMPARE_VAL ((HPET_FREQ + HZ / 2) / HZ) |
| 69 | #define HPET_T0_IRQ 0 |
| 70 | |
| 71 | extern void __init setup_hpet_timer(void); |
| 72 | #endif /* CONFIG_RS780_HPET */ |
| 73 | #endif /* _ASM_HPET_H */ |