Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1 | Qualcomm Technologies, Inc. SDE KMS |
| 2 | |
| 3 | Snapdragon Display Engine implements Linux DRM/KMS APIs to drive user |
| 4 | interface to different panel interfaces. SDE driver is the core of |
| 5 | display subsystem which manage all data paths to different panel interfaces. |
| 6 | |
| 7 | Required properties |
| 8 | - compatible: Must be "qcom,sde-kms" |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 9 | - compatible: "msm-hdmi-audio-codec-rx"; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 10 | - reg: Offset and length of the register set for the device. |
| 11 | - reg-names : Names to refer to register sets related to this device |
| 12 | - clocks: List of Phandles for clock device nodes |
| 13 | needed by the device. |
| 14 | - clock-names: List of clock names needed by the device. |
| 15 | - mmagic-supply: Phandle for mmagic mdss supply regulator device node. |
| 16 | - vdd-supply: Phandle for vdd regulator device node. |
| 17 | - interrupt-parent: Must be core interrupt controller. |
| 18 | - interrupts: Interrupt associated with MDSS. |
| 19 | - interrupt-controller: Mark the device node as an interrupt controller. |
| 20 | - #interrupt-cells: Should be one. The first cell is interrupt number. |
| 21 | - iommus: Specifies the SID's used by this context bank. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 22 | - qcom,sde-sspp-type: Array of strings for SDE source surface pipes type information. |
| 23 | A source pipe can be "vig", "rgb", "dma" or "cursor" type. |
| 24 | Number of xin ids defined should match the number of offsets |
| 25 | defined in property: qcom,sde-sspp-off. |
| 26 | - qcom,sde-sspp-off: Array of offset for SDE source surface pipes. The offsets |
| 27 | are calculated from register "mdp_phys" defined in |
| 28 | reg property + "sde-off". The number of offsets defined here should |
| 29 | reflect the amount of pipes that can be active in SDE for |
| 30 | this configuration. |
| 31 | - qcom,sde-sspp-xin-id: Array of VBIF clients ids (xins) corresponding |
| 32 | to the respective source pipes. Number of xin ids |
| 33 | defined should match the number of offsets |
| 34 | defined in property: qcom,sde-sspp-off. |
| 35 | - qcom,sde-ctl-off: Array of offset addresses for the available ctl |
| 36 | hw blocks within SDE, these offsets are |
| 37 | calculated from register "mdp_phys" defined in |
| 38 | reg property. The number of ctl offsets defined |
| 39 | here should reflect the number of control paths |
| 40 | that can be configured concurrently on SDE for |
| 41 | this configuration. |
| 42 | - qcom,sde-wb-off: Array of offset addresses for the programmable |
| 43 | writeback blocks within SDE. |
| 44 | - qcom,sde-wb-xin-id: Array of VBIF clients ids (xins) corresponding |
| 45 | to the respective writeback. Number of xin ids |
| 46 | defined should match the number of offsets |
| 47 | defined in property: qcom,sde-wb-off. |
| 48 | - qcom,sde-mixer-off: Array of offset addresses for the available |
| 49 | mixer blocks that can drive data to panel |
| 50 | interfaces. These offsets are be calculated from |
| 51 | register "mdp_phys" defined in reg property. |
| 52 | The number of offsets defined should reflect the |
| 53 | amount of mixers that can drive data to a panel |
| 54 | interface. |
| 55 | - qcom,sde-dspp-off: Array of offset addresses for the available dspp |
| 56 | blocks. These offsets are calculated from |
| 57 | register "mdp_phys" defined in reg property. |
| 58 | - qcom,sde-pp-off: Array of offset addresses for the available |
| 59 | pingpong blocks. These offsets are calculated |
| 60 | from register "mdp_phys" defined in reg property. |
Clarence Ip | 8e69ad0 | 2016-12-09 09:43:57 -0500 | [diff] [blame] | 61 | - qcom,sde-pp-slave: Array of flags indicating whether each ping pong |
| 62 | block may be configured as a pp slave. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 63 | - qcom,sde-intf-off: Array of offset addresses for the available SDE |
| 64 | interface blocks that can drive data to a |
| 65 | panel controller. The offsets are calculated |
| 66 | from "mdp_phys" defined in reg property. The number |
| 67 | of offsets defined should reflect the number of |
| 68 | programmable interface blocks available in hardware. |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 69 | - qcom,sde-mixer-blend-op-off Array of offset addresses for the available |
| 70 | blending stages. The offsets are relative to |
| 71 | qcom,sde-mixer-off. |
| 72 | - qcom,sde-mixer-pair-mask Array of mixer numbers that can be paired with |
| 73 | mixer number corresponding to the array index. |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 74 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 75 | Optional properties: |
| 76 | - clock-rate: List of clock rates in Hz. |
Alan Kwong | 83b6cbe | 2016-09-17 20:08:37 -0400 | [diff] [blame] | 77 | - clock-max-rate: List of maximum clock rate in Hz that this device supports. |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 78 | - qcom,platform-supply-entries: A node that lists the elements of the supply. There |
| 79 | can be more than one instance of this binding, |
| 80 | in which case the entry would be appended with |
| 81 | the supply entry index. |
| 82 | e.g. qcom,platform-supply-entry@0 |
| 83 | -- reg: offset and length of the register set for the device. |
| 84 | -- qcom,supply-name: name of the supply (vdd/vdda/vddio) |
| 85 | -- qcom,supply-min-voltage: minimum voltage level (uV) |
| 86 | -- qcom,supply-max-voltage: maximum voltage level (uV) |
| 87 | -- qcom,supply-enable-load: load drawn (uA) from enabled supply |
| 88 | -- qcom,supply-disable-load: load drawn (uA) from disabled supply |
| 89 | -- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on |
| 90 | -- qcom,supply-post-on-sleep: time to sleep (ms) after turning on |
| 91 | -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off |
| 92 | -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 93 | - qcom,sde-sspp-src-size: A u32 value indicates the address range for each sspp. |
| 94 | - qcom,sde-mixer-size: A u32 value indicates the address range for each mixer. |
| 95 | - qcom,sde-ctl-size: A u32 value indicates the address range for each ctl. |
| 96 | - qcom,sde-dspp-size: A u32 value indicates the address range for each dspp. |
| 97 | - qcom,sde-intf-size: A u32 value indicates the address range for each intf. |
| 98 | - qcom,sde-dsc-size: A u32 value indicates the address range for each dsc. |
| 99 | - qcom,sde-cdm-size: A u32 value indicates the address range for each cdm. |
| 100 | - qcom,sde-pp-size: A u32 value indicates the address range for each pingpong. |
| 101 | - qcom,sde-wb-size: A u32 value indicates the address range for each writeback. |
| 102 | - qcom,sde-len: A u32 entry for SDE address range. |
| 103 | - qcom,sde-intf-max-prefetch-lines: Array of u32 values for max prefetch lines on |
| 104 | each interface. |
| 105 | - qcom,sde-sspp-linewidth: A u32 value indicates the max sspp line width. |
| 106 | - qcom,sde-mixer-linewidth: A u32 value indicates the max mixer line width. |
| 107 | - qcom,sde-wb-linewidth: A u32 value indicates the max writeback line width. |
| 108 | - qcom,sde-sspp-scale-size: A u32 value indicates the scaling block size on sspp. |
| 109 | - qcom,sde-mixer-blendstages: A u32 value indicates the max mixer blend stages for |
| 110 | alpha blending. |
| 111 | - qcom,sde-qseed-type: A string entry indiates qseed support on sspp and wb. |
| 112 | It supports "qssedv3" and "qseedv2" entries for qseed |
| 113 | type. By default "qseedv2" is used if this optional property |
| 114 | is not defined. |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 115 | - qcom,sde-csc-type: A string entry indicates csc support on sspp and wb. |
| 116 | It supports "csc" and "csc-10bit" entries for csc |
| 117 | type. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 118 | - qcom,sde-highest-bank-bit: A u32 property to indicate GPU/Camera/Video highest memory |
| 119 | bank bit used for tile format buffers. |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 120 | - qcom,sde-ubwc-version: Property to specify the UBWC feature version. |
| 121 | - qcom,sde-ubwc-static: Property to specify the default UBWC static |
| 122 | configuration value. |
| 123 | - qcom,sde-ubwc-swizzle: Property to specify the default UBWC swizzle |
| 124 | configuration value. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 125 | - qcom,sde-panic-per-pipe: Boolean property to indicate if panic signal |
| 126 | control feature is available on each source pipe. |
| 127 | - qcom,sde-has-src-split: Boolean property to indicate if source split |
| 128 | feature is available or not. |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 129 | - qcom,sde-has-dim-layer: Boolean property to indicate if mixer has dim layer |
| 130 | feature is available or not. |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 131 | - qcom,sde-has-idle-pc: Boolean property to indicate if target has idle |
| 132 | power collapse feature available or not. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 133 | - qcom,sde-has-mixer-gc: Boolean property to indicate if mixer has gamma correction |
| 134 | feature available or not. |
| 135 | - qcom,sde-has-cdp: Boolean property to indicate if cdp feature is |
| 136 | available or not. |
| 137 | - qcom,sde-sspp-clk-ctrl: Array of offsets describing clk control |
| 138 | offsets for dynamic clock gating. 1st value |
| 139 | in the array represents offset of the control |
| 140 | register. 2nd value represents bit offset within |
| 141 | control register. Number of offsets defined should |
| 142 | match the number of offsets defined in |
| 143 | property: qcom,sde-sspp-off |
| 144 | - qcom,sde-sspp-clk-status: Array of offsets describing clk status |
| 145 | offsets for dynamic clock gating. 1st value |
| 146 | in the array represents offset of the status |
| 147 | register. 2nd value represents bit offset within |
| 148 | control register. Number of offsets defined should |
| 149 | match the number of offsets defined in |
| 150 | property: qcom,sde-sspp-off. |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 151 | - qcom,sde-sspp-excl-rect: Array of u32 values indicating exclusion rectangle |
| 152 | support on each sspp. |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 153 | - qcom,sde-sspp-smart-dma-priority: Array of u32 values indicating hw pipe |
| 154 | priority of secondary rectangles when smart dma |
| 155 | is supported. Number of priority values should |
| 156 | match the number of offsets defined in |
| 157 | qcom,sde-sspp-off node. Zero indicates no support |
| 158 | for smart dma for the sspp. |
| 159 | - qcom,sde-smart-dma-rev: A string entry indicating the smart dma version |
| 160 | supported on the device. Supported entries are |
| 161 | "smart_dma_v1" and "smart_dma_v2". |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 162 | - qcom,sde-intf-type: Array of string provides the interface type information. |
| 163 | Possible string values |
| 164 | "dsi" - dsi display interface |
| 165 | "dp" - Display Port interface |
| 166 | "hdmi" - HDMI display interface |
| 167 | An interface is considered as "none" if interface type |
| 168 | is not defined. |
| 169 | - qcom,sde-off: SDE offset from "mdp_phys" defined in reg property. |
| 170 | - qcom,sde-cdm-off: Array of offset addresses for the available |
| 171 | cdm blocks. These offsets will be calculated from |
| 172 | register "mdp_phys" defined in reg property. |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 173 | - qcom,sde-vbif-off: Array of offset addresses for the available |
| 174 | vbif blocks. These offsets will be calculated from |
| 175 | register "vbif_phys" defined in reg property. |
| 176 | - qcom,sde-vbif-size: A u32 value indicates the vbif block address range. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 177 | - qcom,sde-te-off: A u32 offset indicates the te block offset on pingpong. |
| 178 | This offset is 0x0 by default. |
| 179 | - qcom,sde-te2-off: A u32 offset indicates the te2 block offset on pingpong. |
| 180 | - qcom,sde-te-size: A u32 value indicates the te block address range. |
| 181 | - qcom,sde-te2-size: A u32 value indicates the te2 block address range. |
| 182 | - qcom,sde-dsc-off: A u32 offset indicates the dsc block offset on pingpong. |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 183 | - qcom,sde-sspp-vig-blocks: A node that lists the blocks inside the VIG hardware. The |
| 184 | block entries will contain the offset and version (if needed) |
| 185 | of each feature block. The presence of a block entry |
| 186 | indicates that the SSPP VIG contains that feature hardware. |
| 187 | e.g. qcom,sde-sspp-vig-blocks |
| 188 | -- qcom,sde-vig-csc-off: offset of CSC hardware |
| 189 | -- qcom,sde-vig-qseed-off: offset of QSEED hardware |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 190 | -- qcom,sde-vig-qseed-size: A u32 address range for qseed scaler. |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 191 | -- qcom,sde-vig-pcc: offset and version of PCC hardware |
| 192 | -- qcom,sde-vig-hsic: offset and version of global PA adjustment |
| 193 | -- qcom,sde-vig-memcolor: offset and version of PA memcolor hardware |
| 194 | - qcom,sde-sspp-rgb-blocks: A node that lists the blocks inside the RGB hardware. The |
| 195 | block entries will contain the offset and version (if needed) |
| 196 | of each feature block. The presence of a block entry |
| 197 | indicates that the SSPP RGB contains that feature hardware. |
| 198 | e.g. qcom,sde-sspp-vig-blocks |
| 199 | -- qcom,sde-rgb-scaler-off: offset of RGB scaler hardware |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 200 | -- qcom,sde-rgb-scaler-size: A u32 address range for scaler. |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 201 | -- qcom,sde-rgb-pcc: offset and version of PCC hardware |
| 202 | - qcom,sde-dspp-blocks: A node that lists the blocks inside the DSPP hardware. The |
| 203 | block entries will contain the offset and version of each |
| 204 | feature block. The presence of a block entry indicates that |
| 205 | the DSPP contains that feature hardware. |
| 206 | e.g. qcom,sde-dspp-blocks |
| 207 | -- qcom,sde-dspp-pcc: offset and version of PCC hardware |
| 208 | -- qcom,sde-dspp-gc: offset and version of GC hardware |
| 209 | -- qcom,sde-dspp-hsic: offset and version of global PA adjustment |
| 210 | -- qcom,sde-dspp-memcolor: offset and version of PA memcolor hardware |
| 211 | -- qcom,sde-dspp-sixzone: offset and version of PA sixzone hardware |
| 212 | -- qcom,sde-dspp-gamut: offset and version of Gamut mapping hardware |
| 213 | -- qcom,sde-dspp-dither: offset and version of dither hardware |
| 214 | -- qcom,sde-dspp-hist: offset and version of histogram hardware |
| 215 | -- qcom,sde-dspp-vlut: offset and version of PA vLUT hardware |
| 216 | - qcom,sde-mixer-blocks: A node that lists the blocks inside the layer mixer hardware. The |
| 217 | block entries will contain the offset and version (if needed) |
| 218 | of each feature block. The presence of a block entry |
| 219 | indicates that the layer mixer contains that feature hardware. |
| 220 | e.g. qcom,sde-mixer-blocks |
| 221 | -- qcom,sde-mixer-gc: offset and version of mixer GC hardware |
| 222 | - qcom,sde-dspp-ad-off: Array of u32 offsets indicate the ad block offset from the |
| 223 | DSPP offset. Since AD hardware is represented as part of |
| 224 | DSPP block, the AD offsets must be offset from the |
| 225 | corresponding DSPP base. |
| 226 | - qcom,sde-dspp-ad-version A u32 value indicating the version of the AD hardware |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 227 | - qcom,sde-vbif-id: Array of vbif ids corresponding to the |
| 228 | offsets defined in property: qcom,sde-vbif-off. |
| 229 | - qcom,sde-vbif-default-ot-rd-limit: A u32 value indicates the default read OT limit |
| 230 | - qcom,sde-vbif-default-ot-wr-limit: A u32 value indicates the default write OT limit |
| 231 | - qcom,sde-vbif-dynamic-ot-rd-limit: A series of 2 cell property, with a format |
| 232 | of (pps, OT limit), where pps is pixel per second and |
| 233 | OT limit is the read limit to apply if the given |
| 234 | pps is not exceeded. |
| 235 | - qcom,sde-vbif-dynamic-ot-wr-limit: A series of 2 cell property, with a format |
| 236 | of (pps, OT limit), where pps is pixel per second and |
| 237 | OT limit is the write limit to apply if the given |
| 238 | pps is not exceeded. |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame^] | 239 | - qcom,sde-vbif-memtype-0: Array of u32 vbif memory type settings, group 0 |
| 240 | - qcom,sde-vbif-memtype-1: Array of u32 vbif memory type settings, group 1 |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 241 | - qcom,sde-wb-id: Array of writeback ids corresponding to the |
| 242 | offsets defined in property: qcom,sde-wb-off. |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 243 | - qcom,sde-wb-clk-ctrl: Array of 2 cell property describing clk control |
| 244 | offsets for dynamic clock gating. 1st value |
| 245 | in the array represents offset of the control |
| 246 | register. 2nd value represents bit offset within |
| 247 | control register. Number of offsets defined should |
| 248 | match the number of offsets defined in |
| 249 | property: qcom,sde-wb-off |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 250 | - qcom,sde-reg-dma-off: Offset of the register dma hardware block from |
| 251 | "regdma_phys" defined in reg property. |
| 252 | - qcom,sde-reg-dma-version: Version of the reg dma hardware block. |
| 253 | - qcom,sde-reg-dma-trigger-off: Offset of the lut dma trigger reg from "mdp_phys" |
| 254 | defined in reg property. |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 255 | - qcom,sde-dram-channels: This represents the number of channels in the |
| 256 | Bus memory controller. |
| 257 | - qcom,sde-num-nrt-paths: Integer property represents the number of non-realtime |
| 258 | paths in each Bus Scaling Usecase. This value depends on |
| 259 | number of AXI ports that are dedicated to non-realtime VBIF |
| 260 | for particular chipset. |
| 261 | These paths must be defined after rt-paths in |
| 262 | "qcom,msm-bus,vectors-KBps" vector request. |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 263 | - qcom,sde-max-bw-low-kbps: This value indicates the max bandwidth in Kbps |
| 264 | that can be supported without underflow. |
| 265 | This is a low bandwidth threshold which should |
| 266 | be applied in most scenarios to be safe from |
| 267 | underflows when unable to satisfy bandwidth |
| 268 | requirements. |
| 269 | - qcom,sde-max-bw-high-kbps: This value indicates the max bandwidth in Kbps |
| 270 | that can be supported without underflow. |
| 271 | This is a high bandwidth threshold which can be |
| 272 | applied in scenarios where panel interface can |
| 273 | be more tolerant to memory latency such as |
| 274 | command mode panels. |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 275 | - qcom,sde-core-ib-ff: A string entry indicating the fudge factor for |
| 276 | core ib calculation. |
| 277 | - qcom,sde-core-clk-ff: A string entry indicating the fudge factor for |
| 278 | core clock calculation. |
| 279 | - qcom,sde-comp-ratio-rt: A string entry indicating the compression ratio |
| 280 | for each supported compressed format on realtime interface. |
| 281 | The string is composed of one or more of |
| 282 | <fourcc code>/<vendor code>/<modifier>/<compression ratio> |
| 283 | separated with spaces. |
| 284 | - qcom,sde-comp-ratio-nrt: A string entry indicating the compression ratio |
| 285 | for each supported compressed format on non-realtime interface. |
| 286 | The string is composed of one or more of |
| 287 | <fourcc code>/<vendor code>/<modifier>/<compression ratio> |
| 288 | separated with spaces. |
| 289 | - qcom,sde-undersized-prefill-lines: A u32 value indicates the size of undersized prefill in lines. |
| 290 | - qcom,sde-xtra-prefill-lines: A u32 value indicates the extra prefill in lines. |
| 291 | - qcom,sde-dest-scale-prefill-lines: A u32 value indicates the latency of destination scaler in lines. |
| 292 | - qcom,sde-macrotile-prefill-lines: A u32 value indicates the latency of macrotile in lines. |
| 293 | - qcom,sde-yuv-nv12-prefill-lines: A u32 value indicates the latency of yuv/nv12 in lines. |
| 294 | - qcom,sde-linear-prefill-lines: A u32 value indicates the latency of linear in lines. |
| 295 | - qcom,sde-downscaling-prefill-lines: A u32 value indicates the latency of downscaling in lines. |
| 296 | - qcom,sde-max-per-pipe-bw-kbps: Array of u32 value indicates the max per pipe bandwidth in Kbps. |
| 297 | - qcom,sde-amortizable-threshold: This value indicates the min for traffic shaping in lines. |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 298 | - qcom,sde-vbif-qos-rt-remap: This array is used to program vbif qos remapper register |
| 299 | priority for realtime clients. |
| 300 | - qcom,sde-vbif-qos-nrt-remap: This array is used to program vbif qos remapper register |
| 301 | priority for non-realtime clients. |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 302 | - qcom,sde-danger-lut: A 4 cell property, with a format of <linear, |
| 303 | tile, nrt, cwb>, |
| 304 | indicating the danger luts on sspp. |
| 305 | - qcom,sde-safe-lut: A 4 cell property, with a format of <linear, |
| 306 | tile, nrt, cwb>, |
| 307 | indicating the safe luts on sspp. |
| 308 | - qcom,sde-qos-lut-linear: Array of 3 cell property, with a format of |
| 309 | <fill level, lut hi, lut lo> in ascending fill level |
| 310 | indicating the qos luts for linear format on sspp. |
| 311 | Zero fill level on the last entry identifies the default lut. |
| 312 | - qcom,sde-qos-lut-macrotile: Array of 3 cell property, with a format of |
| 313 | <fill level, lut hi, lut lo> in ascending fill level |
| 314 | indicating the qos luts for macrotile format on sspp. |
| 315 | Zero fill level on the last entry identifies the default lut. |
| 316 | - qcom,sde-qos-lut-nrt: Array of 3 cell property, with a format of |
| 317 | <fill level, lut hi, lut lo> in ascending fill level |
| 318 | indicating the qos luts for nrt (e.g wfd) on sspp. |
| 319 | Zero fill level on the last entry identifies the default lut. |
| 320 | - qcom,sde-qos-lut-cwb: Array of 3 cell property, with a format of |
| 321 | <fill level, lut hi, lut lo> in ascending fill level |
| 322 | indicating the qos luts for cwb on sspp. |
| 323 | Zero fill level on the last entry identifies the default lut. |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 324 | |
| 325 | Bus Scaling Subnodes: |
| 326 | - qcom,sde-reg-bus: Property to provide Bus scaling for register access for |
| 327 | mdss blocks. |
| 328 | - qcom,sde-data-bus: Property to provide Bus scaling for data bus access for |
| 329 | mdss blocks. |
| 330 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 331 | - qcom,sde-inline-rotator: A 2 cell property, with format of (rotator phandle, |
| 332 | instance id), of inline rotator device. |
| 333 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 334 | Bus Scaling Data: |
| 335 | - qcom,msm-bus,name: String property describing client name. |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 336 | - qcom,msm-bus,num-cases: This is the number of Bus Scaling use cases |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 337 | defined in the vectors property. |
| 338 | - qcom,msm-bus,num-paths: This represents the number of paths in each |
| 339 | Bus Scaling Usecase. |
| 340 | - qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format |
| 341 | of (src, dst, ab, ib) which is defined at |
| 342 | Documentation/devicetree/bindings/arm/msm/msm_bus.txt |
| 343 | * Current values of src & dst are defined at |
| 344 | include/linux/msm-bus-board.h |
| 345 | |
Adrian Salido-Moreno | 48ebb79 | 2015-10-02 15:54:46 -0700 | [diff] [blame] | 346 | Subnode properties: |
| 347 | - compatible : Compatible name used in smmu v2. |
| 348 | smmu_v2 names should be: |
Alan Kwong | 112a84f | 2016-05-24 20:49:21 -0400 | [diff] [blame] | 349 | "qcom,smmu-mdp-unsec" - smmu context bank device for |
Adrian Salido-Moreno | 48ebb79 | 2015-10-02 15:54:46 -0700 | [diff] [blame] | 350 | unsecure mdp domain. |
Alan Kwong | 112a84f | 2016-05-24 20:49:21 -0400 | [diff] [blame] | 351 | "qcom,smmu-rot-unsec" - smmu context bank device for |
| 352 | unsecure rotation domain. |
| 353 | "qcom,smmu-mdp-sec" - smmu context bank device for |
Adrian Salido-Moreno | 48ebb79 | 2015-10-02 15:54:46 -0700 | [diff] [blame] | 354 | secure mdp domain. |
Alan Kwong | 112a84f | 2016-05-24 20:49:21 -0400 | [diff] [blame] | 355 | "qcom,smmu-rot-sec" - smmu context bank device for |
| 356 | secure rotation domain. |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 357 | Please refer to ../../interrupt-controller/interrupts.txt for a general |
| 358 | description of interrupt bindings. |
| 359 | |
| 360 | Example: |
| 361 | mdss_mdp: qcom,mdss_mdp@900000 { |
| 362 | compatible = "qcom,sde-kms"; |
| 363 | reg = <0x00900000 0x90000>, |
| 364 | <0x009b0000 0x1040>, |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 365 | <0x009b8000 0x1040>, |
| 366 | <0x0aeac000 0x00f0>; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 367 | reg-names = "mdp_phys", |
| 368 | "vbif_phys", |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 369 | "vbif_nrt_phys", |
| 370 | "regdma_phys"; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 371 | clocks = <&clock_mmss clk_mdss_ahb_clk>, |
| 372 | <&clock_mmss clk_mdss_axi_clk>, |
| 373 | <&clock_mmss clk_mdp_clk_src>, |
| 374 | <&clock_mmss clk_mdss_mdp_vote_clk>, |
| 375 | <&clock_mmss clk_smmu_mdp_axi_clk>, |
| 376 | <&clock_mmss clk_mmagic_mdss_axi_clk>, |
| 377 | <&clock_mmss clk_mdss_vsync_clk>; |
| 378 | clock-names = "iface_clk", |
| 379 | "bus_clk", |
| 380 | "core_clk_src", |
| 381 | "core_clk", |
| 382 | "iommu_clk", |
| 383 | "mmagic_clk", |
| 384 | "vsync_clk"; |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 385 | clock-rate = <0>, <0>, <0>; |
Alan Kwong | 83b6cbe | 2016-09-17 20:08:37 -0400 | [diff] [blame] | 386 | clock-max-rate= <0 320000000 0>; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 387 | mmagic-supply = <&gdsc_mmagic_mdss>; |
| 388 | vdd-supply = <&gdsc_mdss>; |
| 389 | interrupt-parent = <&intc>; |
| 390 | interrupts = <0 83 0>; |
| 391 | interrupt-controller; |
| 392 | #interrupt-cells = <1>; |
| 393 | iommus = <&mdp_smmu 0>; |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 394 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 395 | qcom,sde-off = <0x1000>; |
| 396 | qcom,sde-ctl-off = <0x00002000 0x00002200 0x00002400 |
| 397 | 0x00002600 0x00002800>; |
| 398 | qcom,sde-mixer-off = <0x00045000 0x00046000 |
| 399 | 0x00047000 0x0004a000>; |
| 400 | qcom,sde-dspp-off = <0x00055000 0x00057000>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 401 | qcom,sde-dspp-ad-off = <0x24000 0x22800>; |
| 402 | qcom,sde-dspp-ad-version = <0x00030000>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 403 | qcom,sde-wb-off = <0x00066000>; |
| 404 | qcom,sde-wb-xin-id = <6>; |
| 405 | qcom,sde-intf-off = <0x0006b000 0x0006b800 |
| 406 | 0x0006c000 0x0006c800>; |
| 407 | qcom,sde-intf-type = "none", "dsi", "dsi", "hdmi"; |
| 408 | qcom,sde-pp-off = <0x00071000 0x00071800 |
| 409 | 0x00072000 0x00072800>; |
Clarence Ip | 8e69ad0 | 2016-12-09 09:43:57 -0500 | [diff] [blame] | 410 | qcom,sde-pp-slave = <0x0 0x0 0x0 0x0>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 411 | qcom,sde-cdm-off = <0x0007a200>; |
| 412 | qcom,sde-dsc-off = <0x00081000 0x00081400>; |
| 413 | qcom,sde-intf-max-prefetch-lines = <0x15 0x15 0x15 0x15>; |
| 414 | |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 415 | qcom,sde-mixer-pair-mask = <2 1 6 0 0 3>; |
| 416 | qcom,sde-mixer-blend-op-off = <0x20 0x38 0x50 0x68 0x80 0x98 |
| 417 | 0xb0 0xc8 0xe0 0xf8 0x110>; |
| 418 | |
| 419 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 420 | qcom,sde-sspp-type = "vig", "vig", "vig", |
| 421 | "vig", "rgb", "rgb", |
| 422 | "rgb", "rgb", "dma", |
| 423 | "dma", "cursor", "cursor"; |
| 424 | |
| 425 | qcom,sde-sspp-off = <0x00005000 0x00007000 0x00009000 |
| 426 | 0x0000b000 0x00015000 0x00017000 |
| 427 | 0x00019000 0x0001b000 0x00025000 |
| 428 | 0x00027000 0x00035000 0x00037000>; |
| 429 | |
| 430 | qcom,sde-sspp-xin-id = <0 4 8 |
| 431 | 12 1 5 |
| 432 | 9 13 2 |
| 433 | 10 7 7>; |
| 434 | |
| 435 | /* offsets are relative to "mdp_phys + qcom,sde-off */ |
| 436 | qcom,sde-sspp-clk-ctrl = <0x2ac 0>, <0x2b4 0>, <0x2bc 0>, |
| 437 | <0x2c4 0>, <0x2ac 4>, <0x2b4 4>, <0x2bc 4>, |
| 438 | <0x2c4 4>, <0x2ac 8>, <0x2b4 8>, <0x3a8 16>, |
| 439 | <0x3b0 16>; |
| 440 | qcom,sde-sspp-clk-status = <0x2ac 0>, <0x2b4 0>, <0x2bc 0>, |
| 441 | <0x2c4 0>, <0x2ac 4>, <0x2b4 4>, <0x2bc 4>, |
| 442 | <0x2c4 4>, <0x2ac 8>, <0x2b4 8>, <0x3a8 16>, |
| 443 | <0x3b0 16>; |
| 444 | qcom,sde-mixer-linewidth = <2560>; |
| 445 | qcom,sde-sspp-linewidth = <2560>; |
| 446 | qcom,sde-mixer-blendstages = <0x7>; |
| 447 | qcom,sde-highest-bank-bit = <0x2>; |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 448 | qcom,sde-ubwc-version = <0x100>; |
| 449 | qcom,sde-ubwc-static = <0x100>; |
| 450 | qcom,sde-ubwc-swizzle = <0>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 451 | qcom,sde-panic-per-pipe; |
| 452 | qcom,sde-has-cdp; |
| 453 | qcom,sde-has-src-split; |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 454 | qcom,sde-has-dim-layer; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 455 | qcom,sde-sspp-src-size = <0x100>; |
| 456 | qcom,sde-mixer-size = <0x100>; |
| 457 | qcom,sde-ctl-size = <0x100>; |
| 458 | qcom,sde-dspp-size = <0x100>; |
| 459 | qcom,sde-intf-size = <0x100>; |
| 460 | qcom,sde-dsc-size = <0x100>; |
| 461 | qcom,sde-cdm-size = <0x100>; |
| 462 | qcom,sde-pp-size = <0x100>; |
| 463 | qcom,sde-wb-size = <0x100>; |
| 464 | qcom,sde-len = <0x100>; |
| 465 | qcom,sde-wb-linewidth = <2560>; |
| 466 | qcom,sde-sspp-scale-size = <0x100>; |
| 467 | qcom,sde-mixer-blendstages = <0x8>; |
| 468 | qcom,sde-qseed-type = "qseedv2"; |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 469 | qcom,sde-csc-type = "csc-10bit"; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 470 | qcom,sde-highest-bank-bit = <15>; |
| 471 | qcom,sde-has-mixer-gc; |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 472 | qcom,sde-has-idle-pc; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 473 | qcom,sde-sspp-max-rects = <1 1 1 1 |
| 474 | 1 1 1 1 |
| 475 | 1 1 |
| 476 | 1 1>; |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 477 | qcom,sde-sspp-excl-rect = <1 1 1 1 |
| 478 | 1 1 1 1 |
| 479 | 1 1 |
| 480 | 1 1>; |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 481 | qcom,sde-sspp-smart-dma-priority = <0 0 0 0 |
| 482 | 0 0 0 0 |
| 483 | 0 0 |
| 484 | 1 2>; |
| 485 | qcom,sde-smart-dma-rev = "smart_dma_v2"; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 486 | qcom,sde-te-off = <0x100>; |
| 487 | qcom,sde-te2-off = <0x100>; |
| 488 | qcom,sde-te-size = <0xffff>; |
| 489 | qcom,sde-te2-size = <0xffff>; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 490 | |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 491 | qcom,sde-wb-id = <2>; |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 492 | qcom,sde-wb-clk-ctrl = <0x2bc 16>; |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 493 | |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 494 | qcom,sde-danger-lut = <0x0000000f 0x0000ffff 0x00000000 |
| 495 | 0x00000000>; |
| 496 | qcom,sde-safe-lut = <0xfffc 0xff00 0xffff 0xffff>; |
| 497 | qcom,sde-qos-lut-linear = |
| 498 | <4 0x00000000 0x00000357>, |
| 499 | <5 0x00000000 0x00003357>, |
| 500 | <6 0x00000000 0x00023357>, |
| 501 | <7 0x00000000 0x00223357>, |
| 502 | <8 0x00000000 0x02223357>, |
| 503 | <9 0x00000000 0x22223357>, |
| 504 | <10 0x00000002 0x22223357>, |
| 505 | <11 0x00000022 0x22223357>, |
| 506 | <12 0x00000222 0x22223357>, |
| 507 | <13 0x00002222 0x22223357>, |
| 508 | <14 0x00012222 0x22223357>, |
| 509 | <0 0x00112222 0x22223357>; |
| 510 | qcom,sde-qos-lut-macrotile = |
| 511 | <10 0x00000003 0x44556677>, |
| 512 | <11 0x00000033 0x44556677>, |
| 513 | <12 0x00000233 0x44556677>, |
| 514 | <13 0x00002233 0x44556677>, |
| 515 | <14 0x00012233 0x44556677>, |
| 516 | <0 0x00112233 0x44556677>; |
| 517 | qcom,sde-qos-lut-nrt = |
| 518 | <0 0x00000000 0x00000000>; |
| 519 | qcom,sde-qos-lut-cwb = |
| 520 | <0 0x75300000 0x00000000>; |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 521 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 522 | qcom,sde-vbif-off = <0 0>; |
| 523 | qcom,sde-vbif-id = <0 1>; |
| 524 | qcom,sde-vbif-default-ot-rd-limit = <32>; |
| 525 | qcom,sde-vbif-default-ot-wr-limit = <16>; |
| 526 | qcom,sde-vbif-dynamic-ot-rd-limit = <62208000 2>, |
| 527 | <124416000 4>, <248832000 16>; |
| 528 | qcom,sde-vbif-dynamic-ot-wr-limit = <62208000 2>, |
| 529 | <124416000 4>, <248832000 16>; |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame^] | 530 | qcom,sde-vbif-memtype-0 = <3 3 3 3 3 3 3 3>; |
| 531 | qcom,sde-vbif-memtype-1 = <3 3 3 3 3 3>; |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 532 | |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 533 | qcom,sde-dram-channels = <2>; |
| 534 | qcom,sde-num-nrt-paths = <1>; |
| 535 | |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 536 | qcom,sde-max-bw-high-kbps = <9000000>; |
| 537 | qcom,sde-max-bw-low-kbps = <9000000>; |
| 538 | |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 539 | qcom,sde-core-ib-ff = "1.1"; |
| 540 | qcom,sde-core-clk-ff = "1.0"; |
| 541 | qcom,sde-comp-ratio-rt = "NV12/5/1/1.1 AB24/5/1/1.2 XB24/5/1/1.3"; |
| 542 | qcom,sde-comp-ratio-nrt = "NV12/5/1/1.1 AB24/5/1/1.2 XB24/5/1/1.3"; |
| 543 | qcom,sde-undersized-prefill-lines = <4>; |
| 544 | qcom,sde-xtra-prefill-lines = <5>; |
| 545 | qcom,sde-dest-scale-prefill-lines = <6>; |
| 546 | qcom,sde-macrotile-prefill-lines = <7>; |
| 547 | qcom,sde-yuv-nv12-prefill-lines = <8>; |
| 548 | qcom,sde-linear-prefill-lines = <9>; |
| 549 | qcom,sde-downscaling-prefill-lines = <10>; |
| 550 | qcom,sde-max-per-pipe-bw-kbps = <2400000 2400000 2400000 2400000 |
| 551 | 2400000 2400000 2400000 2400000>; |
| 552 | qcom,sde-amortizable-threshold = <11>; |
| 553 | |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 554 | qcom,sde-vbif-qos-rt-remap = <3 3 4 4 5 5 6 6>; |
| 555 | qcom,sde-vbif-qos-nrt-remap = <3 3 3 3 3 3 3 3>; |
| 556 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 557 | qcom,sde-sspp-vig-blocks { |
| 558 | qcom,sde-vig-csc-off = <0x320>; |
| 559 | qcom,sde-vig-qseed-off = <0x200>; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 560 | qcom,sde-vig-qseed-size = <0x74>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 561 | /* Offset from vig top, version of HSIC */ |
| 562 | qcom,sde-vig-hsic = <0x200 0x00010000>; |
| 563 | qcom,sde-vig-memcolor = <0x200 0x00010000>; |
| 564 | qcom,sde-vig-pcc = <0x1780 0x00010000>; |
| 565 | }; |
| 566 | |
| 567 | qcom,sde-sspp-rgb-blocks { |
| 568 | qcom,sde-rgb-scaler-off = <0x200>; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 569 | qcom,sde-rgb-scaler-size = <0x74>; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 570 | qcom,sde-rgb-pcc = <0x380 0x00010000>; |
| 571 | }; |
| 572 | |
| 573 | qcom,sde-dspp-blocks { |
| 574 | qcom,sde-dspp-pcc = <0x1700 0x00010000>; |
| 575 | qcom,sde-dspp-gc = <0x17c0 0x00010000>; |
| 576 | qcom,sde-dspp-hsic = <0x0 0x00010000>; |
| 577 | qcom,sde-dspp-memcolor = <0x0 0x00010000>; |
| 578 | qcom,sde-dspp-sixzone = <0x0 0x00010000>; |
| 579 | qcom,sde-dspp-gamut = <0x1600 0x00010000>; |
| 580 | qcom,sde-dspp-dither = <0x0 0x00010000>; |
| 581 | qcom,sde-dspp-hist = <0x0 0x00010000>; |
| 582 | qcom,sde-dspp-vlut = <0x0 0x00010000>; |
| 583 | }; |
| 584 | |
| 585 | qcom,sde-mixer-blocks { |
| 586 | qcom,sde-mixer-gc = <0x3c0 0x00010000>; |
| 587 | }; |
| 588 | |
| 589 | qcom,msm-hdmi-audio-rx { |
| 590 | compatible = "qcom,msm-hdmi-audio-codec-rx"; |
| 591 | }; |
| 592 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 593 | qcom,sde-inline-rotator = <&mdss_rotator 0>; |
| 594 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 595 | qcom,platform-supply-entries { |
| 596 | #address-cells = <1>; |
| 597 | #size-cells = <0>; |
| 598 | qcom,platform-supply-entry@0 { |
| 599 | reg = <0>; |
| 600 | qcom,supply-name = "vdd"; |
| 601 | qcom,supply-min-voltage = <0>; |
| 602 | qcom,supply-max-voltage = <0>; |
| 603 | qcom,supply-enable-load = <0>; |
| 604 | qcom,supply-disable-load = <0>; |
| 605 | qcom,supply-pre-on-sleep = <0>; |
| 606 | qcom,supply-post-on-sleep = <0>; |
| 607 | qcom,supply-pre-off-sleep = <0>; |
| 608 | qcom,supply-post-off-sleep = <0>; |
| 609 | }; |
| 610 | }; |
| 611 | |
Alan Kwong | 67a3f79 | 2016-11-01 23:16:53 -0400 | [diff] [blame] | 612 | qcom,sde-data-bus { |
| 613 | qcom,msm-bus,name = "mdss_sde"; |
| 614 | qcom,msm-bus,num-cases = <3>; |
| 615 | qcom,msm-bus,num-paths = <3>; |
| 616 | qcom,msm-bus,vectors-KBps = |
| 617 | <22 512 0 0>, <23 512 0 0>, <25 512 0 0>, |
| 618 | <22 512 0 6400000>, <23 512 0 6400000>, |
| 619 | <25 512 0 6400000>, |
| 620 | <22 512 0 6400000>, <23 512 0 6400000>, |
| 621 | <25 512 0 6400000>; |
| 622 | }; |
| 623 | |
Dhaval Patel | 480dc52 | 2016-07-27 18:36:59 -0700 | [diff] [blame] | 624 | qcom,sde-reg-bus { |
| 625 | /* Reg Bus Scale Settings */ |
| 626 | qcom,msm-bus,name = "mdss_reg"; |
| 627 | qcom,msm-bus,num-cases = <4>; |
| 628 | qcom,msm-bus,num-paths = <1>; |
| 629 | qcom,msm-bus,active-only; |
| 630 | qcom,msm-bus,vectors-KBps = |
| 631 | <1 590 0 0>, |
| 632 | <1 590 0 76800>, |
| 633 | <1 590 0 160000>, |
| 634 | <1 590 0 320000>; |
| 635 | }; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 636 | }; |