Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 1 | #ifndef B43legacy_H_ |
| 2 | #define B43legacy_H_ |
| 3 | |
| 4 | #include <linux/hw_random.h> |
| 5 | #include <linux/kernel.h> |
| 6 | #include <linux/spinlock.h> |
| 7 | #include <linux/interrupt.h> |
| 8 | #include <linux/stringify.h> |
| 9 | #include <linux/netdevice.h> |
| 10 | #include <linux/pci.h> |
| 11 | #include <asm/atomic.h> |
| 12 | #include <linux/io.h> |
| 13 | |
| 14 | #include <linux/ssb/ssb.h> |
| 15 | #include <linux/ssb/ssb_driver_chipcommon.h> |
| 16 | |
| 17 | #include <linux/wireless.h> |
| 18 | #include <net/mac80211.h> |
| 19 | |
| 20 | #include "debugfs.h" |
| 21 | #include "leds.h" |
Larry Finger | 93bb7f3 | 2007-10-10 22:44:22 -0500 | [diff] [blame] | 22 | #include "rfkill.h" |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 23 | #include "phy.h" |
| 24 | |
| 25 | |
Stefano Brivio | 6fff1c6 | 2008-02-09 07:20:43 +0100 | [diff] [blame] | 26 | /* The unique identifier of the firmware that's officially supported by this |
| 27 | * driver version. */ |
| 28 | #define B43legacy_SUPPORTED_FIRMWARE_ID "FW10" |
| 29 | |
Stefano Brivio | e78c9d2 | 2008-01-23 14:48:50 +0100 | [diff] [blame] | 30 | #define B43legacy_IRQWAIT_MAX_RETRIES 20 |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 31 | |
| 32 | #define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */ |
| 33 | |
| 34 | /* MMIO offsets */ |
| 35 | #define B43legacy_MMIO_DMA0_REASON 0x20 |
| 36 | #define B43legacy_MMIO_DMA0_IRQ_MASK 0x24 |
| 37 | #define B43legacy_MMIO_DMA1_REASON 0x28 |
| 38 | #define B43legacy_MMIO_DMA1_IRQ_MASK 0x2C |
| 39 | #define B43legacy_MMIO_DMA2_REASON 0x30 |
| 40 | #define B43legacy_MMIO_DMA2_IRQ_MASK 0x34 |
| 41 | #define B43legacy_MMIO_DMA3_REASON 0x38 |
| 42 | #define B43legacy_MMIO_DMA3_IRQ_MASK 0x3C |
| 43 | #define B43legacy_MMIO_DMA4_REASON 0x40 |
| 44 | #define B43legacy_MMIO_DMA4_IRQ_MASK 0x44 |
| 45 | #define B43legacy_MMIO_DMA5_REASON 0x48 |
| 46 | #define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C |
Stefano Brivio | e78c9d2 | 2008-01-23 14:48:50 +0100 | [diff] [blame] | 47 | #define B43legacy_MMIO_MACCTL 0x120 /* MAC control */ |
| 48 | #define B43legacy_MMIO_MACCMD 0x124 /* MAC command */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 49 | #define B43legacy_MMIO_GEN_IRQ_REASON 0x128 |
| 50 | #define B43legacy_MMIO_GEN_IRQ_MASK 0x12C |
| 51 | #define B43legacy_MMIO_RAM_CONTROL 0x130 |
| 52 | #define B43legacy_MMIO_RAM_DATA 0x134 |
| 53 | #define B43legacy_MMIO_PS_STATUS 0x140 |
| 54 | #define B43legacy_MMIO_RADIO_HWENABLED_HI 0x158 |
| 55 | #define B43legacy_MMIO_SHM_CONTROL 0x160 |
| 56 | #define B43legacy_MMIO_SHM_DATA 0x164 |
| 57 | #define B43legacy_MMIO_SHM_DATA_UNALIGNED 0x166 |
| 58 | #define B43legacy_MMIO_XMITSTAT_0 0x170 |
| 59 | #define B43legacy_MMIO_XMITSTAT_1 0x174 |
| 60 | #define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */ |
| 61 | #define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */ |
| 62 | |
| 63 | /* 32-bit DMA */ |
| 64 | #define B43legacy_MMIO_DMA32_BASE0 0x200 |
| 65 | #define B43legacy_MMIO_DMA32_BASE1 0x220 |
| 66 | #define B43legacy_MMIO_DMA32_BASE2 0x240 |
| 67 | #define B43legacy_MMIO_DMA32_BASE3 0x260 |
| 68 | #define B43legacy_MMIO_DMA32_BASE4 0x280 |
| 69 | #define B43legacy_MMIO_DMA32_BASE5 0x2A0 |
| 70 | /* 64-bit DMA */ |
| 71 | #define B43legacy_MMIO_DMA64_BASE0 0x200 |
| 72 | #define B43legacy_MMIO_DMA64_BASE1 0x240 |
| 73 | #define B43legacy_MMIO_DMA64_BASE2 0x280 |
| 74 | #define B43legacy_MMIO_DMA64_BASE3 0x2C0 |
| 75 | #define B43legacy_MMIO_DMA64_BASE4 0x300 |
| 76 | #define B43legacy_MMIO_DMA64_BASE5 0x340 |
| 77 | /* PIO */ |
| 78 | #define B43legacy_MMIO_PIO1_BASE 0x300 |
| 79 | #define B43legacy_MMIO_PIO2_BASE 0x310 |
| 80 | #define B43legacy_MMIO_PIO3_BASE 0x320 |
| 81 | #define B43legacy_MMIO_PIO4_BASE 0x330 |
| 82 | |
| 83 | #define B43legacy_MMIO_PHY_VER 0x3E0 |
| 84 | #define B43legacy_MMIO_PHY_RADIO 0x3E2 |
| 85 | #define B43legacy_MMIO_PHY0 0x3E6 |
| 86 | #define B43legacy_MMIO_ANTENNA 0x3E8 |
| 87 | #define B43legacy_MMIO_CHANNEL 0x3F0 |
| 88 | #define B43legacy_MMIO_CHANNEL_EXT 0x3F4 |
| 89 | #define B43legacy_MMIO_RADIO_CONTROL 0x3F6 |
| 90 | #define B43legacy_MMIO_RADIO_DATA_HIGH 0x3F8 |
| 91 | #define B43legacy_MMIO_RADIO_DATA_LOW 0x3FA |
| 92 | #define B43legacy_MMIO_PHY_CONTROL 0x3FC |
| 93 | #define B43legacy_MMIO_PHY_DATA 0x3FE |
| 94 | #define B43legacy_MMIO_MACFILTER_CONTROL 0x420 |
| 95 | #define B43legacy_MMIO_MACFILTER_DATA 0x422 |
| 96 | #define B43legacy_MMIO_RCMTA_COUNT 0x43C /* Receive Match Transmitter Addr */ |
| 97 | #define B43legacy_MMIO_RADIO_HWENABLED_LO 0x49A |
| 98 | #define B43legacy_MMIO_GPIO_CONTROL 0x49C |
| 99 | #define B43legacy_MMIO_GPIO_MASK 0x49E |
Stefano Brivio | 3e2c40e | 2008-04-14 00:57:03 +0200 | [diff] [blame] | 100 | #define B43legacy_MMIO_TSF_CFP_PRETBTT 0x612 |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 101 | #define B43legacy_MMIO_TSF_0 0x632 /* core rev < 3 only */ |
| 102 | #define B43legacy_MMIO_TSF_1 0x634 /* core rev < 3 only */ |
| 103 | #define B43legacy_MMIO_TSF_2 0x636 /* core rev < 3 only */ |
| 104 | #define B43legacy_MMIO_TSF_3 0x638 /* core rev < 3 only */ |
| 105 | #define B43legacy_MMIO_RNG 0x65A |
| 106 | #define B43legacy_MMIO_POWERUP_DELAY 0x6A8 |
| 107 | |
| 108 | /* SPROM boardflags_lo values */ |
| 109 | #define B43legacy_BFL_PACTRL 0x0002 |
| 110 | #define B43legacy_BFL_RSSI 0x0008 |
| 111 | #define B43legacy_BFL_EXTLNA 0x1000 |
| 112 | |
| 113 | /* GPIO register offset, in both ChipCommon and PCI core. */ |
| 114 | #define B43legacy_GPIO_CONTROL 0x6c |
| 115 | |
| 116 | /* SHM Routing */ |
| 117 | #define B43legacy_SHM_SHARED 0x0001 |
| 118 | #define B43legacy_SHM_WIRELESS 0x0002 |
| 119 | #define B43legacy_SHM_HW 0x0004 |
| 120 | #define B43legacy_SHM_UCODE 0x0300 |
| 121 | |
| 122 | /* SHM Routing modifiers */ |
| 123 | #define B43legacy_SHM_AUTOINC_R 0x0200 /* Read Auto-increment */ |
| 124 | #define B43legacy_SHM_AUTOINC_W 0x0100 /* Write Auto-increment */ |
| 125 | #define B43legacy_SHM_AUTOINC_RW (B43legacy_SHM_AUTOINC_R | \ |
| 126 | B43legacy_SHM_AUTOINC_W) |
| 127 | |
| 128 | /* Misc SHM_SHARED offsets */ |
| 129 | #define B43legacy_SHM_SH_WLCOREREV 0x0016 /* 802.11 core revision */ |
| 130 | #define B43legacy_SHM_SH_HOSTFLO 0x005E /* Hostflags ucode opts (low) */ |
| 131 | #define B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */ |
| 132 | /* SHM_SHARED crypto engine */ |
| 133 | #define B43legacy_SHM_SH_KEYIDXBLOCK 0x05D4 /* Key index/algorithm block */ |
Stefano Brivio | a297170 | 2008-02-08 06:31:25 +0100 | [diff] [blame] | 134 | /* SHM_SHARED beacon/AP variables */ |
| 135 | #define B43legacy_SHM_SH_DTIMP 0x0012 /* DTIM period */ |
| 136 | #define B43legacy_SHM_SH_BTL0 0x0018 /* Beacon template length 0 */ |
| 137 | #define B43legacy_SHM_SH_BTL1 0x001A /* Beacon template length 1 */ |
| 138 | #define B43legacy_SHM_SH_BTSFOFF 0x001C /* Beacon TSF offset */ |
| 139 | #define B43legacy_SHM_SH_TIMPOS 0x001E /* TIM position in beacon */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 140 | #define B43legacy_SHM_SH_BEACPHYCTL 0x0054 /* Beacon PHY TX control word */ |
| 141 | /* SHM_SHARED ACK/CTS control */ |
| 142 | #define B43legacy_SHM_SH_ACKCTSPHYCTL 0x0022 /* ACK/CTS PHY control word */ |
| 143 | /* SHM_SHARED probe response variables */ |
Stefano Brivio | a297170 | 2008-02-08 06:31:25 +0100 | [diff] [blame] | 144 | #define B43legacy_SHM_SH_PRTLEN 0x004A /* Probe Response template length */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 145 | #define B43legacy_SHM_SH_PRMAXTIME 0x0074 /* Probe Response max time */ |
Stefano Brivio | a297170 | 2008-02-08 06:31:25 +0100 | [diff] [blame] | 146 | #define B43legacy_SHM_SH_PRPHYCTL 0x0188 /* Probe Resp PHY TX control */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 147 | /* SHM_SHARED rate tables */ |
Johannes Berg | 7f3704e | 2008-11-06 15:18:11 +0100 | [diff] [blame^] | 148 | #define B43legacy_SHM_SH_OFDMDIRECT 0x0480 /* Pointer to OFDM direct map */ |
| 149 | #define B43legacy_SHM_SH_OFDMBASIC 0x04A0 /* Pointer to OFDM basic rate map */ |
| 150 | #define B43legacy_SHM_SH_CCKDIRECT 0x04C0 /* Pointer to CCK direct map */ |
| 151 | #define B43legacy_SHM_SH_CCKBASIC 0x04E0 /* Pointer to CCK basic rate map */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 152 | /* SHM_SHARED microcode soft registers */ |
| 153 | #define B43legacy_SHM_SH_UCODEREV 0x0000 /* Microcode revision */ |
| 154 | #define B43legacy_SHM_SH_UCODEPATCH 0x0002 /* Microcode patchlevel */ |
| 155 | #define B43legacy_SHM_SH_UCODEDATE 0x0004 /* Microcode date */ |
| 156 | #define B43legacy_SHM_SH_UCODETIME 0x0006 /* Microcode time */ |
Stefano Brivio | 3e2c40e | 2008-04-14 00:57:03 +0200 | [diff] [blame] | 157 | #define B43legacy_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */ |
| 158 | #define B43legacy_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 159 | |
| 160 | #define B43legacy_UCODEFLAGS_OFFSET 0x005E |
| 161 | |
| 162 | /* Hardware Radio Enable masks */ |
| 163 | #define B43legacy_MMIO_RADIO_HWENABLED_HI_MASK (1 << 16) |
| 164 | #define B43legacy_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4) |
| 165 | |
| 166 | /* HostFlags. See b43legacy_hf_read/write() */ |
| 167 | #define B43legacy_HF_SYMW 0x00000002 /* G-PHY SYM workaround */ |
| 168 | #define B43legacy_HF_GDCW 0x00000020 /* G-PHY DV cancel filter */ |
| 169 | #define B43legacy_HF_OFDMPABOOST 0x00000040 /* Enable PA boost OFDM */ |
| 170 | #define B43legacy_HF_EDCF 0x00000100 /* on if WME/MAC suspended */ |
| 171 | |
| 172 | /* MacFilter offsets. */ |
| 173 | #define B43legacy_MACFILTER_SELF 0x0000 |
| 174 | #define B43legacy_MACFILTER_BSSID 0x0003 |
| 175 | #define B43legacy_MACFILTER_MAC 0x0010 |
| 176 | |
| 177 | /* PHYVersioning */ |
| 178 | #define B43legacy_PHYTYPE_B 0x01 |
| 179 | #define B43legacy_PHYTYPE_G 0x02 |
| 180 | |
| 181 | /* PHYRegisters */ |
| 182 | #define B43legacy_PHY_G_LO_CONTROL 0x0810 |
| 183 | #define B43legacy_PHY_ILT_G_CTRL 0x0472 |
| 184 | #define B43legacy_PHY_ILT_G_DATA1 0x0473 |
| 185 | #define B43legacy_PHY_ILT_G_DATA2 0x0474 |
| 186 | #define B43legacy_PHY_G_PCTL 0x0029 |
| 187 | #define B43legacy_PHY_RADIO_BITFIELD 0x0401 |
| 188 | #define B43legacy_PHY_G_CRS 0x0429 |
| 189 | #define B43legacy_PHY_NRSSILT_CTRL 0x0803 |
| 190 | #define B43legacy_PHY_NRSSILT_DATA 0x0804 |
| 191 | |
| 192 | /* RadioRegisters */ |
| 193 | #define B43legacy_RADIOCTL_ID 0x01 |
| 194 | |
| 195 | /* MAC Control bitfield */ |
Stefano Brivio | e78c9d2 | 2008-01-23 14:48:50 +0100 | [diff] [blame] | 196 | #define B43legacy_MACCTL_ENABLED 0x00000001 /* MAC Enabled */ |
| 197 | #define B43legacy_MACCTL_PSM_RUN 0x00000002 /* Run Microcode */ |
| 198 | #define B43legacy_MACCTL_PSM_JMP0 0x00000004 /* Microcode jump to 0 */ |
| 199 | #define B43legacy_MACCTL_SHM_ENABLED 0x00000100 /* SHM Enabled */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 200 | #define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */ |
Stefano Brivio | e78c9d2 | 2008-01-23 14:48:50 +0100 | [diff] [blame] | 201 | #define B43legacy_MACCTL_BE 0x00010000 /* Big Endian mode */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 202 | #define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */ |
| 203 | #define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */ |
Stefano Brivio | e78c9d2 | 2008-01-23 14:48:50 +0100 | [diff] [blame] | 204 | #define B43legacy_MACCTL_RADIOLOCK 0x00080000 /* Radio lock */ |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 205 | #define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 206 | #define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */ |
| 207 | #define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */ |
| 208 | #define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */ |
| 209 | #define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */ |
Stefano Brivio | e78c9d2 | 2008-01-23 14:48:50 +0100 | [diff] [blame] | 210 | #define B43legacy_MACCTL_HWPS 0x02000000 /* Hardware Power Saving */ |
| 211 | #define B43legacy_MACCTL_AWAKE 0x04000000 /* Device is awake */ |
| 212 | #define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 213 | #define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */ |
| 214 | |
Stefano Brivio | eed0fd2 | 2008-02-08 06:31:10 +0100 | [diff] [blame] | 215 | /* MAC Command bitfield */ |
| 216 | #define B43legacy_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */ |
| 217 | #define B43legacy_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */ |
| 218 | #define B43legacy_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */ |
| 219 | #define B43legacy_MACCMD_CCA 0x00000008 /* Clear channel assessment */ |
| 220 | #define B43legacy_MACCMD_BGNOISE 0x00000010 /* Background noise */ |
| 221 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 222 | /* 802.11 core specific TM State Low flags */ |
| 223 | #define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ |
| 224 | #define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */ |
| 225 | #define B43legacy_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Ctrl Enbl */ |
| 226 | #define B43legacy_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */ |
| 227 | #define B43legacy_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */ |
| 228 | |
| 229 | /* 802.11 core specific TM State High flags */ |
| 230 | #define B43legacy_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available */ |
| 231 | #define B43legacy_TMSHIGH_GPHY 0x00010000 /* G-PHY avail (rev >= 5) */ |
| 232 | |
| 233 | #define B43legacy_UCODEFLAG_AUTODIV 0x0001 |
| 234 | |
| 235 | /* Generic-Interrupt reasons. */ |
| 236 | #define B43legacy_IRQ_MAC_SUSPENDED 0x00000001 |
| 237 | #define B43legacy_IRQ_BEACON 0x00000002 |
| 238 | #define B43legacy_IRQ_TBTT_INDI 0x00000004 /* Target Beacon Transmit Time */ |
| 239 | #define B43legacy_IRQ_BEACON_TX_OK 0x00000008 |
| 240 | #define B43legacy_IRQ_BEACON_CANCEL 0x00000010 |
| 241 | #define B43legacy_IRQ_ATIM_END 0x00000020 |
| 242 | #define B43legacy_IRQ_PMQ 0x00000040 |
| 243 | #define B43legacy_IRQ_PIO_WORKAROUND 0x00000100 |
| 244 | #define B43legacy_IRQ_MAC_TXERR 0x00000200 |
| 245 | #define B43legacy_IRQ_PHY_TXERR 0x00000800 |
| 246 | #define B43legacy_IRQ_PMEVENT 0x00001000 |
| 247 | #define B43legacy_IRQ_TIMER0 0x00002000 |
| 248 | #define B43legacy_IRQ_TIMER1 0x00004000 |
| 249 | #define B43legacy_IRQ_DMA 0x00008000 |
| 250 | #define B43legacy_IRQ_TXFIFO_FLUSH_OK 0x00010000 |
| 251 | #define B43legacy_IRQ_CCA_MEASURE_OK 0x00020000 |
| 252 | #define B43legacy_IRQ_NOISESAMPLE_OK 0x00040000 |
| 253 | #define B43legacy_IRQ_UCODE_DEBUG 0x08000000 |
| 254 | #define B43legacy_IRQ_RFKILL 0x10000000 |
| 255 | #define B43legacy_IRQ_TX_OK 0x20000000 |
| 256 | #define B43legacy_IRQ_PHY_G_CHANGED 0x40000000 |
| 257 | #define B43legacy_IRQ_TIMEOUT 0x80000000 |
| 258 | |
| 259 | #define B43legacy_IRQ_ALL 0xFFFFFFFF |
| 260 | #define B43legacy_IRQ_MASKTEMPLATE (B43legacy_IRQ_MAC_SUSPENDED | \ |
| 261 | B43legacy_IRQ_BEACON | \ |
| 262 | B43legacy_IRQ_TBTT_INDI | \ |
| 263 | B43legacy_IRQ_ATIM_END | \ |
| 264 | B43legacy_IRQ_PMQ | \ |
| 265 | B43legacy_IRQ_MAC_TXERR | \ |
| 266 | B43legacy_IRQ_PHY_TXERR | \ |
| 267 | B43legacy_IRQ_DMA | \ |
| 268 | B43legacy_IRQ_TXFIFO_FLUSH_OK | \ |
| 269 | B43legacy_IRQ_NOISESAMPLE_OK | \ |
| 270 | B43legacy_IRQ_UCODE_DEBUG | \ |
| 271 | B43legacy_IRQ_RFKILL | \ |
| 272 | B43legacy_IRQ_TX_OK) |
| 273 | |
| 274 | /* Device specific rate values. |
| 275 | * The actual values defined here are (rate_in_mbps * 2). |
| 276 | * Some code depends on this. Don't change it. */ |
| 277 | #define B43legacy_CCK_RATE_1MB 2 |
| 278 | #define B43legacy_CCK_RATE_2MB 4 |
| 279 | #define B43legacy_CCK_RATE_5MB 11 |
| 280 | #define B43legacy_CCK_RATE_11MB 22 |
| 281 | #define B43legacy_OFDM_RATE_6MB 12 |
| 282 | #define B43legacy_OFDM_RATE_9MB 18 |
| 283 | #define B43legacy_OFDM_RATE_12MB 24 |
| 284 | #define B43legacy_OFDM_RATE_18MB 36 |
| 285 | #define B43legacy_OFDM_RATE_24MB 48 |
| 286 | #define B43legacy_OFDM_RATE_36MB 72 |
| 287 | #define B43legacy_OFDM_RATE_48MB 96 |
| 288 | #define B43legacy_OFDM_RATE_54MB 108 |
| 289 | /* Convert a b43legacy rate value to a rate in 100kbps */ |
| 290 | #define B43legacy_RATE_TO_100KBPS(rate) (((rate) * 10) / 2) |
| 291 | |
| 292 | |
| 293 | #define B43legacy_DEFAULT_SHORT_RETRY_LIMIT 7 |
| 294 | #define B43legacy_DEFAULT_LONG_RETRY_LIMIT 4 |
| 295 | |
Stefano Brivio | a293ee9 | 2007-11-24 23:35:25 +0100 | [diff] [blame] | 296 | #define B43legacy_PHY_TX_BADNESS_LIMIT 1000 |
| 297 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 298 | /* Max size of a security key */ |
| 299 | #define B43legacy_SEC_KEYSIZE 16 |
| 300 | /* Security algorithms. */ |
| 301 | enum { |
| 302 | B43legacy_SEC_ALGO_NONE = 0, /* unencrypted, as of TX header. */ |
| 303 | B43legacy_SEC_ALGO_WEP40, |
| 304 | B43legacy_SEC_ALGO_TKIP, |
| 305 | B43legacy_SEC_ALGO_AES, |
| 306 | B43legacy_SEC_ALGO_WEP104, |
| 307 | B43legacy_SEC_ALGO_AES_LEGACY, |
| 308 | }; |
| 309 | |
| 310 | /* Core Information Registers */ |
| 311 | #define B43legacy_CIR_BASE 0xf00 |
| 312 | #define B43legacy_CIR_SBTPSFLAG (B43legacy_CIR_BASE + 0x18) |
| 313 | #define B43legacy_CIR_SBIMSTATE (B43legacy_CIR_BASE + 0x90) |
| 314 | #define B43legacy_CIR_SBINTVEC (B43legacy_CIR_BASE + 0x94) |
| 315 | #define B43legacy_CIR_SBTMSTATELOW (B43legacy_CIR_BASE + 0x98) |
| 316 | #define B43legacy_CIR_SBTMSTATEHIGH (B43legacy_CIR_BASE + 0x9c) |
| 317 | #define B43legacy_CIR_SBIMCONFIGLOW (B43legacy_CIR_BASE + 0xa8) |
| 318 | #define B43legacy_CIR_SB_ID_HI (B43legacy_CIR_BASE + 0xfc) |
| 319 | |
| 320 | /* sbtmstatehigh state flags */ |
| 321 | #define B43legacy_SBTMSTATEHIGH_SERROR 0x00000001 |
| 322 | #define B43legacy_SBTMSTATEHIGH_BUSY 0x00000004 |
| 323 | #define B43legacy_SBTMSTATEHIGH_TIMEOUT 0x00000020 |
| 324 | #define B43legacy_SBTMSTATEHIGH_G_PHY_AVAIL 0x00010000 |
| 325 | #define B43legacy_SBTMSTATEHIGH_COREFLAGS 0x1FFF0000 |
| 326 | #define B43legacy_SBTMSTATEHIGH_DMA64BIT 0x10000000 |
| 327 | #define B43legacy_SBTMSTATEHIGH_GATEDCLK 0x20000000 |
| 328 | #define B43legacy_SBTMSTATEHIGH_BISTFAILED 0x40000000 |
| 329 | #define B43legacy_SBTMSTATEHIGH_BISTCOMPLETE 0x80000000 |
| 330 | |
| 331 | /* sbimstate flags */ |
| 332 | #define B43legacy_SBIMSTATE_IB_ERROR 0x20000 |
| 333 | #define B43legacy_SBIMSTATE_TIMEOUT 0x40000 |
| 334 | |
| 335 | #define PFX KBUILD_MODNAME ": " |
| 336 | #ifdef assert |
| 337 | # undef assert |
| 338 | #endif |
| 339 | #ifdef CONFIG_B43LEGACY_DEBUG |
Stefano Brivio | 4688be3 | 2008-02-08 06:31:39 +0100 | [diff] [blame] | 340 | # define B43legacy_WARN_ON(x) WARN_ON(x) |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 341 | # define B43legacy_BUG_ON(expr) \ |
| 342 | do { \ |
| 343 | if (unlikely((expr))) { \ |
| 344 | printk(KERN_INFO PFX "Test (%s) failed\n", \ |
| 345 | #expr); \ |
| 346 | BUG_ON(expr); \ |
| 347 | } \ |
| 348 | } while (0) |
| 349 | # define B43legacy_DEBUG 1 |
| 350 | #else |
Stefano Brivio | 4688be3 | 2008-02-08 06:31:39 +0100 | [diff] [blame] | 351 | /* This will evaluate the argument even if debugging is disabled. */ |
| 352 | static inline bool __b43legacy_warn_on_dummy(bool x) { return x; } |
Michael Buesch | 8f300ae | 2008-02-24 14:42:29 +0100 | [diff] [blame] | 353 | # define B43legacy_WARN_ON(x) __b43legacy_warn_on_dummy(unlikely(!!(x))) |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 354 | # define B43legacy_BUG_ON(x) do { /* nothing */ } while (0) |
| 355 | # define B43legacy_DEBUG 0 |
| 356 | #endif |
| 357 | |
| 358 | |
| 359 | struct net_device; |
| 360 | struct pci_dev; |
| 361 | struct b43legacy_dmaring; |
| 362 | struct b43legacy_pioqueue; |
| 363 | |
| 364 | /* The firmware file header */ |
| 365 | #define B43legacy_FW_TYPE_UCODE 'u' |
| 366 | #define B43legacy_FW_TYPE_PCM 'p' |
| 367 | #define B43legacy_FW_TYPE_IV 'i' |
| 368 | struct b43legacy_fw_header { |
| 369 | /* File type */ |
| 370 | u8 type; |
| 371 | /* File format version */ |
| 372 | u8 ver; |
| 373 | u8 __padding[2]; |
| 374 | /* Size of the data. For ucode and PCM this is in bytes. |
| 375 | * For IV this is number-of-ivs. */ |
| 376 | __be32 size; |
| 377 | } __attribute__((__packed__)); |
| 378 | |
| 379 | /* Initial Value file format */ |
| 380 | #define B43legacy_IV_OFFSET_MASK 0x7FFF |
| 381 | #define B43legacy_IV_32BIT 0x8000 |
| 382 | struct b43legacy_iv { |
| 383 | __be16 offset_size; |
| 384 | union { |
| 385 | __be16 d16; |
| 386 | __be32 d32; |
| 387 | } data __attribute__((__packed__)); |
| 388 | } __attribute__((__packed__)); |
| 389 | |
| 390 | #define B43legacy_PHYMODE(phytype) (1 << (phytype)) |
| 391 | #define B43legacy_PHYMODE_B B43legacy_PHYMODE \ |
| 392 | ((B43legacy_PHYTYPE_B)) |
| 393 | #define B43legacy_PHYMODE_G B43legacy_PHYMODE \ |
| 394 | ((B43legacy_PHYTYPE_G)) |
| 395 | |
| 396 | /* Value pair to measure the LocalOscillator. */ |
| 397 | struct b43legacy_lopair { |
| 398 | s8 low; |
| 399 | s8 high; |
| 400 | u8 used:1; |
| 401 | }; |
| 402 | #define B43legacy_LO_COUNT (14*4) |
| 403 | |
| 404 | struct b43legacy_phy { |
| 405 | /* Possible PHYMODEs on this PHY */ |
| 406 | u8 possible_phymodes; |
| 407 | /* GMODE bit enabled in MACCTL? */ |
| 408 | bool gmode; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 409 | |
| 410 | /* Analog Type */ |
| 411 | u8 analog; |
| 412 | /* B43legacy_PHYTYPE_ */ |
| 413 | u8 type; |
| 414 | /* PHY revision number. */ |
| 415 | u8 rev; |
| 416 | |
| 417 | u16 antenna_diversity; |
| 418 | u16 savedpctlreg; |
| 419 | /* Radio versioning */ |
| 420 | u16 radio_manuf; /* Radio manufacturer */ |
| 421 | u16 radio_ver; /* Radio version */ |
| 422 | u8 calibrated:1; |
| 423 | u8 radio_rev; /* Radio revision */ |
| 424 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 425 | bool dyn_tssi_tbl; /* tssi2dbm is kmalloc()ed. */ |
| 426 | |
| 427 | /* ACI (adjacent channel interference) flags. */ |
| 428 | bool aci_enable; |
| 429 | bool aci_wlan_automatic; |
| 430 | bool aci_hw_rssi; |
| 431 | |
Larry Finger | 42a9174 | 2007-09-20 21:11:02 -0500 | [diff] [blame] | 432 | /* Radio switched on/off */ |
| 433 | bool radio_on; |
| 434 | struct { |
| 435 | /* Values saved when turning the radio off. |
| 436 | * They are needed when turning it on again. */ |
| 437 | bool valid; |
| 438 | u16 rfover; |
| 439 | u16 rfoverval; |
| 440 | } radio_off_context; |
| 441 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 442 | u16 minlowsig[2]; |
| 443 | u16 minlowsigpos[2]; |
| 444 | |
| 445 | /* LO Measurement Data. |
| 446 | * Use b43legacy_get_lopair() to get a value. |
| 447 | */ |
| 448 | struct b43legacy_lopair *_lo_pairs; |
| 449 | /* TSSI to dBm table in use */ |
| 450 | const s8 *tssi2dbm; |
| 451 | /* idle TSSI value */ |
| 452 | s8 idle_tssi; |
| 453 | /* Target idle TSSI */ |
| 454 | int tgt_idle_tssi; |
| 455 | /* Current idle TSSI */ |
| 456 | int cur_idle_tssi; |
| 457 | |
| 458 | /* LocalOscillator control values. */ |
| 459 | struct b43legacy_txpower_lo_control *lo_control; |
| 460 | /* Values from b43legacy_calc_loopback_gain() */ |
| 461 | s16 max_lb_gain; /* Maximum Loopback gain in hdB */ |
| 462 | s16 trsw_rx_gain; /* TRSW RX gain in hdB */ |
| 463 | s16 lna_lod_gain; /* LNA lod */ |
| 464 | s16 lna_gain; /* LNA */ |
| 465 | s16 pga_gain; /* PGA */ |
| 466 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 467 | /* Desired TX power level (in dBm). This is set by the user and |
| 468 | * adjusted in b43legacy_phy_xmitpower(). */ |
| 469 | u8 power_level; |
| 470 | |
| 471 | /* Values from b43legacy_calc_loopback_gain() */ |
| 472 | u16 loopback_gain[2]; |
| 473 | |
| 474 | /* TX Power control values. */ |
| 475 | /* B/G PHY */ |
| 476 | struct { |
| 477 | /* Current Radio Attenuation for TXpower recalculation. */ |
| 478 | u16 rfatt; |
| 479 | /* Current Baseband Attenuation for TXpower recalculation. */ |
| 480 | u16 bbatt; |
| 481 | /* Current TXpower control value for TXpower recalculation. */ |
| 482 | u16 txctl1; |
| 483 | u16 txctl2; |
| 484 | }; |
| 485 | /* A PHY */ |
| 486 | struct { |
| 487 | u16 txpwr_offset; |
| 488 | }; |
| 489 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 490 | /* Current Interference Mitigation mode */ |
| 491 | int interfmode; |
| 492 | /* Stack of saved values from the Interference Mitigation code. |
| 493 | * Each value in the stack is layed out as follows: |
| 494 | * bit 0-11: offset |
| 495 | * bit 12-15: register ID |
| 496 | * bit 16-32: value |
| 497 | * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT |
| 498 | */ |
| 499 | #define B43legacy_INTERFSTACK_SIZE 26 |
| 500 | u32 interfstack[B43legacy_INTERFSTACK_SIZE]; |
| 501 | |
| 502 | /* Saved values from the NRSSI Slope calculation */ |
| 503 | s16 nrssi[2]; |
| 504 | s32 nrssislope; |
| 505 | /* In memory nrssi lookup table. */ |
| 506 | s8 nrssi_lt[64]; |
| 507 | |
| 508 | /* current channel */ |
| 509 | u8 channel; |
| 510 | |
| 511 | u16 lofcal; |
| 512 | |
| 513 | u16 initval; |
Stefano Brivio | a293ee9 | 2007-11-24 23:35:25 +0100 | [diff] [blame] | 514 | |
| 515 | /* PHY TX errors counter. */ |
| 516 | atomic_t txerr_cnt; |
Michael Buesch | bfe6a50 | 2008-01-09 20:15:31 +0100 | [diff] [blame] | 517 | |
| 518 | #if B43legacy_DEBUG |
| 519 | /* Manual TX-power control enabled? */ |
| 520 | bool manual_txpower_control; |
| 521 | /* PHY registers locked by b43legacy_phy_lock()? */ |
| 522 | bool phy_locked; |
| 523 | #endif /* B43legacy_DEBUG */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 524 | }; |
| 525 | |
| 526 | /* Data structures for DMA transmission, per 80211 core. */ |
| 527 | struct b43legacy_dma { |
| 528 | struct b43legacy_dmaring *tx_ring0; |
| 529 | struct b43legacy_dmaring *tx_ring1; |
| 530 | struct b43legacy_dmaring *tx_ring2; |
| 531 | struct b43legacy_dmaring *tx_ring3; |
| 532 | struct b43legacy_dmaring *tx_ring4; |
| 533 | struct b43legacy_dmaring *tx_ring5; |
| 534 | |
| 535 | struct b43legacy_dmaring *rx_ring0; |
| 536 | struct b43legacy_dmaring *rx_ring3; /* only on core.rev < 5 */ |
| 537 | }; |
| 538 | |
| 539 | /* Data structures for PIO transmission, per 80211 core. */ |
| 540 | struct b43legacy_pio { |
| 541 | struct b43legacy_pioqueue *queue0; |
| 542 | struct b43legacy_pioqueue *queue1; |
| 543 | struct b43legacy_pioqueue *queue2; |
| 544 | struct b43legacy_pioqueue *queue3; |
| 545 | }; |
| 546 | |
| 547 | /* Context information for a noise calculation (Link Quality). */ |
| 548 | struct b43legacy_noise_calculation { |
| 549 | u8 channel_at_start; |
| 550 | bool calculation_running; |
| 551 | u8 nr_samples; |
| 552 | s8 samples[8][4]; |
| 553 | }; |
| 554 | |
| 555 | struct b43legacy_stats { |
| 556 | u8 link_noise; |
| 557 | /* Store the last TX/RX times here for updating the leds. */ |
| 558 | unsigned long last_tx; |
| 559 | unsigned long last_rx; |
| 560 | }; |
| 561 | |
| 562 | struct b43legacy_key { |
| 563 | void *keyconf; |
| 564 | bool enabled; |
| 565 | u8 algorithm; |
| 566 | }; |
| 567 | |
| 568 | struct b43legacy_wldev; |
| 569 | |
| 570 | /* Data structure for the WLAN parts (802.11 cores) of the b43legacy chip. */ |
| 571 | struct b43legacy_wl { |
| 572 | /* Pointer to the active wireless device on this chip */ |
| 573 | struct b43legacy_wldev *current_dev; |
| 574 | /* Pointer to the ieee80211 hardware data structure */ |
| 575 | struct ieee80211_hw *hw; |
| 576 | |
| 577 | spinlock_t irq_lock; /* locks IRQ */ |
| 578 | struct mutex mutex; /* locks wireless core state */ |
| 579 | spinlock_t leds_lock; /* lock for leds */ |
| 580 | |
| 581 | /* We can only have one operating interface (802.11 core) |
| 582 | * at a time. General information about this interface follows. |
| 583 | */ |
| 584 | |
Johannes Berg | 32bfd35 | 2007-12-19 01:31:26 +0100 | [diff] [blame] | 585 | struct ieee80211_vif *vif; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 586 | /* MAC address (can be NULL). */ |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 587 | u8 mac_addr[ETH_ALEN]; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 588 | /* Current BSSID (can be NULL). */ |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 589 | u8 bssid[ETH_ALEN]; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 590 | /* Interface type. (IEEE80211_IF_TYPE_XXX) */ |
| 591 | int if_type; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 592 | /* Is the card operating in AP, STA or IBSS mode? */ |
| 593 | bool operating; |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 594 | /* filter flags */ |
| 595 | unsigned int filter_flags; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 596 | /* Stats about the wireless interface */ |
| 597 | struct ieee80211_low_level_stats ieee_stats; |
| 598 | |
| 599 | struct hwrng rng; |
| 600 | u8 rng_initialized; |
| 601 | char rng_name[30 + 1]; |
| 602 | |
Larry Finger | 93bb7f3 | 2007-10-10 22:44:22 -0500 | [diff] [blame] | 603 | /* The RF-kill button */ |
| 604 | struct b43legacy_rfkill rfkill; |
| 605 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 606 | /* List of all wireless devices on this chip */ |
| 607 | struct list_head devlist; |
| 608 | u8 nr_devs; |
Johannes Berg | 5be3bda | 2007-11-24 21:11:09 +0100 | [diff] [blame] | 609 | |
| 610 | bool radiotap_enabled; |
Stefano Brivio | a297170 | 2008-02-08 06:31:25 +0100 | [diff] [blame] | 611 | |
| 612 | /* The beacon we are currently using (AP or IBSS mode). |
| 613 | * This beacon stuff is protected by the irq_lock. */ |
| 614 | struct sk_buff *current_beacon; |
| 615 | bool beacon0_uploaded; |
| 616 | bool beacon1_uploaded; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 617 | }; |
| 618 | |
| 619 | /* Pointers to the firmware data and meta information about it. */ |
| 620 | struct b43legacy_firmware { |
| 621 | /* Microcode */ |
| 622 | const struct firmware *ucode; |
| 623 | /* PCM code */ |
| 624 | const struct firmware *pcm; |
| 625 | /* Initial MMIO values for the firmware */ |
| 626 | const struct firmware *initvals; |
| 627 | /* Initial MMIO values for the firmware, band-specific */ |
| 628 | const struct firmware *initvals_band; |
| 629 | /* Firmware revision */ |
| 630 | u16 rev; |
| 631 | /* Firmware patchlevel */ |
| 632 | u16 patch; |
| 633 | }; |
| 634 | |
| 635 | /* Device (802.11 core) initialization status. */ |
| 636 | enum { |
| 637 | B43legacy_STAT_UNINIT = 0, /* Uninitialized. */ |
| 638 | B43legacy_STAT_INITIALIZED = 1, /* Initialized, not yet started. */ |
| 639 | B43legacy_STAT_STARTED = 2, /* Up and running. */ |
| 640 | }; |
| 641 | #define b43legacy_status(wldev) atomic_read(&(wldev)->__init_status) |
| 642 | #define b43legacy_set_status(wldev, stat) do { \ |
| 643 | atomic_set(&(wldev)->__init_status, (stat)); \ |
| 644 | smp_wmb(); \ |
| 645 | } while (0) |
| 646 | |
| 647 | /* *** --- HOW LOCKING WORKS IN B43legacy --- *** |
| 648 | * |
| 649 | * You should always acquire both, wl->mutex and wl->irq_lock unless: |
| 650 | * - You don't need to acquire wl->irq_lock, if the interface is stopped. |
| 651 | * - You don't need to acquire wl->mutex in the IRQ handler, IRQ tasklet |
| 652 | * and packet TX path (and _ONLY_ there.) |
| 653 | */ |
| 654 | |
| 655 | /* Data structure for one wireless device (802.11 core) */ |
| 656 | struct b43legacy_wldev { |
| 657 | struct ssb_device *dev; |
| 658 | struct b43legacy_wl *wl; |
| 659 | |
| 660 | /* The device initialization status. |
| 661 | * Use b43legacy_status() to query. */ |
| 662 | atomic_t __init_status; |
| 663 | /* Saved init status for handling suspend. */ |
| 664 | int suspend_init_status; |
| 665 | |
| 666 | bool __using_pio; /* Using pio rather than dma. */ |
| 667 | bool bad_frames_preempt;/* Use "Bad Frames Preemption". */ |
Stefano Brivio | eed0fd2 | 2008-02-08 06:31:10 +0100 | [diff] [blame] | 668 | bool dfq_valid; /* Directed frame queue valid (IBSS PS mode, ATIM). */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 669 | bool short_preamble; /* TRUE if using short preamble. */ |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 670 | bool radio_hw_enable; /* State of radio hardware enable bit. */ |
| 671 | |
| 672 | /* PHY/Radio device. */ |
| 673 | struct b43legacy_phy phy; |
| 674 | union { |
| 675 | /* DMA engines. */ |
| 676 | struct b43legacy_dma dma; |
| 677 | /* PIO engines. */ |
| 678 | struct b43legacy_pio pio; |
| 679 | }; |
| 680 | |
| 681 | /* Various statistics about the physical device. */ |
| 682 | struct b43legacy_stats stats; |
| 683 | |
Larry Finger | ba48f7b | 2007-10-12 23:04:51 -0500 | [diff] [blame] | 684 | /* The device LEDs. */ |
| 685 | struct b43legacy_led led_tx; |
| 686 | struct b43legacy_led led_rx; |
| 687 | struct b43legacy_led led_assoc; |
Larry Finger | 93bb7f3 | 2007-10-10 22:44:22 -0500 | [diff] [blame] | 688 | struct b43legacy_led led_radio; |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 689 | |
| 690 | /* Reason code of the last interrupt. */ |
| 691 | u32 irq_reason; |
| 692 | u32 dma_reason[6]; |
| 693 | /* saved irq enable/disable state bitfield. */ |
| 694 | u32 irq_savedstate; |
| 695 | /* Link Quality calculation context. */ |
| 696 | struct b43legacy_noise_calculation noisecalc; |
| 697 | /* if > 0 MAC is suspended. if == 0 MAC is enabled. */ |
| 698 | int mac_suspended; |
| 699 | |
| 700 | /* Interrupt Service Routine tasklet (bottom-half) */ |
| 701 | struct tasklet_struct isr_tasklet; |
| 702 | |
| 703 | /* Periodic tasks */ |
| 704 | struct delayed_work periodic_work; |
| 705 | unsigned int periodic_state; |
| 706 | |
| 707 | struct work_struct restart_work; |
| 708 | |
| 709 | /* encryption/decryption */ |
| 710 | u16 ktp; /* Key table pointer */ |
| 711 | u8 max_nr_keys; |
| 712 | struct b43legacy_key key[58]; |
| 713 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 714 | /* Firmware data */ |
| 715 | struct b43legacy_firmware fw; |
| 716 | |
| 717 | /* Devicelist in struct b43legacy_wl (all 802.11 cores) */ |
| 718 | struct list_head list; |
| 719 | |
| 720 | /* Debugging stuff follows. */ |
| 721 | #ifdef CONFIG_B43LEGACY_DEBUG |
| 722 | struct b43legacy_dfsentry *dfsentry; |
| 723 | #endif |
| 724 | }; |
| 725 | |
| 726 | |
| 727 | static inline |
| 728 | struct b43legacy_wl *hw_to_b43legacy_wl(struct ieee80211_hw *hw) |
| 729 | { |
| 730 | return hw->priv; |
| 731 | } |
| 732 | |
| 733 | /* Helper function, which returns a boolean. |
| 734 | * TRUE, if PIO is used; FALSE, if DMA is used. |
| 735 | */ |
| 736 | #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO) |
| 737 | static inline |
| 738 | int b43legacy_using_pio(struct b43legacy_wldev *dev) |
| 739 | { |
| 740 | return dev->__using_pio; |
| 741 | } |
| 742 | #elif defined(CONFIG_B43LEGACY_DMA) |
| 743 | static inline |
| 744 | int b43legacy_using_pio(struct b43legacy_wldev *dev) |
| 745 | { |
| 746 | return 0; |
| 747 | } |
| 748 | #elif defined(CONFIG_B43LEGACY_PIO) |
| 749 | static inline |
| 750 | int b43legacy_using_pio(struct b43legacy_wldev *dev) |
| 751 | { |
| 752 | return 1; |
| 753 | } |
| 754 | #else |
| 755 | # error "Using neither DMA nor PIO? Confused..." |
| 756 | #endif |
| 757 | |
| 758 | |
| 759 | static inline |
| 760 | struct b43legacy_wldev *dev_to_b43legacy_wldev(struct device *dev) |
| 761 | { |
| 762 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 763 | return ssb_get_drvdata(ssb_dev); |
| 764 | } |
| 765 | |
| 766 | /* Is the device operating in a specified mode (IEEE80211_IF_TYPE_XXX). */ |
| 767 | static inline |
| 768 | int b43legacy_is_mode(struct b43legacy_wl *wl, int type) |
| 769 | { |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 770 | return (wl->operating && |
| 771 | wl->if_type == type); |
| 772 | } |
| 773 | |
| 774 | static inline |
| 775 | bool is_bcm_board_vendor(struct b43legacy_wldev *dev) |
| 776 | { |
| 777 | return (dev->dev->bus->boardinfo.vendor == PCI_VENDOR_ID_BROADCOM); |
| 778 | } |
| 779 | |
| 780 | static inline |
| 781 | u16 b43legacy_read16(struct b43legacy_wldev *dev, u16 offset) |
| 782 | { |
| 783 | return ssb_read16(dev->dev, offset); |
| 784 | } |
| 785 | |
| 786 | static inline |
| 787 | void b43legacy_write16(struct b43legacy_wldev *dev, u16 offset, u16 value) |
| 788 | { |
| 789 | ssb_write16(dev->dev, offset, value); |
| 790 | } |
| 791 | |
| 792 | static inline |
| 793 | u32 b43legacy_read32(struct b43legacy_wldev *dev, u16 offset) |
| 794 | { |
| 795 | return ssb_read32(dev->dev, offset); |
| 796 | } |
| 797 | |
| 798 | static inline |
| 799 | void b43legacy_write32(struct b43legacy_wldev *dev, u16 offset, u32 value) |
| 800 | { |
| 801 | ssb_write32(dev->dev, offset, value); |
| 802 | } |
| 803 | |
| 804 | static inline |
| 805 | struct b43legacy_lopair *b43legacy_get_lopair(struct b43legacy_phy *phy, |
| 806 | u16 radio_attenuation, |
| 807 | u16 baseband_attenuation) |
| 808 | { |
| 809 | return phy->_lo_pairs + (radio_attenuation |
| 810 | + 14 * (baseband_attenuation / 2)); |
| 811 | } |
| 812 | |
| 813 | |
| 814 | |
| 815 | /* Message printing */ |
| 816 | void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) |
| 817 | __attribute__((format(printf, 2, 3))); |
| 818 | void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) |
| 819 | __attribute__((format(printf, 2, 3))); |
| 820 | void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) |
| 821 | __attribute__((format(printf, 2, 3))); |
| 822 | #if B43legacy_DEBUG |
| 823 | void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) |
| 824 | __attribute__((format(printf, 2, 3))); |
| 825 | #else /* DEBUG */ |
| 826 | # define b43legacydbg(wl, fmt...) do { /* nothing */ } while (0) |
| 827 | #endif /* DEBUG */ |
| 828 | |
Larry Finger | 75388ac | 2007-09-25 16:46:54 -0700 | [diff] [blame] | 829 | /* Macros for printing a value in Q5.2 format */ |
| 830 | #define Q52_FMT "%u.%u" |
| 831 | #define Q52_ARG(q52) ((q52) / 4), (((q52) & 3) * 100 / 4) |
| 832 | |
| 833 | #endif /* B43legacy_H_ */ |