| Sreedhara DS | 9a58a33 | 2010-04-26 18:13:05 +0100 | [diff] [blame] | 1 | #ifndef _ASM_X86_INTEL_SCU_IPC_H_ |
| 2 | #define _ASM_X86_INTEL_SCU_IPC_H_ |
| 3 | |
| 4 | /* Read single register */ |
| 5 | int intel_scu_ipc_ioread8(u16 addr, u8 *data); |
| 6 | |
| 7 | /* Read two sequential registers */ |
| 8 | int intel_scu_ipc_ioread16(u16 addr, u16 *data); |
| 9 | |
| 10 | /* Read four sequential registers */ |
| 11 | int intel_scu_ipc_ioread32(u16 addr, u32 *data); |
| 12 | |
| 13 | /* Read a vector */ |
| 14 | int intel_scu_ipc_readv(u16 *addr, u8 *data, int len); |
| 15 | |
| 16 | /* Write single register */ |
| 17 | int intel_scu_ipc_iowrite8(u16 addr, u8 data); |
| 18 | |
| 19 | /* Write two sequential registers */ |
| 20 | int intel_scu_ipc_iowrite16(u16 addr, u16 data); |
| 21 | |
| 22 | /* Write four sequential registers */ |
| 23 | int intel_scu_ipc_iowrite32(u16 addr, u32 data); |
| 24 | |
| 25 | /* Write a vector */ |
| 26 | int intel_scu_ipc_writev(u16 *addr, u8 *data, int len); |
| 27 | |
| 28 | /* Update single register based on the mask */ |
| 29 | int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask); |
| 30 | |
| 31 | /* |
| 32 | * Indirect register read |
| 33 | * Can be used when SCCB(System Controller Configuration Block) register |
| 34 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) |
| 35 | */ |
| 36 | int intel_scu_ipc_register_read(u32 addr, u32 *data); |
| 37 | |
| 38 | /* |
| 39 | * Indirect register write |
| 40 | * Can be used when SCCB(System Controller Configuration Block) register |
| 41 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) |
| 42 | */ |
| 43 | int intel_scu_ipc_register_write(u32 addr, u32 data); |
| 44 | |
| 45 | /* Issue commands to the SCU with or without data */ |
| 46 | int intel_scu_ipc_simple_command(int cmd, int sub); |
| 47 | int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, |
| 48 | u32 *out, int outlen); |
| 49 | /* I2C control api */ |
| 50 | int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data); |
| 51 | |
| 52 | /* Update FW version */ |
| 53 | int intel_scu_ipc_fw_update(u8 *buffer, u32 length); |
| 54 | |
| 55 | #endif |