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Lars-Peter Clausen68b14d72011-12-05 17:05:41 +01001/*
2 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
3 * Digital to Analog Converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
Jonathan Cameron06458e22012-04-25 15:54:58 +010019#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +010021
22#define AD5764_REG_SF_NOP 0x0
23#define AD5764_REG_SF_CONFIG 0x1
24#define AD5764_REG_SF_CLEAR 0x4
25#define AD5764_REG_SF_LOAD 0x5
26#define AD5764_REG_DATA(x) ((2 << 3) | (x))
27#define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
28#define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
29#define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
30
31#define AD5764_NUM_CHANNELS 4
32
33/**
34 * struct ad5764_chip_info - chip specific information
35 * @int_vref: Value of the internal reference voltage in uV - 0 if external
36 * reference voltage is used
37 * @channel channel specification
38*/
39
40struct ad5764_chip_info {
41 unsigned long int_vref;
42 const struct iio_chan_spec *channels;
43};
44
45/**
46 * struct ad5764_state - driver instance specific data
47 * @spi: spi_device
48 * @chip_info: chip info
49 * @vref_reg: vref supply regulators
50 * @data: spi transfer buffers
51 */
52
53struct ad5764_state {
54 struct spi_device *spi;
55 const struct ad5764_chip_info *chip_info;
56 struct regulator_bulk_data vref_reg[2];
57
58 /*
59 * DMA (thus cache coherency maintenance) requires the
60 * transfer buffers to live in their own cache lines.
61 */
62 union {
63 __be32 d32;
64 u8 d8[4];
65 } data[2] ____cacheline_aligned;
66};
67
68enum ad5764_type {
69 ID_AD5744,
70 ID_AD5744R,
71 ID_AD5764,
72 ID_AD5764R,
73};
74
75#define AD5764_CHANNEL(_chan, _bits) { \
76 .type = IIO_VOLTAGE, \
77 .indexed = 1, \
78 .output = 1, \
79 .channel = (_chan), \
80 .address = (_chan), \
Jonathan Cameronf4d9df12013-02-27 19:28:00 +000081 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
82 BIT(IIO_CHAN_INFO_SCALE) | \
83 BIT(IIO_CHAN_INFO_CALIBSCALE) | \
84 BIT(IIO_CHAN_INFO_CALIBBIAS), \
85 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +010086 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
87}
88
89#define DECLARE_AD5764_CHANNELS(_name, _bits) \
90const struct iio_chan_spec _name##_channels[] = { \
91 AD5764_CHANNEL(0, (_bits)), \
92 AD5764_CHANNEL(1, (_bits)), \
93 AD5764_CHANNEL(2, (_bits)), \
94 AD5764_CHANNEL(3, (_bits)), \
95};
96
97static DECLARE_AD5764_CHANNELS(ad5764, 16);
98static DECLARE_AD5764_CHANNELS(ad5744, 14);
99
100static const struct ad5764_chip_info ad5764_chip_infos[] = {
101 [ID_AD5744] = {
102 .int_vref = 0,
103 .channels = ad5744_channels,
104 },
105 [ID_AD5744R] = {
106 .int_vref = 5000000,
107 .channels = ad5744_channels,
108 },
109 [ID_AD5764] = {
110 .int_vref = 0,
111 .channels = ad5764_channels,
112 },
113 [ID_AD5764R] = {
114 .int_vref = 5000000,
115 .channels = ad5764_channels,
116 },
117};
118
119static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
120 unsigned int val)
121{
122 struct ad5764_state *st = iio_priv(indio_dev);
123 int ret;
124
125 mutex_lock(&indio_dev->mlock);
126 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
127
128 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
129 mutex_unlock(&indio_dev->mlock);
130
131 return ret;
132}
133
134static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
135 unsigned int *val)
136{
137 struct ad5764_state *st = iio_priv(indio_dev);
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100138 int ret;
139 struct spi_transfer t[] = {
140 {
141 .tx_buf = &st->data[0].d8[1],
142 .len = 3,
143 .cs_change = 1,
144 }, {
145 .rx_buf = &st->data[1].d8[1],
146 .len = 3,
147 },
148 };
149
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100150 mutex_lock(&indio_dev->mlock);
151
152 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
153
Lars-Peter Clausen14543a02013-01-09 17:31:00 +0000154 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100155 if (ret >= 0)
156 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
157
158 mutex_unlock(&indio_dev->mlock);
159
160 return ret;
161}
162
163static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
164{
165 switch (info) {
166 case 0:
167 return AD5764_REG_DATA(chan->address);
168 case IIO_CHAN_INFO_CALIBBIAS:
169 return AD5764_REG_OFFSET(chan->address);
170 case IIO_CHAN_INFO_CALIBSCALE:
171 return AD5764_REG_FINE_GAIN(chan->address);
172 default:
173 break;
174 }
175
176 return 0;
177}
178
179static int ad5764_write_raw(struct iio_dev *indio_dev,
180 struct iio_chan_spec const *chan, int val, int val2, long info)
181{
182 const int max_val = (1 << chan->scan_type.realbits);
183 unsigned int reg;
184
185 switch (info) {
Jonathan Cameron09f4eb42012-04-15 17:41:19 +0100186 case IIO_CHAN_INFO_RAW:
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100187 if (val >= max_val || val < 0)
188 return -EINVAL;
189 val <<= chan->scan_type.shift;
190 break;
191 case IIO_CHAN_INFO_CALIBBIAS:
192 if (val >= 128 || val < -128)
193 return -EINVAL;
194 break;
195 case IIO_CHAN_INFO_CALIBSCALE:
196 if (val >= 32 || val < -32)
197 return -EINVAL;
198 break;
199 default:
200 return -EINVAL;
201 }
202
203 reg = ad5764_chan_info_to_reg(chan, info);
204 return ad5764_write(indio_dev, reg, (u16)val);
205}
206
207static int ad5764_get_channel_vref(struct ad5764_state *st,
208 unsigned int channel)
209{
210 if (st->chip_info->int_vref)
211 return st->chip_info->int_vref;
212 else
213 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
214}
215
216static int ad5764_read_raw(struct iio_dev *indio_dev,
217 struct iio_chan_spec const *chan, int *val, int *val2, long info)
218{
219 struct ad5764_state *st = iio_priv(indio_dev);
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100220 unsigned int reg;
221 int vref;
222 int ret;
223
224 switch (info) {
Jonathan Cameron09f4eb42012-04-15 17:41:19 +0100225 case IIO_CHAN_INFO_RAW:
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100226 reg = AD5764_REG_DATA(chan->address);
227 ret = ad5764_read(indio_dev, reg, val);
228 if (ret < 0)
229 return ret;
230 *val >>= chan->scan_type.shift;
231 return IIO_VAL_INT;
232 case IIO_CHAN_INFO_CALIBBIAS:
233 reg = AD5764_REG_OFFSET(chan->address);
234 ret = ad5764_read(indio_dev, reg, val);
235 if (ret < 0)
236 return ret;
237 *val = sign_extend32(*val, 7);
238 return IIO_VAL_INT;
239 case IIO_CHAN_INFO_CALIBSCALE:
240 reg = AD5764_REG_FINE_GAIN(chan->address);
241 ret = ad5764_read(indio_dev, reg, val);
242 if (ret < 0)
243 return ret;
244 *val = sign_extend32(*val, 5);
245 return IIO_VAL_INT;
246 case IIO_CHAN_INFO_SCALE:
Lars-Peter Clausen3f83dae2013-09-28 10:31:00 +0100247 /* vout = 4 * vref + ((dac_code / 65536) - 0.5) */
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100248 vref = ad5764_get_channel_vref(st, chan->channel);
249 if (vref < 0)
250 return vref;
251
Lars-Peter Clausen3f83dae2013-09-28 10:31:00 +0100252 *val = vref * 4 / 1000;
253 *val2 = chan->scan_type.realbits;
254 return IIO_VAL_FRACTIONAL_LOG2;
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100255 case IIO_CHAN_INFO_OFFSET:
256 *val = -(1 << chan->scan_type.realbits) / 2;
257 return IIO_VAL_INT;
258 }
259
260 return -EINVAL;
261}
262
263static const struct iio_info ad5764_info = {
264 .read_raw = ad5764_read_raw,
265 .write_raw = ad5764_write_raw,
266 .driver_module = THIS_MODULE,
267};
268
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800269static int ad5764_probe(struct spi_device *spi)
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100270{
271 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
272 struct iio_dev *indio_dev;
273 struct ad5764_state *st;
274 int ret;
275
Sachin Kamat7ff0de32013-08-19 12:38:00 +0100276 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100277 if (indio_dev == NULL) {
278 dev_err(&spi->dev, "Failed to allocate iio device\n");
279 return -ENOMEM;
280 }
281
282 st = iio_priv(indio_dev);
283 spi_set_drvdata(spi, indio_dev);
284
285 st->spi = spi;
286 st->chip_info = &ad5764_chip_infos[type];
287
288 indio_dev->dev.parent = &spi->dev;
289 indio_dev->name = spi_get_device_id(spi)->name;
290 indio_dev->info = &ad5764_info;
291 indio_dev->modes = INDIO_DIRECT_MODE;
292 indio_dev->num_channels = AD5764_NUM_CHANNELS;
293 indio_dev->channels = st->chip_info->channels;
294
295 if (st->chip_info->int_vref == 0) {
296 st->vref_reg[0].supply = "vrefAB";
297 st->vref_reg[1].supply = "vrefCD";
298
Sachin Kamat7ff0de32013-08-19 12:38:00 +0100299 ret = devm_regulator_bulk_get(&st->spi->dev,
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100300 ARRAY_SIZE(st->vref_reg), st->vref_reg);
301 if (ret) {
302 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
303 ret);
Sachin Kamat7ff0de32013-08-19 12:38:00 +0100304 return ret;
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100305 }
306
307 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
308 st->vref_reg);
309 if (ret) {
310 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
311 ret);
Sachin Kamat7ff0de32013-08-19 12:38:00 +0100312 return ret;
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100313 }
314 }
315
316 ret = iio_device_register(indio_dev);
317 if (ret) {
318 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
319 goto error_disable_reg;
320 }
321
322 return 0;
323
324error_disable_reg:
325 if (st->chip_info->int_vref == 0)
326 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100327 return ret;
328}
329
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800330static int ad5764_remove(struct spi_device *spi)
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100331{
332 struct iio_dev *indio_dev = spi_get_drvdata(spi);
333 struct ad5764_state *st = iio_priv(indio_dev);
334
335 iio_device_unregister(indio_dev);
336
Sachin Kamat7ff0de32013-08-19 12:38:00 +0100337 if (st->chip_info->int_vref == 0)
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100338 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100339
340 return 0;
341}
342
343static const struct spi_device_id ad5764_ids[] = {
344 { "ad5744", ID_AD5744 },
345 { "ad5744r", ID_AD5744R },
346 { "ad5764", ID_AD5764 },
347 { "ad5764r", ID_AD5764R },
348 { }
349};
350MODULE_DEVICE_TABLE(spi, ad5764_ids);
351
352static struct spi_driver ad5764_driver = {
353 .driver = {
354 .name = "ad5764",
355 .owner = THIS_MODULE,
356 },
357 .probe = ad5764_probe,
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800358 .remove = ad5764_remove,
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100359 .id_table = ad5764_ids,
360};
Lars-Peter Clausen519ff1d2012-02-20 19:42:38 +0100361module_spi_driver(ad5764_driver);
Lars-Peter Clausen68b14d72011-12-05 17:05:41 +0100362
363MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
364MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
365MODULE_LICENSE("GPL v2");