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Pantelis Antoniou48257c42005-10-28 16:25:58 -04001/*
2 * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
Pantelis Antoniou48257c42005-10-28 16:25:58 -040015#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/sched.h>
19#include <linux/string.h>
20#include <linux/ptrace.h>
21#include <linux/errno.h>
22#include <linux/ioport.h>
23#include <linux/slab.h>
24#include <linux/interrupt.h>
25#include <linux/pci.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
31#include <linux/spinlock.h>
32#include <linux/mii.h>
33#include <linux/ethtool.h>
34#include <linux/bitops.h>
35#include <linux/fs.h>
Marcelo Tosattif7b99962005-11-09 11:00:16 -020036#include <linux/platform_device.h>
Pantelis Antoniou48257c42005-10-28 16:25:58 -040037
38#include <asm/irq.h>
39#include <asm/uaccess.h>
40
41#ifdef CONFIG_8xx
42#include <asm/8xx_immap.h>
43#include <asm/pgtable.h>
44#include <asm/mpc8xx.h>
45#include <asm/commproc.h>
46#endif
47
48#include "fs_enet.h"
49
50/*************************************************/
51
52#if defined(CONFIG_CPM1)
53/* for a 8xx __raw_xxx's are sufficient */
54#define __fs_out32(addr, x) __raw_writel(x, addr)
55#define __fs_out16(addr, x) __raw_writew(x, addr)
56#define __fs_out8(addr, x) __raw_writeb(x, addr)
57#define __fs_in32(addr) __raw_readl(addr)
58#define __fs_in16(addr) __raw_readw(addr)
59#define __fs_in8(addr) __raw_readb(addr)
60#else
61/* for others play it safe */
62#define __fs_out32(addr, x) out_be32(addr, x)
63#define __fs_out16(addr, x) out_be16(addr, x)
64#define __fs_in32(addr) in_be32(addr)
65#define __fs_in16(addr) in_be16(addr)
66#endif
67
68/* write, read, set bits, clear bits */
69#define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
70#define R32(_p, _m) __fs_in32(&(_p)->_m)
71#define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
72#define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
73
74#define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
75#define R16(_p, _m) __fs_in16(&(_p)->_m)
76#define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
77#define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
78
79#define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
80#define R8(_p, _m) __fs_in8(&(_p)->_m)
81#define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
82#define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
83
84#define SCC_MAX_MULTICAST_ADDRS 64
85
86/*
87 * Delay to wait for SCC reset command to complete (in us)
88 */
89#define SCC_RESET_DELAY 50
90#define MAX_CR_CMD_LOOPS 10000
91
92static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
93{
94 cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
95 u32 v, ch;
96 int i = 0;
97
98 ch = fep->scc.idx << 2;
99 v = mk_cr_cmd(ch, op);
100 W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
101 for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
102 if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
103 break;
104
105 if (i >= MAX_CR_CMD_LOOPS) {
106 printk(KERN_ERR "%s(): Not able to issue CPM command\n",
107 __FUNCTION__);
108 return 1;
109 }
110 return 0;
111}
112
113static int do_pd_setup(struct fs_enet_private *fep)
114{
115 struct platform_device *pdev = to_platform_device(fep->dev);
116 struct resource *r;
117
118 /* Fill out IRQ field */
119 fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
David Vrabel48944732006-01-19 17:56:29 +0000120 if (fep->interrupt < 0)
121 return -EINVAL;
Pantelis Antoniou48257c42005-10-28 16:25:58 -0400122
123 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
124 fep->scc.sccp = (void *)r->start;
125
126 if (fep->scc.sccp == NULL)
127 return -EINVAL;
128
129 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
130 fep->scc.ep = (void *)r->start;
131
132 if (fep->scc.ep == NULL)
133 return -EINVAL;
134
135 return 0;
136}
137
138#define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
139#define SCC_RX_EVENT (SCCE_ENET_RXF)
140#define SCC_TX_EVENT (SCCE_ENET_TXB)
141#define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
142
143static int setup_data(struct net_device *dev)
144{
145 struct fs_enet_private *fep = netdev_priv(dev);
146 const struct fs_platform_info *fpi = fep->fpi;
147
148 fep->scc.idx = fs_get_scc_index(fpi->fs_no);
149 if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */
150 return -EINVAL;
151
152 do_pd_setup(fep);
153
154 fep->scc.hthi = 0;
155 fep->scc.htlo = 0;
156
157 fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
158 fep->ev_rx = SCC_RX_EVENT;
159 fep->ev_tx = SCC_TX_EVENT;
160 fep->ev_err = SCC_ERR_EVENT_MSK;
161
162 return 0;
163}
164
165static int allocate_bd(struct net_device *dev)
166{
167 struct fs_enet_private *fep = netdev_priv(dev);
168 const struct fs_platform_info *fpi = fep->fpi;
169
170 fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
171 sizeof(cbd_t), 8);
172 if (IS_DPERR(fep->ring_mem_addr))
173 return -ENOMEM;
174
175 fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
176
177 return 0;
178}
179
180static void free_bd(struct net_device *dev)
181{
182 struct fs_enet_private *fep = netdev_priv(dev);
183
184 if (fep->ring_base)
185 cpm_dpfree(fep->ring_mem_addr);
186}
187
188static void cleanup_data(struct net_device *dev)
189{
190 /* nothing */
191}
192
193static void set_promiscuous_mode(struct net_device *dev)
194{
195 struct fs_enet_private *fep = netdev_priv(dev);
196 scc_t *sccp = fep->scc.sccp;
197
198 S16(sccp, scc_psmr, SCC_PSMR_PRO);
199}
200
201static void set_multicast_start(struct net_device *dev)
202{
203 struct fs_enet_private *fep = netdev_priv(dev);
204 scc_enet_t *ep = fep->scc.ep;
205
206 W16(ep, sen_gaddr1, 0);
207 W16(ep, sen_gaddr2, 0);
208 W16(ep, sen_gaddr3, 0);
209 W16(ep, sen_gaddr4, 0);
210}
211
212static void set_multicast_one(struct net_device *dev, const u8 * mac)
213{
214 struct fs_enet_private *fep = netdev_priv(dev);
215 scc_enet_t *ep = fep->scc.ep;
216 u16 taddrh, taddrm, taddrl;
217
218 taddrh = ((u16) mac[5] << 8) | mac[4];
219 taddrm = ((u16) mac[3] << 8) | mac[2];
220 taddrl = ((u16) mac[1] << 8) | mac[0];
221
222 W16(ep, sen_taddrh, taddrh);
223 W16(ep, sen_taddrm, taddrm);
224 W16(ep, sen_taddrl, taddrl);
225 scc_cr_cmd(fep, CPM_CR_SET_GADDR);
226}
227
228static void set_multicast_finish(struct net_device *dev)
229{
230 struct fs_enet_private *fep = netdev_priv(dev);
231 scc_t *sccp = fep->scc.sccp;
232 scc_enet_t *ep = fep->scc.ep;
233
234 /* clear promiscuous always */
235 C16(sccp, scc_psmr, SCC_PSMR_PRO);
236
237 /* if all multi or too many multicasts; just enable all */
238 if ((dev->flags & IFF_ALLMULTI) != 0 ||
239 dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
240
241 W16(ep, sen_gaddr1, 0xffff);
242 W16(ep, sen_gaddr2, 0xffff);
243 W16(ep, sen_gaddr3, 0xffff);
244 W16(ep, sen_gaddr4, 0xffff);
245 }
246}
247
248static void set_multicast_list(struct net_device *dev)
249{
250 struct dev_mc_list *pmc;
251
252 if ((dev->flags & IFF_PROMISC) == 0) {
253 set_multicast_start(dev);
254 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
255 set_multicast_one(dev, pmc->dmi_addr);
256 set_multicast_finish(dev);
257 } else
258 set_promiscuous_mode(dev);
259}
260
261/*
262 * This function is called to start or restart the FEC during a link
263 * change. This only happens when switching between half and full
264 * duplex.
265 */
266static void restart(struct net_device *dev)
267{
268 struct fs_enet_private *fep = netdev_priv(dev);
269 scc_t *sccp = fep->scc.sccp;
270 scc_enet_t *ep = fep->scc.ep;
271 const struct fs_platform_info *fpi = fep->fpi;
272 u16 paddrh, paddrm, paddrl;
273 const unsigned char *mac;
274 int i;
275
276 C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
277
278 /* clear everything (slow & steady does it) */
279 for (i = 0; i < sizeof(*ep); i++)
280 __fs_out8((char *)ep + i, 0);
281
282 /* point to bds */
283 W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
284 W16(ep, sen_genscc.scc_tbase,
285 fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
286
287 /* Initialize function code registers for big-endian.
288 */
289 W8(ep, sen_genscc.scc_rfcr, SCC_EB);
290 W8(ep, sen_genscc.scc_tfcr, SCC_EB);
291
292 /* Set maximum bytes per receive buffer.
293 * This appears to be an Ethernet frame size, not the buffer
294 * fragment size. It must be a multiple of four.
295 */
296 W16(ep, sen_genscc.scc_mrblr, 0x5f0);
297
298 /* Set CRC preset and mask.
299 */
300 W32(ep, sen_cpres, 0xffffffff);
301 W32(ep, sen_cmask, 0xdebb20e3);
302
303 W32(ep, sen_crcec, 0); /* CRC Error counter */
304 W32(ep, sen_alec, 0); /* alignment error counter */
305 W32(ep, sen_disfc, 0); /* discard frame counter */
306
307 W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
308 W16(ep, sen_retlim, 15); /* Retry limit threshold */
309
310 W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
311
312 W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
313
314 W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
315 W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
316
317 /* Clear hash tables.
318 */
319 W16(ep, sen_gaddr1, 0);
320 W16(ep, sen_gaddr2, 0);
321 W16(ep, sen_gaddr3, 0);
322 W16(ep, sen_gaddr4, 0);
323 W16(ep, sen_iaddr1, 0);
324 W16(ep, sen_iaddr2, 0);
325 W16(ep, sen_iaddr3, 0);
326 W16(ep, sen_iaddr4, 0);
327
328 /* set address
329 */
330 mac = dev->dev_addr;
331 paddrh = ((u16) mac[5] << 8) | mac[4];
332 paddrm = ((u16) mac[3] << 8) | mac[2];
333 paddrl = ((u16) mac[1] << 8) | mac[0];
334
335 W16(ep, sen_paddrh, paddrh);
336 W16(ep, sen_paddrm, paddrm);
337 W16(ep, sen_paddrl, paddrl);
338
339 W16(ep, sen_pper, 0);
340 W16(ep, sen_taddrl, 0);
341 W16(ep, sen_taddrm, 0);
342 W16(ep, sen_taddrh, 0);
343
344 fs_init_bds(dev);
345
346 scc_cr_cmd(fep, CPM_CR_INIT_TRX);
347
348 W16(sccp, scc_scce, 0xffff);
349
350 /* Enable interrupts we wish to service.
351 */
352 W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
353
354 /* Set GSMR_H to enable all normal operating modes.
355 * Set GSMR_L to enable Ethernet to MC68160.
356 */
357 W32(sccp, scc_gsmrh, 0);
358 W32(sccp, scc_gsmrl,
359 SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
360 SCC_GSMRL_MODE_ENET);
361
362 /* Set sync/delimiters.
363 */
364 W16(sccp, scc_dsr, 0xd555);
365
366 /* Set processing mode. Use Ethernet CRC, catch broadcast, and
367 * start frame search 22 bit times after RENA.
368 */
369 W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
370
371 /* Set full duplex mode if needed */
Vitaly Bordug5b4b8452006-08-14 23:00:30 -0700372 if (fep->phydev->duplex)
Pantelis Antoniou48257c42005-10-28 16:25:58 -0400373 S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
374
375 S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
376}
377
378static void stop(struct net_device *dev)
379{
380 struct fs_enet_private *fep = netdev_priv(dev);
381 scc_t *sccp = fep->scc.sccp;
382 int i;
383
384 for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
385 udelay(1);
386
387 if (i == SCC_RESET_DELAY)
388 printk(KERN_WARNING DRV_MODULE_NAME
389 ": %s SCC timeout on graceful transmit stop\n",
390 dev->name);
391
392 W16(sccp, scc_sccm, 0);
393 C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
394
395 fs_cleanup_bds(dev);
396}
397
398static void pre_request_irq(struct net_device *dev, int irq)
399{
400 immap_t *immap = fs_enet_immap;
401 u32 siel;
402
403 /* SIU interrupt */
404 if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
405
406 siel = in_be32(&immap->im_siu_conf.sc_siel);
407 if ((irq & 1) == 0)
408 siel |= (0x80000000 >> irq);
409 else
410 siel &= ~(0x80000000 >> (irq & ~1));
411 out_be32(&immap->im_siu_conf.sc_siel, siel);
412 }
413}
414
415static void post_free_irq(struct net_device *dev, int irq)
416{
417 /* nothing */
418}
419
420static void napi_clear_rx_event(struct net_device *dev)
421{
422 struct fs_enet_private *fep = netdev_priv(dev);
423 scc_t *sccp = fep->scc.sccp;
424
425 W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
426}
427
428static void napi_enable_rx(struct net_device *dev)
429{
430 struct fs_enet_private *fep = netdev_priv(dev);
431 scc_t *sccp = fep->scc.sccp;
432
433 S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
434}
435
436static void napi_disable_rx(struct net_device *dev)
437{
438 struct fs_enet_private *fep = netdev_priv(dev);
439 scc_t *sccp = fep->scc.sccp;
440
441 C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
442}
443
444static void rx_bd_done(struct net_device *dev)
445{
446 /* nothing */
447}
448
449static void tx_kickstart(struct net_device *dev)
450{
451 /* nothing */
452}
453
454static u32 get_int_events(struct net_device *dev)
455{
456 struct fs_enet_private *fep = netdev_priv(dev);
457 scc_t *sccp = fep->scc.sccp;
458
459 return (u32) R16(sccp, scc_scce);
460}
461
462static void clear_int_events(struct net_device *dev, u32 int_events)
463{
464 struct fs_enet_private *fep = netdev_priv(dev);
465 scc_t *sccp = fep->scc.sccp;
466
467 W16(sccp, scc_scce, int_events & 0xffff);
468}
469
470static void ev_error(struct net_device *dev, u32 int_events)
471{
472 printk(KERN_WARNING DRV_MODULE_NAME
473 ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
474}
475
476static int get_regs(struct net_device *dev, void *p, int *sizep)
477{
478 struct fs_enet_private *fep = netdev_priv(dev);
479
480 if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t))
481 return -EINVAL;
482
483 memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
484 p = (char *)p + sizeof(scc_t);
485
486 memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t));
487
488 return 0;
489}
490
491static int get_regs_len(struct net_device *dev)
492{
493 return sizeof(scc_t) + sizeof(scc_enet_t);
494}
495
496static void tx_restart(struct net_device *dev)
497{
498 struct fs_enet_private *fep = netdev_priv(dev);
499
500 scc_cr_cmd(fep, CPM_CR_RESTART_TX);
501}
502
Vitaly Bordug5b4b8452006-08-14 23:00:30 -0700503
504
Pantelis Antoniou48257c42005-10-28 16:25:58 -0400505/*************************************************************************/
506
507const struct fs_ops fs_scc_ops = {
508 .setup_data = setup_data,
509 .cleanup_data = cleanup_data,
510 .set_multicast_list = set_multicast_list,
511 .restart = restart,
512 .stop = stop,
513 .pre_request_irq = pre_request_irq,
514 .post_free_irq = post_free_irq,
515 .napi_clear_rx_event = napi_clear_rx_event,
516 .napi_enable_rx = napi_enable_rx,
517 .napi_disable_rx = napi_disable_rx,
518 .rx_bd_done = rx_bd_done,
519 .tx_kickstart = tx_kickstart,
520 .get_int_events = get_int_events,
521 .clear_int_events = clear_int_events,
522 .ev_error = ev_error,
523 .get_regs = get_regs,
524 .get_regs_len = get_regs_len,
525 .tx_restart = tx_restart,
526 .allocate_bd = allocate_bd,
527 .free_bd = free_bd,
528};