| Daniel Walker | 62a6cc5 | 2010-05-05 07:27:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2008 Google, Inc. |
| 3 | * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. |
| 4 | * |
| 5 | * This software is licensed under the terms of the GNU General Public |
| 6 | * License version 2, as published by the Free Software Foundation, and |
| 7 | * may be copied, distributed, and modified under those terms. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | |
| 19 | #include <linux/dma-mapping.h> |
| 20 | #include <mach/irqs.h> |
| 21 | #include <mach/msm_iomap.h> |
| 22 | #include <mach/dma.h> |
| 23 | #include <mach/board.h> |
| 24 | |
| 25 | #include "devices.h" |
| 26 | |
| 27 | #include <asm/mach/flash.h> |
| 28 | |
| 29 | #include <mach/mmc.h> |
| 30 | |
| 31 | static struct resource resources_uart3[] = { |
| 32 | { |
| 33 | .start = INT_UART3, |
| 34 | .end = INT_UART3, |
| 35 | .flags = IORESOURCE_IRQ, |
| 36 | }, |
| 37 | { |
| 38 | .start = MSM_UART3_PHYS, |
| 39 | .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, |
| 40 | .flags = IORESOURCE_MEM, |
| 41 | }, |
| 42 | }; |
| 43 | |
| 44 | struct platform_device msm_device_uart3 = { |
| 45 | .name = "msm_serial", |
| 46 | .id = 2, |
| 47 | .num_resources = ARRAY_SIZE(resources_uart3), |
| 48 | .resource = resources_uart3, |
| 49 | }; |
| 50 | |
| 51 | struct clk msm_clocks_8x50[] = { |
| 52 | CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), |
| 53 | CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), |
| 54 | CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), |
| 55 | CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), |
| 56 | CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), |
| 57 | CLK_PCOM("gp_clk", GP_CLK, NULL, 0), |
| 58 | CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), |
| 59 | CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), |
| 60 | CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), |
| 61 | CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), |
| 62 | CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), |
| 63 | CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), |
| 64 | CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), |
| 65 | CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), |
| 66 | CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), |
| 67 | CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), |
| 68 | CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), |
| 69 | CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), |
| 70 | CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), |
| 71 | CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), |
| 72 | CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0), |
| 73 | CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), |
| 74 | CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), |
| 75 | CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), |
| 76 | CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF), |
| 77 | CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), |
| 78 | CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), |
| 79 | CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0), |
| 80 | CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), |
| 81 | CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF), |
| 82 | CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), |
| 83 | CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF), |
| 84 | CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), |
| 85 | CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), |
| 86 | CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), |
| 87 | CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), |
| 88 | CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), |
| 89 | }; |
| 90 | |
| 91 | unsigned msm_num_clocks_8x50 = ARRAY_SIZE(msm_clocks_8x50); |
| 92 | |