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gerrit-public.fairphone.software / kernel / msm-4.9 / 802d738a5e12768d70e295cc80b830b66b073c9d / . / drivers / clk / qcom / vdd-level-sdm845.h
blob: a8d08b31865f13385d795fd6b4c5f69b2f3165ab [file] [log] [blame]
Deepak Katragadda575a45f2016-10-11 15:06:56 -0700[diff] [blame]1/*
Vicky Wallacece2159e2016-12-27 15:58:35 -0800[diff] [blame]2 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Deepak Katragadda575a45f2016-10-11 15:06:56 -0700[diff] [blame]3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __DRIVERS_CLK_QCOM_VDD_LEVEL_COBALT_H
15#define __DRIVERS_CLK_QCOM_VDD_LEVEL_COBALT_H
16
17#include <linux/regulator/consumer.h>
18#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19
20#define VDD_CX_FMAX_MAP1(l1, f1) \
21 .vdd_class = &vdd_cx, \
22 .rate_max = (unsigned long[VDD_CX_NUM]) { \
23 [VDD_CX_##l1] = (f1), \
24 }, \
25 .num_rate_max = VDD_CX_NUM
26
27#define VDD_CX_FMAX_MAP2(l1, f1, l2, f2) \
28 .vdd_class = &vdd_cx, \
29 .rate_max = (unsigned long[VDD_CX_NUM]) { \
30 [VDD_CX_##l1] = (f1), \
31 [VDD_CX_##l2] = (f2), \
32 }, \
33 .num_rate_max = VDD_CX_NUM
34
35#define VDD_CX_FMAX_MAP3(l1, f1, l2, f2, l3, f3) \
36 .vdd_class = &vdd_cx, \
37 .rate_max = (unsigned long[VDD_CX_NUM]) { \
38 [VDD_CX_##l1] = (f1), \
39 [VDD_CX_##l2] = (f2), \
40 [VDD_CX_##l3] = (f3), \
41 }, \
42 .num_rate_max = VDD_CX_NUM
43
44#define VDD_CX_FMAX_MAP4(l1, f1, l2, f2, l3, f3, l4, f4) \
45 .vdd_class = &vdd_cx, \
46 .rate_max = (unsigned long[VDD_CX_NUM]) { \
47 [VDD_CX_##l1] = (f1), \
48 [VDD_CX_##l2] = (f2), \
49 [VDD_CX_##l3] = (f3), \
50 [VDD_CX_##l4] = (f4), \
51 }, \
52 .num_rate_max = VDD_CX_NUM
53
54#define VDD_CX_FMAX_MAP5(l1, f1, l2, f2, l3, f3, l4, f4, l5, f5) \
55 .vdd_class = &vdd_cx, \
56 .rate_max = (unsigned long[VDD_CX_NUM]) { \
57 [VDD_CX_##l1] = (f1), \
58 [VDD_CX_##l2] = (f2), \
59 [VDD_CX_##l3] = (f3), \
60 [VDD_CX_##l4] = (f4), \
61 [VDD_CX_##l5] = (f5), \
62 }, \
63 .num_rate_max = VDD_CX_NUM
64
65#define VDD_CX_FMAX_MAP6(l1, f1, l2, f2, l3, f3, l4, f4, l5, f5, l6, f6) \
66 .vdd_class = &vdd_cx, \
67 .rate_max = (unsigned long[VDD_CX_NUM]) { \
68 [VDD_CX_##l1] = (f1), \
69 [VDD_CX_##l2] = (f2), \
70 [VDD_CX_##l3] = (f3), \
71 [VDD_CX_##l4] = (f4), \
72 [VDD_CX_##l5] = (f5), \
73 [VDD_CX_##l6] = (f6), \
74 }, \
75 .num_rate_max = VDD_CX_NUM
76
77#define VDD_CX_FMAX_MAP1_AO(l1, f1) \
78 .vdd_class = &vdd_cx_ao, \
79 .rate_max = (unsigned long[VDD_CX_NUM]) { \
80 [VDD_CX_##l1] = (f1), \
81 }, \
82 .num_rate_max = VDD_CX_NUM
83
84#define VDD_CX_FMAX_MAP3_AO(l1, f1, l2, f2, l3, f3) \
85 .vdd_class = &vdd_cx_ao, \
86 .rate_max = (unsigned long[VDD_CX_NUM]) { \
87 [VDD_CX_##l1] = (f1), \
88 [VDD_CX_##l2] = (f2), \
89 [VDD_CX_##l3] = (f3), \
90 }, \
91 .num_rate_max = VDD_CX_NUM
92
Vicky Wallacece2159e2016-12-27 15:58:35 -0800[diff] [blame]93#define VDD_MX_FMAX_MAP4(l1, f1, l2, f2, l3, f3, l4, f4) \
94 .vdd_class = &vdd_mx, \
95 .rate_max = (unsigned long[VDD_CX_NUM]) { \
96 [VDD_CX_##l1] = (f1), \
97 [VDD_CX_##l2] = (f2), \
98 [VDD_CX_##l3] = (f3), \
99 [VDD_CX_##l4] = (f4), \
100 }, \
101 .num_rate_max = VDD_CX_NUM
102
103#define VDD_GX_FMAX_MAP8(l1, f1, l2, f2, l3, f3, l4, f4, l5, f5, l6, f6, \
104 l7, f7, l8, f8) \
105 .vdd_class = &vdd_gfx, \
106 .rate_max = (unsigned long[VDD_GX_NUM]) { \
107 [VDD_GX_##l1] = (f1), \
108 [VDD_GX_##l2] = (f2), \
109 [VDD_GX_##l3] = (f3), \
110 [VDD_GX_##l4] = (f4), \
111 [VDD_GX_##l5] = (f5), \
112 [VDD_GX_##l6] = (f6), \
113 [VDD_GX_##l7] = (f7), \
114 [VDD_GX_##l8] = (f8), \
115 }, \
116 .num_rate_max = VDD_GX_NUM
117
Deepak Katragadda575a45f2016-10-11 15:06:56 -0700[diff] [blame]118enum vdd_cx_levels {
119 VDD_CX_NONE,
120 VDD_CX_MIN, /* MIN SVS */
121 VDD_CX_LOWER, /* SVS2 */
122 VDD_CX_LOW, /* SVS */
123 VDD_CX_LOW_L1, /* SVSL1 */
124 VDD_CX_NOMINAL, /* NOM */
125 VDD_CX_HIGH, /* TURBO */
126 VDD_CX_NUM,
127};
128
Vicky Wallacece2159e2016-12-27 15:58:35 -0800[diff] [blame]129enum vdd_gx_levels {
130 VDD_GX_NONE,
131 VDD_GX_MIN, /* MIN SVS */
132 VDD_GX_LOWER, /* SVS2 */
133 VDD_GX_LOW, /* SVS */
134 VDD_GX_LOW_L1, /* SVSL1 */
135 VDD_GX_NOMINAL, /* NOM */
136 VDD_GX_NOMINAL_L1, /* NOM1 */
137 VDD_GX_HIGH, /* TURBO */
138 VDD_GX_HIGH_L1, /* TURBO1 */
139 VDD_GX_NUM,
140};
141
Deepak Katragadda575a45f2016-10-11 15:06:56 -0700[diff] [blame]142/* Need to use the correct VI/VL mappings */
143static int vdd_corner[] = {
144 RPMH_REGULATOR_LEVEL_OFF, /* VDD_CX_NONE */
145 RPMH_REGULATOR_LEVEL_MIN_SVS, /* VDD_CX_MIN */
146 RPMH_REGULATOR_LEVEL_LOW_SVS, /* VDD_CX_LOWER */
147 RPMH_REGULATOR_LEVEL_SVS, /* VDD_CX_LOW */
148 RPMH_REGULATOR_LEVEL_SVS_L1, /* VDD_CX_LOW_L1 */
149 RPMH_REGULATOR_LEVEL_NOM, /* VDD_CX_NOMINAL */
150 RPMH_REGULATOR_LEVEL_TURBO, /* VDD_CX_HIGH */
151};
152
153#endif