Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 1 | if ARCH_TEGRA |
| 2 | |
| 3 | comment "NVIDIA Tegra options" |
| 4 | |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 5 | config ARCH_TEGRA_2x_SOC |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 6 | bool "Enable support for Tegra20 family" |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 7 | select CPU_V7 |
| 8 | select ARM_GIC |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 9 | select ARCH_REQUIRE_GPIOLIB |
Stephen Warren | f1f1ffa | 2012-02-01 14:04:48 -0700 | [diff] [blame] | 10 | select PINCTRL |
| 11 | select PINCTRL_TEGRA20 |
Benoit Goby | 91525d0 | 2011-03-09 16:28:55 -0800 | [diff] [blame] | 12 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
Arnd Bergmann | 279b658 | 2012-03-02 17:26:00 -0500 | [diff] [blame] | 13 | select USB_ULPI if USB |
Benoit Goby | 91525d0 | 2011-03-09 16:28:55 -0800 | [diff] [blame] | 14 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 15 | select ARM_ERRATA_720789 |
| 16 | select ARM_ERRATA_742230 |
| 17 | select ARM_ERRATA_751472 |
| 18 | select ARM_ERRATA_754327 |
| 19 | select ARM_ERRATA_764369 |
| 20 | select PL310_ERRATA_727915 if CACHE_L2X0 |
| 21 | select PL310_ERRATA_769419 if CACHE_L2X0 |
Arnd Bergmann | 013df38 | 2012-03-02 15:58:28 -0500 | [diff] [blame] | 22 | select CPU_FREQ_TABLE if CPU_FREQ |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 23 | help |
| 24 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
| 25 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
| 26 | |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 27 | config ARCH_TEGRA_3x_SOC |
| 28 | bool "Enable support for Tegra30 family" |
| 29 | select CPU_V7 |
| 30 | select ARM_GIC |
| 31 | select ARCH_REQUIRE_GPIOLIB |
Stephen Warren | f1f1ffa | 2012-02-01 14:04:48 -0700 | [diff] [blame] | 32 | select PINCTRL |
| 33 | select PINCTRL_TEGRA30 |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 34 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
Arnd Bergmann | 279b658 | 2012-03-02 17:26:00 -0500 | [diff] [blame] | 35 | select USB_ULPI if USB |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 36 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
| 37 | select USE_OF |
Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 38 | select ARM_ERRATA_743622 |
| 39 | select ARM_ERRATA_751472 |
| 40 | select ARM_ERRATA_754322 |
| 41 | select ARM_ERRATA_764369 |
| 42 | select PL310_ERRATA_769419 if CACHE_L2X0 |
Arnd Bergmann | 013df38 | 2012-03-02 15:58:28 -0500 | [diff] [blame] | 43 | select CPU_FREQ_TABLE if CPU_FREQ |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 44 | help |
| 45 | Support for NVIDIA Tegra T30 processor family, based on the |
| 46 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 47 | |
Mike Rapoport | 77ffc14 | 2010-09-27 11:26:33 +0200 | [diff] [blame] | 48 | config TEGRA_PCI |
| 49 | bool "PCI Express support" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 50 | depends on ARCH_TEGRA_2x_SOC |
Mike Rapoport | 77ffc14 | 2010-09-27 11:26:33 +0200 | [diff] [blame] | 51 | select PCI |
| 52 | |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 53 | comment "Tegra board type" |
| 54 | |
| 55 | config MACH_HARMONY |
| 56 | bool "Harmony board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 57 | depends on ARCH_TEGRA_2x_SOC |
Uwe Kleine-König | 885f24e | 2011-07-26 10:15:59 +0200 | [diff] [blame] | 58 | select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 59 | help |
| 60 | Support for nVidia Harmony development platform |
| 61 | |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 62 | config MACH_KAEN |
| 63 | bool "Kaen board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 64 | depends on ARCH_TEGRA_2x_SOC |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 65 | select MACH_SEABOARD |
Uwe Kleine-König | 885f24e | 2011-07-26 10:15:59 +0200 | [diff] [blame] | 66 | select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 67 | help |
| 68 | Support for the Kaen version of Seaboard |
| 69 | |
Marc Dietrich | 65b935a | 2011-03-07 21:01:31 +0100 | [diff] [blame] | 70 | config MACH_PAZ00 |
| 71 | bool "Paz00 board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 72 | depends on ARCH_TEGRA_2x_SOC |
Marc Dietrich | 65b935a | 2011-03-07 21:01:31 +0100 | [diff] [blame] | 73 | help |
| 74 | Support for the Toshiba AC100/Dynabook AZ netbook |
| 75 | |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 76 | config MACH_SEABOARD |
| 77 | bool "Seaboard board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 78 | depends on ARCH_TEGRA_2x_SOC |
Uwe Kleine-König | 885f24e | 2011-07-26 10:15:59 +0200 | [diff] [blame] | 79 | select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 80 | help |
| 81 | Support for nVidia Seaboard development platform. It will |
| 82 | also be included for some of the derivative boards that |
| 83 | have large similarities with the seaboard design. |
| 84 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 85 | config MACH_TEGRA_DT |
Peter De Schrijver | a2385dc | 2011-12-14 17:03:18 +0200 | [diff] [blame] | 86 | bool "Generic Tegra20 board (FDT support)" |
Stephen Warren | 24692c0 | 2011-12-19 12:24:04 -0700 | [diff] [blame] | 87 | depends on ARCH_TEGRA_2x_SOC |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 88 | select USE_OF |
| 89 | help |
Peter De Schrijver | a2385dc | 2011-12-14 17:03:18 +0200 | [diff] [blame] | 90 | Support for generic NVIDIA Tegra20 boards using Flattened Device Tree |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 91 | |
Mike Rapoport | cca414b | 2011-02-07 10:10:53 +0200 | [diff] [blame] | 92 | config MACH_TRIMSLICE |
| 93 | bool "TrimSlice board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 94 | depends on ARCH_TEGRA_2x_SOC |
Mike Rapoport | cca414b | 2011-02-07 10:10:53 +0200 | [diff] [blame] | 95 | select TEGRA_PCI |
| 96 | help |
| 97 | Support for CompuLab TrimSlice platform |
| 98 | |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 99 | config MACH_WARIO |
| 100 | bool "Wario board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 101 | depends on ARCH_TEGRA_2x_SOC |
Olof Johansson | d9a51fe | 2011-02-19 17:25:32 -0800 | [diff] [blame] | 102 | select MACH_SEABOARD |
| 103 | help |
| 104 | Support for the Wario version of Seaboard |
| 105 | |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 106 | config MACH_VENTANA |
| 107 | bool "Ventana board" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 108 | depends on ARCH_TEGRA_2x_SOC |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 109 | select MACH_TEGRA_DT |
| 110 | help |
| 111 | Support for the nVidia Ventana development platform |
| 112 | |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 113 | choice |
Stephen Warren | 80881da | 2012-03-26 12:49:57 -0600 | [diff] [blame^] | 114 | prompt "Default low-level debug console UART" |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 115 | default TEGRA_DEBUG_UART_NONE |
| 116 | |
| 117 | config TEGRA_DEBUG_UART_NONE |
| 118 | bool "None" |
| 119 | |
| 120 | config TEGRA_DEBUG_UARTA |
| 121 | bool "UART-A" |
| 122 | |
| 123 | config TEGRA_DEBUG_UARTB |
| 124 | bool "UART-B" |
| 125 | |
| 126 | config TEGRA_DEBUG_UARTC |
| 127 | bool "UART-C" |
| 128 | |
| 129 | config TEGRA_DEBUG_UARTD |
| 130 | bool "UART-D" |
| 131 | |
| 132 | config TEGRA_DEBUG_UARTE |
| 133 | bool "UART-E" |
| 134 | |
| 135 | endchoice |
| 136 | |
Stephen Warren | 80881da | 2012-03-26 12:49:57 -0600 | [diff] [blame^] | 137 | choice |
| 138 | prompt "Automatic low-level debug console UART" |
| 139 | default TEGRA_DEBUG_UART_AUTO_NONE |
| 140 | |
| 141 | config TEGRA_DEBUG_UART_AUTO_NONE |
| 142 | bool "None" |
| 143 | |
| 144 | config TEGRA_DEBUG_UART_AUTO_ODMDATA |
| 145 | bool "Via ODMDATA" |
| 146 | help |
| 147 | Automatically determines which UART to use for low-level debug based |
| 148 | on the ODMDATA value. This value is part of the BCT, and is written |
| 149 | to the boot memory device using nvflash, or other flashing tool. |
| 150 | When bits 19:18 are 3, then bits 17:15 indicate which UART to use; |
| 151 | 0/1/2/3/4 are UART A/B/C/D/E. |
| 152 | |
| 153 | config TEGRA_DEBUG_UART_AUTO_SCRATCH |
| 154 | bool "Via UART scratch register" |
| 155 | help |
| 156 | Automatically determines which UART to use for low-level debug based |
| 157 | on the UART scratch register value. Some bootloaders put ASCII 'D' |
| 158 | in this register when they initialize their own console UART output. |
| 159 | Using this option allows the kernel to automatically pick the same |
| 160 | UART. |
| 161 | |
| 162 | endchoice |
| 163 | |
Colin Cross | 4de3a8f | 2010-04-05 13:16:42 -0700 | [diff] [blame] | 164 | config TEGRA_SYSTEM_DMA |
| 165 | bool "Enable system DMA driver for NVIDIA Tegra SoCs" |
| 166 | default y |
| 167 | help |
| 168 | Adds system DMA functionality for NVIDIA Tegra SoCs, used by |
| 169 | several Tegra device drivers |
| 170 | |
Colin Cross | efdf72a | 2011-02-12 18:22:49 -0800 | [diff] [blame] | 171 | config TEGRA_EMC_SCALING_ENABLE |
| 172 | bool "Enable scaling the memory frequency" |
Mark Brown | 3837686 | 2011-02-22 20:35:24 +0000 | [diff] [blame] | 173 | |
| 174 | endif |