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gerrit-public.fairphone.software / kernel / msm-4.9 / 80d7f07f48af432f6126877a2fb689cb01a4629e / . / include / uapi / linux / msm_vidc_dec.h
blob: 46af82b8120a8c3f2a2efb3a39a859f914c0ba59 [file] [log] [blame]
Arun kumarbd77f1c2018-05-16 15:49:09 +0530[diff] [blame]1#ifndef _UAPI_MSM_VIDC_DEC_H_
2#define _UAPI_MSM_VIDC_DEC_H_
3
4#include <linux/types.h>
5#include <linux/ioctl.h>
6
7/* STATUS CODES */
8/* Base value for status codes */
9#define VDEC_S_BASE 0x40000000
10/* Success */
11#define VDEC_S_SUCCESS (VDEC_S_BASE)
12/* General failure */
13#define VDEC_S_EFAIL (VDEC_S_BASE + 1)
14/* Fatal irrecoverable failure. Need to tear down session. */
15#define VDEC_S_EFATAL (VDEC_S_BASE + 2)
16/* Error detected in the passed parameters */
17#define VDEC_S_EBADPARAM (VDEC_S_BASE + 3)
18/* Command called in invalid state. */
19#define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4)
20 /* Insufficient OS resources - thread, memory etc. */
21#define VDEC_S_ENOSWRES (VDEC_S_BASE + 5)
22 /* Insufficient HW resources - core capacity maxed out. */
23#define VDEC_S_ENOHWRES (VDEC_S_BASE + 6)
24/* Invalid command called */
25#define VDEC_S_EINVALCMD (VDEC_S_BASE + 7)
26/* Command timeout. */
27#define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8)
28/* Pre-requirement is not met for API. */
29#define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9)
30/* Command queue is full. */
31#define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10)
32/* Command is not supported by this driver */
33#define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11)
34/* Command is not implemented by thedriver. */
35#define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12)
36/* Command is not implemented by the driver. */
37#define VDEC_S_BUSY (VDEC_S_BASE + 13)
38#define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14)
39
40#define VDEC_INTF_VER 1
41#define VDEC_MSG_BASE 0x0000000
42/*
43 *Codes to identify asynchronous message responses and events that driver
44 *wants to communicate to the app.
45 */
46#define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0)
47#define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1)
48#define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2)
49#define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3)
50#define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4)
51#define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5)
52#define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6)
53#define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7)
54#define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8)
55#define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9)
56#define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10)
57#define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11)
58#define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12)
59#define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13)
60#define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14)
61#define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15)
62#define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16)
63#define VDEC_MSG_EVT_HW_OVERLOAD (VDEC_MSG_BASE + 17)
64#define VDEC_MSG_EVT_MAX_CLIENTS (VDEC_MSG_BASE + 18)
65#define VDEC_MSG_EVT_HW_UNSUPPORTED (VDEC_MSG_BASE + 19)
66
67/*Buffer flags bits masks.*/
68#define VDEC_BUFFERFLAG_EOS 0x00000001
69#define VDEC_BUFFERFLAG_DECODEONLY 0x00000004
70#define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008
71#define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010
72#define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020
73#define VDEC_BUFFERFLAG_EXTRADATA 0x00000040
74#define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080
75
76/*Post processing flags bit masks*/
77#define VDEC_EXTRADATA_NONE 0x001
78#define VDEC_EXTRADATA_QP 0x004
79#define VDEC_EXTRADATA_MB_ERROR_MAP 0x008
80#define VDEC_EXTRADATA_SEI 0x010
81#define VDEC_EXTRADATA_VUI 0x020
82#define VDEC_EXTRADATA_VC1 0x040
83
84#define VDEC_EXTRADATA_EXT_DATA 0x0800
85#define VDEC_EXTRADATA_USER_DATA 0x1000
86#define VDEC_EXTRADATA_EXT_BUFFER 0x2000
87
88#define VDEC_CMDBASE 0x800
89#define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE)
90
91#define VDEC_IOCTL_MAGIC 'v'
92
93struct vdec_ioctl_msg {
94 void __user *in;
95 void __user *out;
96};
97
98/*
99 * CMD params: InputParam:enum vdec_codec
100 * OutputParam: struct vdec_profile_level
101 */
102#define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \
103 _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg)
104
105/*
106 * CMD params:InputParam: NULL
107 * OutputParam: uint32_t(bitmask)
108 */
109#define VDEC_IOCTL_GET_INTERLACE_FORMAT \
110 _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg)
111
112/*
113 * CMD params: InputParam: enum vdec_codec
114 * OutputParam: struct vdec_profile_level
115 */
116#define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \
117 _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg)
118
119/*
120 * CMD params: SET: InputParam: enum vdec_output_fromat OutputParam: NULL
121 * GET: InputParam: NULL OutputParam: enum vdec_output_fromat
122 */
123#define VDEC_IOCTL_SET_OUTPUT_FORMAT \
124 _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg)
125#define VDEC_IOCTL_GET_OUTPUT_FORMAT \
126 _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg)
127
128/*
129 * CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL
130 * GET: InputParam: NULL OutputParam: enum vdec_codec
131 */
132#define VDEC_IOCTL_SET_CODEC \
133 _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg)
134#define VDEC_IOCTL_GET_CODEC \
135 _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg)
136
137/*
138 * CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL
139 * GET: InputParam: NULL outputparam: struct vdec_picsize
140 */
141#define VDEC_IOCTL_SET_PICRES \
142 _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg)
143#define VDEC_IOCTL_GET_PICRES \
144 _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg)
145
146#define VDEC_IOCTL_SET_EXTRADATA \
147 _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg)
148#define VDEC_IOCTL_GET_EXTRADATA \
149 _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg)
150
151#define VDEC_IOCTL_SET_SEQUENCE_HEADER \
152 _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg)
153
154/*
155 * CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL
156 * GET: InputParam - NULL, OutputParam - vdec_allocatorproperty
157 */
158#define VDEC_IOCTL_SET_BUFFER_REQ \
159 _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg)
160#define VDEC_IOCTL_GET_BUFFER_REQ \
161 _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg)
162/* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */
163#define VDEC_IOCTL_ALLOCATE_BUFFER \
164 _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg)
165/* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/
166#define VDEC_IOCTL_FREE_BUFFER \
167 _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg)
168
169/*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/
170#define VDEC_IOCTL_SET_BUFFER \
171 _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg)
172
173/* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/
174#define VDEC_IOCTL_FILL_OUTPUT_BUFFER \
175 _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg)
176
177/*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/
178#define VDEC_IOCTL_DECODE_FRAME \
179 _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg)
180
181#define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19)
182#define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20)
183#define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21)
184#define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22)
185#define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23)
186
187/*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */
188#define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg)
189
190/* ========================================================
191 * IOCTL for getting asynchronous notification from driver
192 * ========================================================
193 */
194
195/*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/
196#define VDEC_IOCTL_GET_NEXT_MSG \
197 _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg)
198
199#define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26)
200
201#define VDEC_IOCTL_GET_NUMBER_INSTANCES \
202 _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg)
203
204#define VDEC_IOCTL_SET_PICTURE_ORDER \
205 _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg)
206
207#define VDEC_IOCTL_SET_FRAME_RATE \
208 _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg)
209
210#define VDEC_IOCTL_SET_H264_MV_BUFFER \
211 _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg)
212
213#define VDEC_IOCTL_FREE_H264_MV_BUFFER \
214 _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg)
215
216#define VDEC_IOCTL_GET_MV_BUFFER_SIZE \
217 _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg)
218
219#define VDEC_IOCTL_SET_IDR_ONLY_DECODING \
220 _IO(VDEC_IOCTL_MAGIC, 33)
221
222#define VDEC_IOCTL_SET_CONT_ON_RECONFIG \
223 _IO(VDEC_IOCTL_MAGIC, 34)
224
225#define VDEC_IOCTL_SET_DISABLE_DMX \
226 _IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg)
227
228#define VDEC_IOCTL_GET_DISABLE_DMX \
229 _IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg)
230
231#define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \
232 _IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg)
233
234#define VDEC_IOCTL_SET_PERF_CLK \
235 _IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg)
236
237#define VDEC_IOCTL_SET_META_BUFFERS \
238 _IOW(VDEC_IOCTL_MAGIC, 39, struct vdec_ioctl_msg)
239
240#define VDEC_IOCTL_FREE_META_BUFFERS \
241 _IO(VDEC_IOCTL_MAGIC, 40)
242
243enum vdec_picture {
244 PICTURE_TYPE_I,
245 PICTURE_TYPE_P,
246 PICTURE_TYPE_B,
247 PICTURE_TYPE_BI,
248 PICTURE_TYPE_SKIP,
249 PICTURE_TYPE_IDR,
250 PICTURE_TYPE_UNKNOWN
251};
252
253enum vdec_buffer {
254 VDEC_BUFFER_TYPE_INPUT,
255 VDEC_BUFFER_TYPE_OUTPUT
256};
257
258struct vdec_allocatorproperty {
259 enum vdec_buffer buffer_type;
260 uint32_t mincount;
261 uint32_t maxcount;
262 uint32_t actualcount;
263 size_t buffer_size;
264 uint32_t alignment;
265 uint32_t buf_poolid;
266 size_t meta_buffer_size;
267};
268
269struct vdec_bufferpayload {
270 void __user *bufferaddr;
271 size_t buffer_len;
272 int pmem_fd;
273 size_t offset;
274 size_t mmaped_size;
275};
276
277struct vdec_setbuffer_cmd {
278 enum vdec_buffer buffer_type;
279 struct vdec_bufferpayload buffer;
280};
281
282struct vdec_fillbuffer_cmd {
283 struct vdec_bufferpayload buffer;
284 void *client_data;
285};
286
287enum vdec_bufferflush {
288 VDEC_FLUSH_TYPE_INPUT,
289 VDEC_FLUSH_TYPE_OUTPUT,
290 VDEC_FLUSH_TYPE_ALL
291};
292
293enum vdec_codec {
294 VDEC_CODECTYPE_H264 = 0x1,
295 VDEC_CODECTYPE_H263 = 0x2,
296 VDEC_CODECTYPE_MPEG4 = 0x3,
297 VDEC_CODECTYPE_DIVX_3 = 0x4,
298 VDEC_CODECTYPE_DIVX_4 = 0x5,
299 VDEC_CODECTYPE_DIVX_5 = 0x6,
300 VDEC_CODECTYPE_DIVX_6 = 0x7,
301 VDEC_CODECTYPE_XVID = 0x8,
302 VDEC_CODECTYPE_MPEG1 = 0x9,
303 VDEC_CODECTYPE_MPEG2 = 0xa,
304 VDEC_CODECTYPE_VC1 = 0xb,
305 VDEC_CODECTYPE_VC1_RCV = 0xc,
306 VDEC_CODECTYPE_HEVC = 0xd,
307 VDEC_CODECTYPE_MVC = 0xe,
308 VDEC_CODECTYPE_VP8 = 0xf,
309 VDEC_CODECTYPE_VP9 = 0x10,
310};
311
312enum vdec_mpeg2_profile {
313 VDEC_MPEG2ProfileSimple = 0x1,
314 VDEC_MPEG2ProfileMain = 0x2,
315 VDEC_MPEG2Profile422 = 0x4,
316 VDEC_MPEG2ProfileSNR = 0x8,
317 VDEC_MPEG2ProfileSpatial = 0x10,
318 VDEC_MPEG2ProfileHigh = 0x20,
319 VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000,
320 VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000,
321 VDEC_MPEG2ProfileMax = 0x7FFFFFFF
322};
323
324enum vdec_mpeg2_level {
325
326 VDEC_MPEG2LevelLL = 0x1,
327 VDEC_MPEG2LevelML = 0x2,
328 VDEC_MPEG2LevelH14 = 0x4,
329 VDEC_MPEG2LevelHL = 0x8,
330 VDEC_MPEG2LevelKhronosExtensions = 0x6F000000,
331 VDEC_MPEG2LevelVendorStartUnused = 0x7F000000,
332 VDEC_MPEG2LevelMax = 0x7FFFFFFF
333};
334
335enum vdec_mpeg4_profile {
336 VDEC_MPEG4ProfileSimple = 0x01,
337 VDEC_MPEG4ProfileSimpleScalable = 0x02,
338 VDEC_MPEG4ProfileCore = 0x04,
339 VDEC_MPEG4ProfileMain = 0x08,
340 VDEC_MPEG4ProfileNbit = 0x10,
341 VDEC_MPEG4ProfileScalableTexture = 0x20,
342 VDEC_MPEG4ProfileSimpleFace = 0x40,
343 VDEC_MPEG4ProfileSimpleFBA = 0x80,
344 VDEC_MPEG4ProfileBasicAnimated = 0x100,
345 VDEC_MPEG4ProfileHybrid = 0x200,
346 VDEC_MPEG4ProfileAdvancedRealTime = 0x400,
347 VDEC_MPEG4ProfileCoreScalable = 0x800,
348 VDEC_MPEG4ProfileAdvancedCoding = 0x1000,
349 VDEC_MPEG4ProfileAdvancedCore = 0x2000,
350 VDEC_MPEG4ProfileAdvancedScalable = 0x4000,
351 VDEC_MPEG4ProfileAdvancedSimple = 0x8000,
352 VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000,
353 VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000,
354 VDEC_MPEG4ProfileMax = 0x7FFFFFFF
355};
356
357enum vdec_mpeg4_level {
358 VDEC_MPEG4Level0 = 0x01,
359 VDEC_MPEG4Level0b = 0x02,
360 VDEC_MPEG4Level1 = 0x04,
361 VDEC_MPEG4Level2 = 0x08,
362 VDEC_MPEG4Level3 = 0x10,
363 VDEC_MPEG4Level4 = 0x20,
364 VDEC_MPEG4Level4a = 0x40,
365 VDEC_MPEG4Level5 = 0x80,
366 VDEC_MPEG4LevelKhronosExtensions = 0x6F000000,
367 VDEC_MPEG4LevelVendorStartUnused = 0x7F000000,
368 VDEC_MPEG4LevelMax = 0x7FFFFFFF
369};
370
371enum vdec_avc_profile {
372 VDEC_AVCProfileBaseline = 0x01,
373 VDEC_AVCProfileMain = 0x02,
374 VDEC_AVCProfileExtended = 0x04,
375 VDEC_AVCProfileHigh = 0x08,
376 VDEC_AVCProfileHigh10 = 0x10,
377 VDEC_AVCProfileHigh422 = 0x20,
378 VDEC_AVCProfileHigh444 = 0x40,
379 VDEC_AVCProfileKhronosExtensions = 0x6F000000,
380 VDEC_AVCProfileVendorStartUnused = 0x7F000000,
381 VDEC_AVCProfileMax = 0x7FFFFFFF
382};
383
384enum vdec_avc_level {
385 VDEC_AVCLevel1 = 0x01,
386 VDEC_AVCLevel1b = 0x02,
387 VDEC_AVCLevel11 = 0x04,
388 VDEC_AVCLevel12 = 0x08,
389 VDEC_AVCLevel13 = 0x10,
390 VDEC_AVCLevel2 = 0x20,
391 VDEC_AVCLevel21 = 0x40,
392 VDEC_AVCLevel22 = 0x80,
393 VDEC_AVCLevel3 = 0x100,
394 VDEC_AVCLevel31 = 0x200,
395 VDEC_AVCLevel32 = 0x400,
396 VDEC_AVCLevel4 = 0x800,
397 VDEC_AVCLevel41 = 0x1000,
398 VDEC_AVCLevel42 = 0x2000,
399 VDEC_AVCLevel5 = 0x4000,
400 VDEC_AVCLevel51 = 0x8000,
401 VDEC_AVCLevelKhronosExtensions = 0x6F000000,
402 VDEC_AVCLevelVendorStartUnused = 0x7F000000,
403 VDEC_AVCLevelMax = 0x7FFFFFFF
404};
405
406enum vdec_divx_profile {
407 VDEC_DIVXProfile_qMobile = 0x01,
408 VDEC_DIVXProfile_Mobile = 0x02,
409 VDEC_DIVXProfile_HD = 0x04,
410 VDEC_DIVXProfile_Handheld = 0x08,
411 VDEC_DIVXProfile_Portable = 0x10,
412 VDEC_DIVXProfile_HomeTheater = 0x20
413};
414
415enum vdec_xvid_profile {
416 VDEC_XVIDProfile_Simple = 0x1,
417 VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2,
418 VDEC_XVIDProfile_Advanced_Simple = 0x4
419};
420
421enum vdec_xvid_level {
422 VDEC_XVID_LEVEL_S_L0 = 0x1,
423 VDEC_XVID_LEVEL_S_L1 = 0x2,
424 VDEC_XVID_LEVEL_S_L2 = 0x4,
425 VDEC_XVID_LEVEL_S_L3 = 0x8,
426 VDEC_XVID_LEVEL_ARTS_L1 = 0x10,
427 VDEC_XVID_LEVEL_ARTS_L2 = 0x20,
428 VDEC_XVID_LEVEL_ARTS_L3 = 0x40,
429 VDEC_XVID_LEVEL_ARTS_L4 = 0x80,
430 VDEC_XVID_LEVEL_AS_L0 = 0x100,
431 VDEC_XVID_LEVEL_AS_L1 = 0x200,
432 VDEC_XVID_LEVEL_AS_L2 = 0x400,
433 VDEC_XVID_LEVEL_AS_L3 = 0x800,
434 VDEC_XVID_LEVEL_AS_L4 = 0x1000
435};
436
437enum vdec_h263profile {
438 VDEC_H263ProfileBaseline = 0x01,
439 VDEC_H263ProfileH320Coding = 0x02,
440 VDEC_H263ProfileBackwardCompatible = 0x04,
441 VDEC_H263ProfileISWV2 = 0x08,
442 VDEC_H263ProfileISWV3 = 0x10,
443 VDEC_H263ProfileHighCompression = 0x20,
444 VDEC_H263ProfileInternet = 0x40,
445 VDEC_H263ProfileInterlace = 0x80,
446 VDEC_H263ProfileHighLatency = 0x100,
447 VDEC_H263ProfileKhronosExtensions = 0x6F000000,
448 VDEC_H263ProfileVendorStartUnused = 0x7F000000,
449 VDEC_H263ProfileMax = 0x7FFFFFFF
450};
451
452enum vdec_h263level {
453 VDEC_H263Level10 = 0x01,
454 VDEC_H263Level20 = 0x02,
455 VDEC_H263Level30 = 0x04,
456 VDEC_H263Level40 = 0x08,
457 VDEC_H263Level45 = 0x10,
458 VDEC_H263Level50 = 0x20,
459 VDEC_H263Level60 = 0x40,
460 VDEC_H263Level70 = 0x80,
461 VDEC_H263LevelKhronosExtensions = 0x6F000000,
462 VDEC_H263LevelVendorStartUnused = 0x7F000000,
463 VDEC_H263LevelMax = 0x7FFFFFFF
464};
465
466enum vdec_wmv_format {
467 VDEC_WMVFormatUnused = 0x01,
468 VDEC_WMVFormat7 = 0x02,
469 VDEC_WMVFormat8 = 0x04,
470 VDEC_WMVFormat9 = 0x08,
471 VDEC_WMFFormatKhronosExtensions = 0x6F000000,
472 VDEC_WMFFormatVendorStartUnused = 0x7F000000,
473 VDEC_WMVFormatMax = 0x7FFFFFFF
474};
475
476enum vdec_vc1_profile {
477 VDEC_VC1ProfileSimple = 0x1,
478 VDEC_VC1ProfileMain = 0x2,
479 VDEC_VC1ProfileAdvanced = 0x4
480};
481
482enum vdec_vc1_level {
483 VDEC_VC1_LEVEL_S_Low = 0x1,
484 VDEC_VC1_LEVEL_S_Medium = 0x2,
485 VDEC_VC1_LEVEL_M_Low = 0x4,
486 VDEC_VC1_LEVEL_M_Medium = 0x8,
487 VDEC_VC1_LEVEL_M_High = 0x10,
488 VDEC_VC1_LEVEL_A_L0 = 0x20,
489 VDEC_VC1_LEVEL_A_L1 = 0x40,
490 VDEC_VC1_LEVEL_A_L2 = 0x80,
491 VDEC_VC1_LEVEL_A_L3 = 0x100,
492 VDEC_VC1_LEVEL_A_L4 = 0x200
493};
494
495struct vdec_profile_level {
496 uint32_t profiles;
497 uint32_t levels;
498};
499
500enum vdec_interlaced_format {
501 VDEC_InterlaceFrameProgressive = 0x1,
502 VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2,
503 VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4
504};
505
506#define VDEC_YUV_FORMAT_NV12_TP10_UBWC \
507 VDEC_YUV_FORMAT_NV12_TP10_UBWC
508
509enum vdec_output_fromat {
510 VDEC_YUV_FORMAT_NV12 = 0x1,
511 VDEC_YUV_FORMAT_TILE_4x2 = 0x2,
512 VDEC_YUV_FORMAT_NV12_UBWC = 0x3,
513 VDEC_YUV_FORMAT_NV12_TP10_UBWC = 0x4
514};
515
516enum vdec_output_order {
517 VDEC_ORDER_DISPLAY = 0x1,
518 VDEC_ORDER_DECODE = 0x2
519};
520
521struct vdec_picsize {
522 uint32_t frame_width;
523 uint32_t frame_height;
524 uint32_t stride;
525 uint32_t scan_lines;
526};
527
528struct vdec_seqheader {
529 void __user *ptr_seqheader;
530 size_t seq_header_len;
531 int pmem_fd;
532 size_t pmem_offset;
533};
534
535struct vdec_mberror {
536 void __user *ptr_errormap;
537 size_t err_mapsize;
538};
539
540struct vdec_input_frameinfo {
541 void __user *bufferaddr;
542 size_t offset;
543 size_t datalen;
544 uint32_t flags;
545 int64_t timestamp;
546 void *client_data;
547 int pmem_fd;
548 size_t pmem_offset;
549 void __user *desc_addr;
550 uint32_t desc_size;
551};
552
553struct vdec_framesize {
554 uint32_t left;
555 uint32_t top;
556 uint32_t right;
557 uint32_t bottom;
558};
559
560struct vdec_aspectratioinfo {
561 uint32_t aspect_ratio;
562 uint32_t par_width;
563 uint32_t par_height;
564};
565
566struct vdec_sep_metadatainfo {
567 void __user *metabufaddr;
568 uint32_t size;
569 int fd;
570 int offset;
571 uint32_t buffer_size;
572};
573
574struct vdec_output_frameinfo {
575 void __user *bufferaddr;
576 size_t offset;
577 size_t len;
578 uint32_t flags;
579 int64_t time_stamp;
580 enum vdec_picture pic_type;
581 void *client_data;
582 void *input_frame_clientdata;
583 struct vdec_picsize picsize;
584 struct vdec_framesize framesize;
585 enum vdec_interlaced_format interlaced_format;
586 struct vdec_aspectratioinfo aspect_ratio_info;
587 struct vdec_sep_metadatainfo metadata_info;
588};
589
590union vdec_msgdata {
591 struct vdec_output_frameinfo output_frame;
592 void *input_frame_clientdata;
593};
594
595struct vdec_msginfo {
596 uint32_t status_code;
597 uint32_t msgcode;
598 union vdec_msgdata msgdata;
599 size_t msgdatasize;
600};
601
602struct vdec_framerate {
603 unsigned long fps_denominator;
604 unsigned long fps_numerator;
605};
606
607struct vdec_h264_mv {
608 size_t size;
609 int count;
610 int pmem_fd;
611 int offset;
612};
613
614struct vdec_mv_buff_size {
615 int width;
616 int height;
617 int size;
618 int alignment;
619};
620
621struct vdec_meta_buffers {
622 size_t size;
623 int count;
624 int pmem_fd;
625 int pmem_fd_iommu;
626 int offset;
627};
628
629#endif /* end of macro _VDECDECODER_H_ */