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Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +05301/*
2 * TI CDCE949 clock synthesizer driver
3 *
4 * Note: This implementation assumes an input of 27MHz to the CDCE.
5 * This is by no means constrained by CDCE hardware although the datasheet
6 * does use this as an example for all illustrations and more importantly:
7 * that is the crystal input on boards it is currently used on.
8 *
9 * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16#include <linux/kernel.h>
17#include <linux/clk.h>
18#include <linux/platform_device.h>
19#include <linux/i2c.h>
Paul Gortmaker73017a52011-07-31 16:14:14 -040020#include <linux/module.h>
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +053021
22#include <mach/clock.h>
Kevin Hilman28552c22010-02-25 15:36:38 -080023#include <mach/cdce949.h>
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +053024
25#include "clock.h"
26
27static struct i2c_client *cdce_i2c_client;
Sekhar Nori3b43cd62010-01-12 18:55:35 +053028static DEFINE_MUTEX(cdce_mutex);
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +053029
30/* CDCE register descriptor */
31struct cdce_reg {
32 u8 addr;
33 u8 val;
34};
35
36/* Per-Output (Y1, Y2 etc.) frequency descriptor */
37struct cdce_freq {
38 /* Frequency in KHz */
39 unsigned long frequency;
40 /*
41 * List of registers to program to obtain a particular frequency.
42 * 0x0 in register address and value is the end of list marker.
43 */
44 struct cdce_reg *reglist;
45};
46
47#define CDCE_FREQ_TABLE_ENTRY(line, out) \
48{ \
49 .reglist = cdce_y ##line## _ ##out, \
50 .frequency = out, \
51}
52
53/* List of CDCE outputs */
54struct cdce_output {
55 /* List of frequencies on this output */
56 struct cdce_freq *freq_table;
57 /* Number of possible frequencies */
58 int size;
59};
60
61/*
62 * Finding out the values to program into CDCE949 registers for a particular
63 * frequency output is not a simple calculation. Have a look at the datasheet
64 * for the details. There is desktop software available to help users with
65 * the calculations. Here, we just depend on the output of that software
66 * (or hand calculations) instead trying to runtime calculate the register
67 * values and inflicting misery on ourselves.
68 */
69static struct cdce_reg cdce_y1_148500[] = {
70 { 0x13, 0x00 },
71 /* program PLL1_0 multiplier */
72 { 0x18, 0xaf },
73 { 0x19, 0x50 },
74 { 0x1a, 0x02 },
75 { 0x1b, 0xc9 },
76 /* program PLL1_11 multiplier */
77 { 0x1c, 0x00 },
78 { 0x1d, 0x40 },
79 { 0x1e, 0x02 },
80 { 0x1f, 0xc9 },
81 /* output state selection */
82 { 0x15, 0x00 },
83 { 0x14, 0xef },
84 /* switch MUX to PLL1 output */
85 { 0x14, 0x6f },
86 { 0x16, 0x06 },
87 /* set P2DIV divider, P3DIV and input crystal */
88 { 0x17, 0x06 },
89 { 0x01, 0x00 },
90 { 0x05, 0x48 },
91 { 0x02, 0x80 },
92 /* enable and disable PLL */
93 { 0x02, 0xbc },
94 { 0x03, 0x01 },
95 { },
96};
97
98static struct cdce_reg cdce_y1_74250[] = {
99 { 0x13, 0x00 },
100 { 0x18, 0xaf },
101 { 0x19, 0x50 },
102 { 0x1a, 0x02 },
103 { 0x1b, 0xc9 },
104 { 0x1c, 0x00 },
105 { 0x1d, 0x40 },
106 { 0x1e, 0x02 },
107 { 0x1f, 0xc9 },
108 /* output state selection */
109 { 0x15, 0x00 },
110 { 0x14, 0xef },
111 /* switch MUX to PLL1 output */
112 { 0x14, 0x6f },
113 { 0x16, 0x06 },
114 /* set P2DIV divider, P3DIV and input crystal */
115 { 0x17, 0x06 },
116 { 0x01, 0x00 },
117 { 0x05, 0x48 },
118 { 0x02, 0x80 },
119 /* enable and disable PLL */
120 { 0x02, 0xbc },
121 { 0x03, 0x02 },
122 { },
123};
124
125static struct cdce_reg cdce_y1_27000[] = {
126 { 0x13, 0x00 },
127 { 0x18, 0x00 },
128 { 0x19, 0x40 },
129 { 0x1a, 0x02 },
130 { 0x1b, 0x08 },
131 { 0x1c, 0x00 },
132 { 0x1d, 0x40 },
133 { 0x1e, 0x02 },
134 { 0x1f, 0x08 },
135 { 0x15, 0x02 },
136 { 0x14, 0xed },
137 { 0x16, 0x01 },
138 { 0x17, 0x01 },
139 { 0x01, 0x00 },
140 { 0x05, 0x50 },
141 { 0x02, 0xb4 },
142 { 0x03, 0x01 },
143 { },
144};
145
146static struct cdce_freq cdce_y1_freqs[] = {
147 CDCE_FREQ_TABLE_ENTRY(1, 148500),
148 CDCE_FREQ_TABLE_ENTRY(1, 74250),
149 CDCE_FREQ_TABLE_ENTRY(1, 27000),
150};
151
152static struct cdce_reg cdce_y5_13500[] = {
153 { 0x27, 0x08 },
154 { 0x28, 0x00 },
155 { 0x29, 0x40 },
156 { 0x2a, 0x02 },
157 { 0x2b, 0x08 },
158 { 0x24, 0x6f },
159 { },
160};
161
162static struct cdce_reg cdce_y5_16875[] = {
163 { 0x27, 0x08 },
164 { 0x28, 0x9f },
165 { 0x29, 0xb0 },
166 { 0x2a, 0x02 },
167 { 0x2b, 0x89 },
168 { 0x24, 0x6f },
169 { },
170};
171
172static struct cdce_reg cdce_y5_27000[] = {
173 { 0x27, 0x04 },
174 { 0x28, 0x00 },
175 { 0x29, 0x40 },
176 { 0x2a, 0x02 },
177 { 0x2b, 0x08 },
178 { 0x24, 0x6f },
179 { },
180};
181static struct cdce_reg cdce_y5_54000[] = {
182 { 0x27, 0x04 },
183 { 0x28, 0xff },
184 { 0x29, 0x80 },
185 { 0x2a, 0x02 },
186 { 0x2b, 0x07 },
187 { 0x24, 0x6f },
188 { },
189};
190
191static struct cdce_reg cdce_y5_81000[] = {
192 { 0x27, 0x02 },
193 { 0x28, 0xbf },
194 { 0x29, 0xa0 },
195 { 0x2a, 0x03 },
196 { 0x2b, 0x0a },
197 { 0x24, 0x6f },
198 { },
199};
200
201static struct cdce_freq cdce_y5_freqs[] = {
202 CDCE_FREQ_TABLE_ENTRY(5, 13500),
203 CDCE_FREQ_TABLE_ENTRY(5, 16875),
204 CDCE_FREQ_TABLE_ENTRY(5, 27000),
205 CDCE_FREQ_TABLE_ENTRY(5, 54000),
206 CDCE_FREQ_TABLE_ENTRY(5, 81000),
207};
208
209
210static struct cdce_output output_list[] = {
211 [1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) },
212 [5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) },
213};
214
215int cdce_set_rate(struct clk *clk, unsigned long rate)
216{
217 int i, ret = 0;
218 struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table;
219 struct cdce_reg *regs = NULL;
220
221 if (!cdce_i2c_client)
222 return -ENODEV;
223
224 if (!freq_table)
225 return -EINVAL;
226
227 for (i = 0; i < output_list[clk->lpsc].size; i++) {
228 if (freq_table[i].frequency == rate / 1000) {
229 regs = freq_table[i].reglist;
230 break;
231 }
232 }
233
234 if (!regs)
235 return -EINVAL;
236
Sekhar Nori3b43cd62010-01-12 18:55:35 +0530237 mutex_lock(&cdce_mutex);
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +0530238 for (i = 0; regs[i].addr; i++) {
239 ret = i2c_smbus_write_byte_data(cdce_i2c_client,
240 regs[i].addr | 0x80, regs[i].val);
241 if (ret)
Sekhar Nori3b43cd62010-01-12 18:55:35 +0530242 break;
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +0530243 }
Sekhar Nori3b43cd62010-01-12 18:55:35 +0530244 mutex_unlock(&cdce_mutex);
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +0530245
Sekhar Nori3b43cd62010-01-12 18:55:35 +0530246 if (!ret)
247 clk->rate = rate;
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +0530248
Sekhar Nori3b43cd62010-01-12 18:55:35 +0530249 return ret;
Nageswari Srinivasan5b8972d2010-01-06 17:19:48 +0530250}
251
252static int cdce_probe(struct i2c_client *client,
253 const struct i2c_device_id *id)
254{
255 cdce_i2c_client = client;
256 return 0;
257}
258
259static int __devexit cdce_remove(struct i2c_client *client)
260{
261 cdce_i2c_client = NULL;
262 return 0;
263}
264
265static const struct i2c_device_id cdce_id[] = {
266 {"cdce949", 0},
267 {},
268};
269MODULE_DEVICE_TABLE(i2c, cdce_id);
270
271static struct i2c_driver cdce_driver = {
272 .driver = {
273 .owner = THIS_MODULE,
274 .name = "cdce949",
275 },
276 .probe = cdce_probe,
277 .remove = __devexit_p(cdce_remove),
278 .id_table = cdce_id,
279};
280
281static int __init cdce_init(void)
282{
283 return i2c_add_driver(&cdce_driver);
284}
285subsys_initcall(cdce_init);
286
287static void __exit cdce_exit(void)
288{
289 i2c_del_driver(&cdce_driver);
290}
291module_exit(cdce_exit);
292
293MODULE_AUTHOR("Texas Instruments");
294MODULE_DESCRIPTION("CDCE949 clock synthesizer driver");
295MODULE_LICENSE("GPL v2");