blob: 88e0126e855aa6826d3e4a4fda4a2acbea7791fe [file] [log] [blame]
Larry Fingerf7c92d22014-03-28 21:37:39 -05001/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 ******************************************************************************/
15
16#include "odm_precomp.h"
17
18void
19odm_ConfigRFReg_8723A(
20 struct dm_odm_t *pDM_Odm,
21 u32 Addr,
22 u32 Data,
23 enum RF_RADIO_PATH RF_PATH,
24 u32 RegAddr
25 )
26{
27 if (Addr == 0xfe) {
28 msleep(50);
29 } else if (Addr == 0xfd) {
30 mdelay(5);
31 } else if (Addr == 0xfc) {
32 mdelay(1);
33 } else if (Addr == 0xfb) {
34 udelay(50);
35 } else if (Addr == 0xfa) {
36 udelay(5);
37 } else if (Addr == 0xf9) {
38 udelay(1);
39 } else {
40 ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
41 /* Add 1us delay between BB/RF register setting. */
42 udelay(1);
43 }
44}
45
Larry Fingerf7c92d22014-03-28 21:37:39 -050046void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm,
47 u32 Addr,
48 u8 Data
49 )
50{
51 ODM_Write1Byte(pDM_Odm, Addr, Data);
52 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
53 ("===> ODM_ConfigMACWithHeaderFile23a: [MAC_REG] %08X %08X\n",
54 Addr, Data));
55}
56
57void
58odm_ConfigBB_AGC_8723A(
59 struct dm_odm_t *pDM_Odm,
60 u32 Addr,
61 u32 Bitmask,
62 u32 Data
63 )
64{
65 ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
66 /* Add 1us delay between BB/RF register setting. */
67 udelay(1);
68
69 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
70 ("===> ODM_ConfigBBWithHeaderFile23a: [AGC_TAB] %08X %08X\n",
71 Addr, Data));
72}
73
74void
Larry Fingerf7c92d22014-03-28 21:37:39 -050075odm_ConfigBB_PHY_8723A(
76 struct dm_odm_t *pDM_Odm,
77 u32 Addr,
78 u32 Bitmask,
79 u32 Data
80 )
81{
82 if (Addr == 0xfe)
83 msleep(50);
84 else if (Addr == 0xfd)
85 mdelay(5);
86 else if (Addr == 0xfc)
87 mdelay(1);
88 else if (Addr == 0xfb)
89 udelay(50);
90 else if (Addr == 0xfa)
91 udelay(5);
92 else if (Addr == 0xf9)
93 udelay(1);
94 else if (Addr == 0xa24)
95 pDM_Odm->RFCalibrateInfo.RegA24 = Data;
96 ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
97
98 /* Add 1us delay between BB/RF register setting. */
99 udelay(1);
100
101 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
102 ("===> ODM_ConfigBBWithHeaderFile23a: [PHY_REG] %08X %08X\n",
103 Addr, Data));
104}