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Linus Walleijfa594402009-04-23 10:19:58 +01001/*
2 *
3 * arch/arm/mach-u300/include/mach/irqs.h
4 *
5 *
Linus Walleijfcb28d22012-08-13 10:11:15 +02006 * Copyright (C) 2006-2012 ST-Ericsson AB
Linus Walleijfa594402009-04-23 10:19:58 +01007 * License terms: GNU General Public License (GPL) version 2
8 * IRQ channel definitions for the U300 platforms.
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */
11
12#ifndef __MACH_IRQS_H
13#define __MACH_IRQS_H
14
Linus Walleij13445002012-04-18 15:29:58 +020015#define IRQ_U300_INTCON0_START 1
16#define IRQ_U300_INTCON1_START 33
Linus Walleijfa594402009-04-23 10:19:58 +010017/* These are on INTCON0 - 30 lines */
Linus Walleij13445002012-04-18 15:29:58 +020018#define IRQ_U300_IRQ0_EXT 1
19#define IRQ_U300_IRQ1_EXT 2
20#define IRQ_U300_DMA 3
21#define IRQ_U300_VIDEO_ENC_0 4
22#define IRQ_U300_VIDEO_ENC_1 5
23#define IRQ_U300_AAIF_RX 6
24#define IRQ_U300_AAIF_TX 7
25#define IRQ_U300_AAIF_VGPIO 8
26#define IRQ_U300_AAIF_WAKEUP 9
27#define IRQ_U300_PCM_I2S0_FRAME 10
28#define IRQ_U300_PCM_I2S0_FIFO 11
29#define IRQ_U300_PCM_I2S1_FRAME 12
30#define IRQ_U300_PCM_I2S1_FIFO 13
31#define IRQ_U300_XGAM_GAMCON 14
32#define IRQ_U300_XGAM_CDI 15
33#define IRQ_U300_XGAM_CDICON 16
Linus Walleij13445002012-04-18 15:29:58 +020034#define IRQ_U300_XGAM_PDI 18
35#define IRQ_U300_XGAM_PDICON 19
36#define IRQ_U300_XGAM_GAMEACC 20
37#define IRQ_U300_XGAM_MCIDCT 21
38#define IRQ_U300_APEX 22
39#define IRQ_U300_UART0 23
40#define IRQ_U300_SPI 24
41#define IRQ_U300_TIMER_APP_OS 25
42#define IRQ_U300_TIMER_APP_DD 26
43#define IRQ_U300_TIMER_APP_GP1 27
44#define IRQ_U300_TIMER_APP_GP2 28
45#define IRQ_U300_TIMER_OS 29
46#define IRQ_U300_TIMER_MS 30
47#define IRQ_U300_KEYPAD_KEYBF 31
48#define IRQ_U300_KEYPAD_KEYBR 32
Linus Walleijfa594402009-04-23 10:19:58 +010049/* These are on INTCON1 - 32 lines */
Linus Walleij13445002012-04-18 15:29:58 +020050#define IRQ_U300_GPIO_PORT0 33
51#define IRQ_U300_GPIO_PORT1 34
52#define IRQ_U300_GPIO_PORT2 35
Linus Walleijfa594402009-04-23 10:19:58 +010053
Linus Walleijfa594402009-04-23 10:19:58 +010054/* These are for DB3150, DB3200 and DB3350 */
Linus Walleij13445002012-04-18 15:29:58 +020055#define IRQ_U300_WDOG 36
56#define IRQ_U300_EVHIST 37
57#define IRQ_U300_MSPRO 38
58#define IRQ_U300_MMCSD_MCIINTR0 39
59#define IRQ_U300_MMCSD_MCIINTR1 40
60#define IRQ_U300_I2C0 41
61#define IRQ_U300_I2C1 42
62#define IRQ_U300_RTC 43
63#define IRQ_U300_NFIF 44
64#define IRQ_U300_NFIF2 45
Linus Walleijfa594402009-04-23 10:19:58 +010065
66/* The DB3350-specific interrupt lines */
Linus Walleij13445002012-04-18 15:29:58 +020067#define IRQ_U300_ISP_F0 46
68#define IRQ_U300_ISP_F1 47
69#define IRQ_U300_ISP_F2 48
70#define IRQ_U300_ISP_F3 49
71#define IRQ_U300_ISP_F4 50
72#define IRQ_U300_GPIO_PORT3 51
73#define IRQ_U300_SYSCON_PLL_LOCK 52
74#define IRQ_U300_UART1 53
75#define IRQ_U300_GPIO_PORT4 54
76#define IRQ_U300_GPIO_PORT5 55
77#define IRQ_U300_GPIO_PORT6 56
78#define U300_VIC_IRQS_END 57
Linus Walleijfa594402009-04-23 10:19:58 +010079
Linus Walleijcc890cd2011-09-08 09:04:51 +010080/* Maximum 8*7 GPIO lines */
Linus Walleijca402d32011-11-16 09:22:59 +010081#ifdef CONFIG_PINCTRL_COH901
Linus Walleijcc890cd2011-09-08 09:04:51 +010082#define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END)
83#define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56)
Mattias Wallind1622512010-05-01 18:26:40 +020084#else
Linus Walleijcc890cd2011-09-08 09:04:51 +010085#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
Mattias Wallind1622512010-05-01 18:26:40 +020086#endif
Linus Walleijfa594402009-04-23 10:19:58 +010087
Linus Walleija4fe2922012-08-13 13:49:45 +020088#define NR_IRQS_U300 (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
Linus Walleijcc890cd2011-09-08 09:04:51 +010089
Linus Walleijfa594402009-04-23 10:19:58 +010090#endif