Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Sealevel Systems 4021 driver. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation; either version |
| 7 | * 2 of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * (c) Copyright 1999, 2001 Alan Cox |
| 10 | * (c) Copyright 2001 Red Hat Inc. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/mm.h> |
| 17 | #include <linux/net.h> |
| 18 | #include <linux/skbuff.h> |
| 19 | #include <linux/netdevice.h> |
| 20 | #include <linux/if_arp.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/ioport.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <net/arp.h> |
| 25 | |
Al Viro | 8272997 | 2005-12-06 05:53:04 -0500 | [diff] [blame^] | 26 | #include <asm/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <asm/io.h> |
| 28 | #include <asm/dma.h> |
| 29 | #include <asm/byteorder.h> |
| 30 | #include <net/syncppp.h> |
| 31 | #include "z85230.h" |
| 32 | |
| 33 | |
| 34 | struct slvl_device |
| 35 | { |
| 36 | void *if_ptr; /* General purpose pointer (used by SPPP) */ |
| 37 | struct z8530_channel *chan; |
| 38 | struct ppp_device pppdev; |
| 39 | int channel; |
| 40 | }; |
| 41 | |
| 42 | |
| 43 | struct slvl_board |
| 44 | { |
| 45 | struct slvl_device *dev[2]; |
| 46 | struct z8530_dev board; |
| 47 | int iobase; |
| 48 | }; |
| 49 | |
| 50 | /* |
| 51 | * Network driver support routines |
| 52 | */ |
| 53 | |
| 54 | /* |
| 55 | * Frame receive. Simple for our card as we do sync ppp and there |
| 56 | * is no funny garbage involved |
| 57 | */ |
| 58 | |
| 59 | static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb) |
| 60 | { |
| 61 | /* Drop the CRC - it's not a good idea to try and negotiate it ;) */ |
| 62 | skb_trim(skb, skb->len-2); |
| 63 | skb->protocol=htons(ETH_P_WAN_PPP); |
| 64 | skb->mac.raw=skb->data; |
| 65 | skb->dev=c->netdevice; |
| 66 | /* |
| 67 | * Send it to the PPP layer. We don't have time to process |
| 68 | * it right now. |
| 69 | */ |
| 70 | netif_rx(skb); |
| 71 | c->netdevice->last_rx = jiffies; |
| 72 | } |
| 73 | |
| 74 | /* |
| 75 | * We've been placed in the UP state |
| 76 | */ |
| 77 | |
| 78 | static int sealevel_open(struct net_device *d) |
| 79 | { |
| 80 | struct slvl_device *slvl=d->priv; |
| 81 | int err = -1; |
| 82 | int unit = slvl->channel; |
| 83 | |
| 84 | /* |
| 85 | * Link layer up. |
| 86 | */ |
| 87 | |
| 88 | switch(unit) |
| 89 | { |
| 90 | case 0: |
| 91 | err=z8530_sync_dma_open(d, slvl->chan); |
| 92 | break; |
| 93 | case 1: |
| 94 | err=z8530_sync_open(d, slvl->chan); |
| 95 | break; |
| 96 | } |
| 97 | |
| 98 | if(err) |
| 99 | return err; |
| 100 | /* |
| 101 | * Begin PPP |
| 102 | */ |
| 103 | err=sppp_open(d); |
| 104 | if(err) |
| 105 | { |
| 106 | switch(unit) |
| 107 | { |
| 108 | case 0: |
| 109 | z8530_sync_dma_close(d, slvl->chan); |
| 110 | break; |
| 111 | case 1: |
| 112 | z8530_sync_close(d, slvl->chan); |
| 113 | break; |
| 114 | } |
| 115 | return err; |
| 116 | } |
| 117 | |
| 118 | slvl->chan->rx_function=sealevel_input; |
| 119 | |
| 120 | /* |
| 121 | * Go go go |
| 122 | */ |
| 123 | netif_start_queue(d); |
| 124 | return 0; |
| 125 | } |
| 126 | |
| 127 | static int sealevel_close(struct net_device *d) |
| 128 | { |
| 129 | struct slvl_device *slvl=d->priv; |
| 130 | int unit = slvl->channel; |
| 131 | |
| 132 | /* |
| 133 | * Discard new frames |
| 134 | */ |
| 135 | |
| 136 | slvl->chan->rx_function=z8530_null_rx; |
| 137 | |
| 138 | /* |
| 139 | * PPP off |
| 140 | */ |
| 141 | sppp_close(d); |
| 142 | /* |
| 143 | * Link layer down |
| 144 | */ |
| 145 | |
| 146 | netif_stop_queue(d); |
| 147 | |
| 148 | switch(unit) |
| 149 | { |
| 150 | case 0: |
| 151 | z8530_sync_dma_close(d, slvl->chan); |
| 152 | break; |
| 153 | case 1: |
| 154 | z8530_sync_close(d, slvl->chan); |
| 155 | break; |
| 156 | } |
| 157 | return 0; |
| 158 | } |
| 159 | |
| 160 | static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd) |
| 161 | { |
| 162 | /* struct slvl_device *slvl=d->priv; |
| 163 | z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */ |
| 164 | return sppp_do_ioctl(d, ifr,cmd); |
| 165 | } |
| 166 | |
| 167 | static struct net_device_stats *sealevel_get_stats(struct net_device *d) |
| 168 | { |
| 169 | struct slvl_device *slvl=d->priv; |
| 170 | if(slvl) |
| 171 | return z8530_get_stats(slvl->chan); |
| 172 | else |
| 173 | return NULL; |
| 174 | } |
| 175 | |
| 176 | /* |
| 177 | * Passed PPP frames, fire them downwind. |
| 178 | */ |
| 179 | |
| 180 | static int sealevel_queue_xmit(struct sk_buff *skb, struct net_device *d) |
| 181 | { |
| 182 | struct slvl_device *slvl=d->priv; |
| 183 | return z8530_queue_xmit(slvl->chan, skb); |
| 184 | } |
| 185 | |
| 186 | static int sealevel_neigh_setup(struct neighbour *n) |
| 187 | { |
| 188 | if (n->nud_state == NUD_NONE) { |
| 189 | n->ops = &arp_broken_ops; |
| 190 | n->output = n->ops->output; |
| 191 | } |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | static int sealevel_neigh_setup_dev(struct net_device *dev, struct neigh_parms *p) |
| 196 | { |
| 197 | if (p->tbl->family == AF_INET) { |
| 198 | p->neigh_setup = sealevel_neigh_setup; |
| 199 | p->ucast_probes = 0; |
| 200 | p->mcast_probes = 0; |
| 201 | } |
| 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | static int sealevel_attach(struct net_device *dev) |
| 206 | { |
| 207 | struct slvl_device *sv = dev->priv; |
| 208 | sppp_attach(&sv->pppdev); |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | static void sealevel_detach(struct net_device *dev) |
| 213 | { |
| 214 | sppp_detach(dev); |
| 215 | } |
| 216 | |
| 217 | static void slvl_setup(struct net_device *d) |
| 218 | { |
| 219 | d->open = sealevel_open; |
| 220 | d->stop = sealevel_close; |
| 221 | d->init = sealevel_attach; |
| 222 | d->uninit = sealevel_detach; |
| 223 | d->hard_start_xmit = sealevel_queue_xmit; |
| 224 | d->get_stats = sealevel_get_stats; |
| 225 | d->set_multicast_list = NULL; |
| 226 | d->do_ioctl = sealevel_ioctl; |
| 227 | d->neigh_setup = sealevel_neigh_setup_dev; |
| 228 | d->set_mac_address = NULL; |
| 229 | |
| 230 | } |
| 231 | |
| 232 | static inline struct slvl_device *slvl_alloc(int iobase, int irq) |
| 233 | { |
| 234 | struct net_device *d; |
| 235 | struct slvl_device *sv; |
| 236 | |
| 237 | d = alloc_netdev(sizeof(struct slvl_device), "hdlc%d", |
| 238 | slvl_setup); |
| 239 | |
| 240 | if (!d) |
| 241 | return NULL; |
| 242 | |
| 243 | sv = d->priv; |
| 244 | sv->if_ptr = &sv->pppdev; |
| 245 | sv->pppdev.dev = d; |
| 246 | d->base_addr = iobase; |
| 247 | d->irq = irq; |
| 248 | |
| 249 | return sv; |
| 250 | } |
| 251 | |
| 252 | |
| 253 | /* |
| 254 | * Allocate and setup Sealevel board. |
| 255 | */ |
| 256 | |
| 257 | static __init struct slvl_board *slvl_init(int iobase, int irq, |
| 258 | int txdma, int rxdma, int slow) |
| 259 | { |
| 260 | struct z8530_dev *dev; |
| 261 | struct slvl_board *b; |
| 262 | |
| 263 | /* |
| 264 | * Get the needed I/O space |
| 265 | */ |
| 266 | |
| 267 | if(!request_region(iobase, 8, "Sealevel 4021")) |
| 268 | { |
| 269 | printk(KERN_WARNING "sealevel: I/O 0x%X already in use.\n", iobase); |
| 270 | return NULL; |
| 271 | } |
| 272 | |
| 273 | b = kmalloc(sizeof(struct slvl_board), GFP_KERNEL); |
| 274 | if(!b) |
| 275 | goto fail3; |
| 276 | |
| 277 | memset(b, 0, sizeof(*b)); |
| 278 | if (!(b->dev[0]= slvl_alloc(iobase, irq))) |
| 279 | goto fail2; |
| 280 | |
| 281 | b->dev[0]->chan = &b->board.chanA; |
| 282 | b->dev[0]->channel = 0; |
| 283 | |
| 284 | if (!(b->dev[1] = slvl_alloc(iobase, irq))) |
| 285 | goto fail1_0; |
| 286 | |
| 287 | b->dev[1]->chan = &b->board.chanB; |
| 288 | b->dev[1]->channel = 1; |
| 289 | |
| 290 | dev = &b->board; |
| 291 | |
| 292 | /* |
| 293 | * Stuff in the I/O addressing |
| 294 | */ |
| 295 | |
| 296 | dev->active = 0; |
| 297 | |
| 298 | b->iobase = iobase; |
| 299 | |
| 300 | /* |
| 301 | * Select 8530 delays for the old board |
| 302 | */ |
| 303 | |
| 304 | if(slow) |
| 305 | iobase |= Z8530_PORT_SLEEP; |
| 306 | |
| 307 | dev->chanA.ctrlio=iobase+1; |
| 308 | dev->chanA.dataio=iobase; |
| 309 | dev->chanB.ctrlio=iobase+3; |
| 310 | dev->chanB.dataio=iobase+2; |
| 311 | |
| 312 | dev->chanA.irqs=&z8530_nop; |
| 313 | dev->chanB.irqs=&z8530_nop; |
| 314 | |
| 315 | /* |
| 316 | * Assert DTR enable DMA |
| 317 | */ |
| 318 | |
| 319 | outb(3|(1<<7), b->iobase+4); |
| 320 | |
| 321 | |
| 322 | /* We want a fast IRQ for this device. Actually we'd like an even faster |
| 323 | IRQ ;) - This is one driver RtLinux is made for */ |
| 324 | |
| 325 | if(request_irq(irq, &z8530_interrupt, SA_INTERRUPT, "SeaLevel", dev)<0) |
| 326 | { |
| 327 | printk(KERN_WARNING "sealevel: IRQ %d already in use.\n", irq); |
| 328 | goto fail1_1; |
| 329 | } |
| 330 | |
| 331 | dev->irq=irq; |
| 332 | dev->chanA.private=&b->dev[0]; |
| 333 | dev->chanB.private=&b->dev[1]; |
| 334 | dev->chanA.netdevice=b->dev[0]->pppdev.dev; |
| 335 | dev->chanB.netdevice=b->dev[1]->pppdev.dev; |
| 336 | dev->chanA.dev=dev; |
| 337 | dev->chanB.dev=dev; |
| 338 | |
| 339 | dev->chanA.txdma=3; |
| 340 | dev->chanA.rxdma=1; |
| 341 | if(request_dma(dev->chanA.txdma, "SeaLevel (TX)")!=0) |
| 342 | goto fail; |
| 343 | |
| 344 | if(request_dma(dev->chanA.rxdma, "SeaLevel (RX)")!=0) |
| 345 | goto dmafail; |
| 346 | |
| 347 | disable_irq(irq); |
| 348 | |
| 349 | /* |
| 350 | * Begin normal initialise |
| 351 | */ |
| 352 | |
| 353 | if(z8530_init(dev)!=0) |
| 354 | { |
| 355 | printk(KERN_ERR "Z8530 series device not found.\n"); |
| 356 | enable_irq(irq); |
| 357 | goto dmafail2; |
| 358 | } |
| 359 | if(dev->type==Z85C30) |
| 360 | { |
| 361 | z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream); |
| 362 | z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream); |
| 363 | } |
| 364 | else |
| 365 | { |
| 366 | z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230); |
| 367 | z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230); |
| 368 | } |
| 369 | |
| 370 | /* |
| 371 | * Now we can take the IRQ |
| 372 | */ |
| 373 | |
| 374 | enable_irq(irq); |
| 375 | |
| 376 | if (register_netdev(b->dev[0]->pppdev.dev)) |
| 377 | goto dmafail2; |
| 378 | |
| 379 | if (register_netdev(b->dev[1]->pppdev.dev)) |
| 380 | goto fail_unit; |
| 381 | |
| 382 | z8530_describe(dev, "I/O", iobase); |
| 383 | dev->active=1; |
| 384 | return b; |
| 385 | |
| 386 | fail_unit: |
| 387 | unregister_netdev(b->dev[0]->pppdev.dev); |
| 388 | |
| 389 | dmafail2: |
| 390 | free_dma(dev->chanA.rxdma); |
| 391 | dmafail: |
| 392 | free_dma(dev->chanA.txdma); |
| 393 | fail: |
| 394 | free_irq(irq, dev); |
| 395 | fail1_1: |
| 396 | free_netdev(b->dev[1]->pppdev.dev); |
| 397 | fail1_0: |
| 398 | free_netdev(b->dev[0]->pppdev.dev); |
| 399 | fail2: |
| 400 | kfree(b); |
| 401 | fail3: |
| 402 | release_region(iobase,8); |
| 403 | return NULL; |
| 404 | } |
| 405 | |
| 406 | static void __exit slvl_shutdown(struct slvl_board *b) |
| 407 | { |
| 408 | int u; |
| 409 | |
| 410 | z8530_shutdown(&b->board); |
| 411 | |
| 412 | for(u=0; u<2; u++) |
| 413 | { |
| 414 | struct net_device *d = b->dev[u]->pppdev.dev; |
| 415 | unregister_netdev(d); |
| 416 | free_netdev(d); |
| 417 | } |
| 418 | |
| 419 | free_irq(b->board.irq, &b->board); |
| 420 | free_dma(b->board.chanA.rxdma); |
| 421 | free_dma(b->board.chanA.txdma); |
| 422 | /* DMA off on the card, drop DTR */ |
| 423 | outb(0, b->iobase); |
| 424 | release_region(b->iobase, 8); |
| 425 | kfree(b); |
| 426 | } |
| 427 | |
| 428 | |
| 429 | static int io=0x238; |
| 430 | static int txdma=1; |
| 431 | static int rxdma=3; |
| 432 | static int irq=5; |
| 433 | static int slow=0; |
| 434 | |
| 435 | module_param(io, int, 0); |
| 436 | MODULE_PARM_DESC(io, "The I/O base of the Sealevel card"); |
| 437 | module_param(txdma, int, 0); |
| 438 | MODULE_PARM_DESC(txdma, "Transmit DMA channel"); |
| 439 | module_param(rxdma, int, 0); |
| 440 | MODULE_PARM_DESC(rxdma, "Receive DMA channel"); |
| 441 | module_param(irq, int, 0); |
| 442 | MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card"); |
| 443 | module_param(slow, bool, 0); |
| 444 | MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012"); |
| 445 | |
| 446 | MODULE_AUTHOR("Alan Cox"); |
| 447 | MODULE_LICENSE("GPL"); |
| 448 | MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021"); |
| 449 | |
| 450 | static struct slvl_board *slvl_unit; |
| 451 | |
| 452 | static int __init slvl_init_module(void) |
| 453 | { |
| 454 | #ifdef MODULE |
| 455 | printk(KERN_INFO "SeaLevel Z85230 Synchronous Driver v 0.02.\n"); |
| 456 | printk(KERN_INFO "(c) Copyright 1998, Building Number Three Ltd.\n"); |
| 457 | #endif |
| 458 | slvl_unit = slvl_init(io, irq, txdma, rxdma, slow); |
| 459 | |
| 460 | return slvl_unit ? 0 : -ENODEV; |
| 461 | } |
| 462 | |
| 463 | static void __exit slvl_cleanup_module(void) |
| 464 | { |
| 465 | if(slvl_unit) |
| 466 | slvl_shutdown(slvl_unit); |
| 467 | } |
| 468 | |
| 469 | module_init(slvl_init_module); |
| 470 | module_exit(slvl_cleanup_module); |