Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * Copyright 2005-2009 Analog Devices Inc. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 3 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 4 | * Licensed under the GPL-2 or later. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 5 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 6 | * Set up the interrupt priorities |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/module.h> |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame] | 10 | #include <linux/irq.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 11 | #include <asm/blackfin.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 12 | |
Mike Frysinger | 9216bbc | 2008-08-14 14:35:20 +0800 | [diff] [blame] | 13 | void __init program_IAR(void) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 14 | { |
| 15 | /* Program the IAR0 Register with the configured priority */ |
| 16 | bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | |
| 17 | ((CONFIG_IRQ_DMA_ERROR - 7) << IRQ_DMA_ERROR_POS) | |
| 18 | ((CONFIG_IRQ_ERROR - 7) << IRQ_ERROR_POS) | |
| 19 | ((CONFIG_IRQ_RTC - 7) << IRQ_RTC_POS) | |
| 20 | ((CONFIG_IRQ_PPI - 7) << IRQ_PPI_POS) | |
| 21 | ((CONFIG_IRQ_SPORT0_RX - 7) << IRQ_SPORT0_RX_POS) | |
| 22 | ((CONFIG_IRQ_SPORT0_TX - 7) << IRQ_SPORT0_TX_POS) | |
| 23 | ((CONFIG_IRQ_SPORT1_RX - 7) << IRQ_SPORT1_RX_POS)); |
| 24 | |
| 25 | bfin_write_SIC_IAR1(((CONFIG_IRQ_SPORT1_TX - 7) << IRQ_SPORT1_TX_POS) | |
| 26 | ((CONFIG_IRQ_TWI - 7) << IRQ_TWI_POS) | |
| 27 | ((CONFIG_IRQ_SPI - 7) << IRQ_SPI_POS) | |
| 28 | ((CONFIG_IRQ_UART0_RX - 7) << IRQ_UART0_RX_POS) | |
| 29 | ((CONFIG_IRQ_UART0_TX - 7) << IRQ_UART0_TX_POS) | |
| 30 | ((CONFIG_IRQ_UART1_RX - 7) << IRQ_UART1_RX_POS) | |
| 31 | ((CONFIG_IRQ_UART1_TX - 7) << IRQ_UART1_TX_POS) | |
| 32 | ((CONFIG_IRQ_CAN_RX - 7) << IRQ_CAN_RX_POS)); |
| 33 | |
| 34 | bfin_write_SIC_IAR2(((CONFIG_IRQ_CAN_TX - 7) << IRQ_CAN_TX_POS) | |
| 35 | ((CONFIG_IRQ_MAC_RX - 7) << IRQ_MAC_RX_POS) | |
| 36 | ((CONFIG_IRQ_MAC_TX - 7) << IRQ_MAC_TX_POS) | |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 37 | ((CONFIG_IRQ_TIMER0 - 7) << IRQ_TIMER0_POS) | |
| 38 | ((CONFIG_IRQ_TIMER1 - 7) << IRQ_TIMER1_POS) | |
| 39 | ((CONFIG_IRQ_TIMER2 - 7) << IRQ_TIMER2_POS) | |
| 40 | ((CONFIG_IRQ_TIMER3 - 7) << IRQ_TIMER3_POS) | |
| 41 | ((CONFIG_IRQ_TIMER4 - 7) << IRQ_TIMER4_POS)); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 42 | |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 43 | bfin_write_SIC_IAR3(((CONFIG_IRQ_TIMER5 - 7) << IRQ_TIMER5_POS) | |
| 44 | ((CONFIG_IRQ_TIMER6 - 7) << IRQ_TIMER6_POS) | |
| 45 | ((CONFIG_IRQ_TIMER7 - 7) << IRQ_TIMER7_POS) | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 46 | ((CONFIG_IRQ_PROG_INTA - 7) << IRQ_PROG_INTA_POS) | |
| 47 | ((CONFIG_IRQ_PORTG_INTB - 7) << IRQ_PORTG_INTB_POS) | |
| 48 | ((CONFIG_IRQ_MEM_DMA0 - 7) << IRQ_MEM_DMA0_POS) | |
| 49 | ((CONFIG_IRQ_MEM_DMA1 - 7) << IRQ_MEM_DMA1_POS) | |
| 50 | ((CONFIG_IRQ_WATCH - 7) << IRQ_WATCH_POS)); |
| 51 | |
| 52 | SSYNC(); |
| 53 | } |