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gerrit-public.fairphone.software / kernel / msm-4.9 / 8401707ff645521e9f21cbb8fe3b138f60e85680 / . / arch / sparc / include / asm / leon.h
blob: 559448c2c434061f006483cdc6704ceaf95aa356 [file] [log] [blame]
Konrad Eisele5213a782009-08-17 00:13:29 +0000[diff] [blame]1/*
2 * Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com) Gaisler Research
3 * Copyright (C) 2004 Stefan Holst (mail@s-holst.de) Uni-Stuttgart
4 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
5 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
6 */
7
8#ifndef LEON_H_INCLUDE
9#define LEON_H_INCLUDE
10
11#ifdef CONFIG_SPARC_LEON
12
13#define ASI_LEON_NOCACHE 0x01
14
15#define ASI_LEON_DCACHE_MISS 0x1
16
17#define ASI_LEON_CACHEREGS 0x02
18#define ASI_LEON_IFLUSH 0x10
19#define ASI_LEON_DFLUSH 0x11
20
21#define ASI_LEON_MMUFLUSH 0x18
22#define ASI_LEON_MMUREGS 0x19
23#define ASI_LEON_BYPASS 0x1c
24#define ASI_LEON_FLUSH_PAGE 0x10
25
26/* mmu register access, ASI_LEON_MMUREGS */
27#define LEON_CNR_CTRL 0x000
28#define LEON_CNR_CTXP 0x100
29#define LEON_CNR_CTX 0x200
30#define LEON_CNR_F 0x300
31#define LEON_CNR_FADDR 0x400
32
33#define LEON_CNR_CTX_NCTX 256 /*number of MMU ctx */
34
35#define LEON_CNR_CTRL_TLBDIS 0x80000000
36
37#define LEON_MMUTLB_ENT_MAX 64
38
39/*
40 * diagnostic access from mmutlb.vhd:
41 * 0: pte address
42 * 4: pte
43 * 8: additional flags
44 */
45#define LEON_DIAGF_LVL 0x3
46#define LEON_DIAGF_WR 0x8
47#define LEON_DIAGF_WR_SHIFT 3
48#define LEON_DIAGF_HIT 0x10
49#define LEON_DIAGF_HIT_SHIFT 4
50#define LEON_DIAGF_CTX 0x1fe0
51#define LEON_DIAGF_CTX_SHIFT 5
52#define LEON_DIAGF_VALID 0x2000
53#define LEON_DIAGF_VALID_SHIFT 13
54
55/*
56 * Interrupt Sources
57 *
58 * The interrupt source numbers directly map to the trap type and to
59 * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
60 * and the Interrupt Pending Registers.
61 */
62#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR 1
63#define LEON_INTERRUPT_UART_1_RX_TX 2
64#define LEON_INTERRUPT_UART_0_RX_TX 3
65#define LEON_INTERRUPT_EXTERNAL_0 4
66#define LEON_INTERRUPT_EXTERNAL_1 5
67#define LEON_INTERRUPT_EXTERNAL_2 6
68#define LEON_INTERRUPT_EXTERNAL_3 7
69#define LEON_INTERRUPT_TIMER1 8
70#define LEON_INTERRUPT_TIMER2 9
71#define LEON_INTERRUPT_EMPTY1 10
72#define LEON_INTERRUPT_EMPTY2 11
73#define LEON_INTERRUPT_OPEN_ETH 12
74#define LEON_INTERRUPT_EMPTY4 13
75#define LEON_INTERRUPT_EMPTY5 14
76#define LEON_INTERRUPT_EMPTY6 15
77
78/* irq masks */
79#define LEON_HARD_INT(x) (1 << (x)) /* irq 0-15 */
80#define LEON_IRQMASK_R 0x0000fffe /* bit 15- 1 of lregs.irqmask */
81#define LEON_IRQPRIO_R 0xfffe0000 /* bit 31-17 of lregs.irqmask */
82
83/* leon uart register definitions */
84#define LEON_OFF_UDATA 0x0
85#define LEON_OFF_USTAT 0x4
86#define LEON_OFF_UCTRL 0x8
87#define LEON_OFF_USCAL 0xc
88
89#define LEON_UCTRL_RE 0x01
90#define LEON_UCTRL_TE 0x02
91#define LEON_UCTRL_RI 0x04
92#define LEON_UCTRL_TI 0x08
93#define LEON_UCTRL_PS 0x10
94#define LEON_UCTRL_PE 0x20
95#define LEON_UCTRL_FL 0x40
96#define LEON_UCTRL_LB 0x80
97
98#define LEON_USTAT_DR 0x01
99#define LEON_USTAT_TS 0x02
100#define LEON_USTAT_TH 0x04
101#define LEON_USTAT_BR 0x08
102#define LEON_USTAT_OV 0x10
103#define LEON_USTAT_PE 0x20
104#define LEON_USTAT_FE 0x40
105
106#define LEON_MCFG2_SRAMDIS 0x00002000
107#define LEON_MCFG2_SDRAMEN 0x00004000
108#define LEON_MCFG2_SRAMBANKSZ 0x00001e00 /* [12-9] */
109#define LEON_MCFG2_SRAMBANKSZ_SHIFT 9
110#define LEON_MCFG2_SDRAMBANKSZ 0x03800000 /* [25-23] */
111#define LEON_MCFG2_SDRAMBANKSZ_SHIFT 23
112
113#define LEON_TCNT0_MASK 0x7fffff
114
115#define LEON_USTAT_ERROR (LEON_USTAT_OV | LEON_USTAT_PE | LEON_USTAT_FE)
116/* no break yet */
117
118#define ASI_LEON3_SYSCTRL 0x02
119#define ASI_LEON3_SYSCTRL_ICFG 0x08
120#define ASI_LEON3_SYSCTRL_DCFG 0x0c
121#define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1 << 27)
122#define ASI_LEON3_SYSCTRL_CFG_SSIZE(c) (1 << ((c >> 20) & 0xf))
123
124#ifndef __ASSEMBLY__
125
126/* do a virtual address read without cache */
127static inline unsigned long leon_readnobuffer_reg(unsigned long paddr)
128{
129 unsigned long retval;
130 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
131 "=r"(retval) : "r"(paddr), "i"(ASI_LEON_NOCACHE));
132 return retval;
133}
134
135/* do a physical address bypass write, i.e. for 0x80000000 */
136static inline void leon_store_reg(unsigned long paddr, unsigned long value)
137{
138 __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r"(value), "r"(paddr),
139 "i"(ASI_LEON_BYPASS) : "memory");
140}
141
142/* do a physical address bypass load, i.e. for 0x80000000 */
143static inline unsigned long leon_load_reg(unsigned long paddr)
144{
145 unsigned long retval;
146 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
147 "=r"(retval) : "r"(paddr), "i"(ASI_LEON_BYPASS));
148 return retval;
149}
150
151extern inline void leon_srmmu_disabletlb(void)
152{
153 unsigned int retval;
154 __asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),
155 "i"(ASI_LEON_MMUREGS));
156 retval |= LEON_CNR_CTRL_TLBDIS;
157 __asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),
158 "i"(ASI_LEON_MMUREGS) : "memory");
159}
160
161extern inline void leon_srmmu_enabletlb(void)
162{
163 unsigned int retval;
164 __asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),
165 "i"(ASI_LEON_MMUREGS));
166 retval = retval & ~LEON_CNR_CTRL_TLBDIS;
167 __asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),
168 "i"(ASI_LEON_MMUREGS) : "memory");
169}
170
171/* macro access for leon_load_reg() and leon_store_reg() */
172#define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x)))
173#define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v)))
174#define LEON3_BYPASS_ANDIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) & v)
175#define LEON3_BYPASS_ORIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) | v)
176#define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x))
177#define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v))
178#define LEON_REGLOAD_PA(x) leon_load_reg((unsigned long)(x)+LEON_PREGS)
179#define LEON_REGSTORE_PA(x, v) leon_store_reg((unsigned long)(x)+LEON_PREGS, (unsigned long)(v))
180#define LEON_REGSTORE_OR_PA(x, v) LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) | (unsigned long)(v))
181#define LEON_REGSTORE_AND_PA(x, v) LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) & (unsigned long)(v))
182
183/* macro access for leon_readnobuffer_reg() */
184#define LEON_BYPASSCACHE_LOAD_VA(x) leon_readnobuffer_reg((unsigned long)(x))
185
186extern void sparc_leon_eirq_register(int eirq);
187extern void leon_init(void);
188extern void leon_switch_mm(void);
189extern void leon_init_IRQ(void);
190
191extern unsigned long last_valid_pfn;
192
193extern inline unsigned long sparc_leon3_get_dcachecfg(void)
194{
195 unsigned int retval;
196 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
197 "=r"(retval) :
198 "r"(ASI_LEON3_SYSCTRL_DCFG),
199 "i"(ASI_LEON3_SYSCTRL));
200 return retval;
201}
202
203/* enable snooping */
204extern inline void sparc_leon3_enable_snooping(void)
205{
206 __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
207 "set 0x800000, %%l2\n\t"
208 "or %%l2, %%l1, %%l2\n\t"
209 "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
210};
211
212extern inline void sparc_leon3_disable_cache(void)
213{
214 __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
215 "set 0x00000f, %%l2\n\t"
216 "andn %%l2, %%l1, %%l2\n\t"
217 "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
218};
219
220#endif /*!__ASSEMBLY__*/
221
222#ifdef CONFIG_SMP
223# define LEON3_IRQ_RESCHEDULE 13
224# define LEON3_IRQ_TICKER (leon_percpu_timer_dev[0].irq)
225# define LEON3_IRQ_CROSS_CALL 15
226#endif
227
228#if defined(PAGE_SIZE_LEON_8K)
229#define LEON_PAGE_SIZE_LEON 1
230#elif defined(PAGE_SIZE_LEON_16K)
231#define LEON_PAGE_SIZE_LEON 2)
232#else
233#define LEON_PAGE_SIZE_LEON 0
234#endif
235
236#if LEON_PAGE_SIZE_LEON == 0
237/* [ 8, 6, 6 ] + 12 */
238#define LEON_PGD_SH 24
239#define LEON_PGD_M 0xff
240#define LEON_PMD_SH 18
241#define LEON_PMD_SH_V (LEON_PGD_SH-2)
242#define LEON_PMD_M 0x3f
243#define LEON_PTE_SH 12
244#define LEON_PTE_M 0x3f
245#elif LEON_PAGE_SIZE_LEON == 1
246/* [ 7, 6, 6 ] + 13 */
247#define LEON_PGD_SH 25
248#define LEON_PGD_M 0x7f
249#define LEON_PMD_SH 19
250#define LEON_PMD_SH_V (LEON_PGD_SH-1)
251#define LEON_PMD_M 0x3f
252#define LEON_PTE_SH 13
253#define LEON_PTE_M 0x3f
254#elif LEON_PAGE_SIZE_LEON == 2
255/* [ 6, 6, 6 ] + 14 */
256#define LEON_PGD_SH 26
257#define LEON_PGD_M 0x3f
258#define LEON_PMD_SH 20
259#define LEON_PMD_SH_V (LEON_PGD_SH-0)
260#define LEON_PMD_M 0x3f
261#define LEON_PTE_SH 14
262#define LEON_PTE_M 0x3f
263#elif LEON_PAGE_SIZE_LEON == 3
264/* [ 4, 7, 6 ] + 15 */
265#define LEON_PGD_SH 28
266#define LEON_PGD_M 0x0f
267#define LEON_PMD_SH 21
268#define LEON_PMD_SH_V (LEON_PGD_SH-0)
269#define LEON_PMD_M 0x7f
270#define LEON_PTE_SH 15
271#define LEON_PTE_M 0x3f
272#else
273#error cannot determine LEON_PAGE_SIZE_LEON
274#endif
275
276#define PAGE_MIN_SHIFT (12)
277#define PAGE_MIN_SIZE (1UL << PAGE_MIN_SHIFT)
278
279#define LEON3_XCCR_SETS_MASK 0x07000000UL
280#define LEON3_XCCR_SSIZE_MASK 0x00f00000UL
281
282#define LEON2_CCR_DSETS_MASK 0x03000000UL
283#define LEON2_CFG_SSIZE_MASK 0x00007000UL
284
285#ifndef __ASSEMBLY__
286extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);
287extern void leon_flush_icache_all(void);
288extern void leon_flush_dcache_all(void);
289extern void leon_flush_cache_all(void);
290extern void leon_flush_tlb_all(void);
291extern int leon_flush_during_switch;
292extern int leon_flush_needed(void);
293
294struct vm_area_struct;
295extern void leon_flush_icache_all(void);
296extern void leon_flush_dcache_all(void);
297extern void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
298extern void leon_flush_cache_all(void);
299extern void leon_flush_tlb_all(void);
300extern int leon_flush_during_switch;
301extern int leon_flush_needed(void);
302extern void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
303
304/* struct that hold LEON3 cache configuration registers */
305struct leon3_cacheregs {
306 unsigned long ccr; /* 0x00 - Cache Control Register */
307 unsigned long iccr; /* 0x08 - Instruction Cache Configuration Register */
308 unsigned long dccr; /* 0x0c - Data Cache Configuration Register */
309};
310
311/* struct that hold LEON2 cache configuration register
312 * & configuration register
313 */
314struct leon2_cacheregs {
315 unsigned long ccr, cfg;
316};
317
318#ifdef __KERNEL__
319
320#include <linux/interrupt.h>
321
322struct device_node;
323extern int sparc_leon_eirq_get(int eirq, int cpu);
324extern irqreturn_t sparc_leon_eirq_isr(int dummy, void *dev_id);
325extern void sparc_leon_eirq_register(int eirq);
326extern void leon_clear_clock_irq(void);
327extern void leon_load_profile_irq(int cpu, unsigned int limit);
328extern void leon_init_timers(irq_handler_t counter_fn);
329extern void leon_clear_clock_irq(void);
330extern void leon_load_profile_irq(int cpu, unsigned int limit);
331extern void leon_trans_init(struct device_node *dp);
332extern void leon_node_init(struct device_node *dp, struct device_node ***nextp);
333extern void leon_init_IRQ(void);
334extern void leon_init(void);
335extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);
336extern void init_leon(void);
337extern void poke_leonsparc(void);
338extern void leon3_getCacheRegs(struct leon3_cacheregs *regs);
339extern int leon_flush_needed(void);
340extern void leon_switch_mm(void);
341extern int srmmu_swprobe_trace;
342
Konrad Eisele84017072009-08-31 22:08:13 +0000[diff] [blame^]343#ifdef CONFIG_SMP
344extern int leon_smp_nrcpus(void);
345extern void leon_clear_profile_irq(int cpu);
346extern void leon_smp_done(void);
347extern void leon_boot_cpus(void);
348extern int leon_boot_one_cpu(int i);
349void leon_init_smp(void);
350extern void cpu_probe(void);
351extern void cpu_idle(void);
352extern void init_IRQ(void);
353extern void cpu_panic(void);
354extern int __leon_processor_id(void);
355void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
356
357extern unsigned int real_irq_entry[], smpleon_ticker[];
358extern unsigned int patchme_maybe_smp_msg[];
359extern unsigned long trapbase_cpu1[];
360extern unsigned long trapbase_cpu2[];
361extern unsigned long trapbase_cpu3[];
362extern unsigned int t_nmi[], linux_trap_ipi15_leon[];
363extern unsigned int linux_trap_ipi15_sun4m[];
364
365#endif /* CONFIG_SMP */
366
Konrad Eisele5213a782009-08-17 00:13:29 +0000[diff] [blame]367#endif /* __KERNEL__ */
368
369#endif /* __ASSEMBLY__ */
370
371/* macros used in leon_mm.c */
372#define PFN(x) ((x) >> PAGE_SHIFT)
373#define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
374#define _SRMMU_PTE_PMASK_LEON 0xffffffff
375
376#else /* defined(CONFIG_SPARC_LEON) */
377
378/* nop definitions for !LEON case */
379#define leon_init() do {} while (0)
380#define leon_switch_mm() do {} while (0)
381#define leon_init_IRQ() do {} while (0)
382#define init_leon() do {} while (0)
Konrad Eisele84017072009-08-31 22:08:13 +0000[diff] [blame^]383#define leon_smp_done() do {} while (0)
384#define leon_boot_cpus() do {} while (0)
385#define leon_boot_one_cpu(i) 1
386#define leon_init_smp() do {} while (0)
Konrad Eisele5213a782009-08-17 00:13:29 +0000[diff] [blame]387
388#endif /* !defined(CONFIG_SPARC_LEON) */
389
390#endif